JP2000131392A - Circuit for test board in burn-in testing system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten transferring time to transfer SKEW data to all test boards for turn-in tests without adding a controller. SOLUTION: A test board 10 performs a test by performing SKEW adjustments between an impression pattern for a test to be impressed on a device to be tested 300 and a test result signal to be returned from the device to be tested 300 according to a control signal inputted from a controller 200. Then, according to a control signal inputted from the controller 200, a pattern generating circuit 19 outputs a control signal to an increment circuit 18, memory 16, a selector 17, and delay time variable circuits 11 and 12 to make the memory 16 output SKEW data corresponding to an impression pattern and updates SKEW data held in the delay time variable circuits 11 and 12. By this, SKEW data for SKEW adjustments is updated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a burn-in test system for performing an electrical test while applying a temperature stress to a device under test such as an IC, and more particularly, to a SKEW adjustment of a signal in the burn-in test system to perform a test. The present invention relates to a test board circuit for testing a measurement device.

[0002]

2. Description of the Related Art Conventionally, a burn-in test is performed in which a device under test is placed in a furnace of a thermostat and a power supply voltage or a test waveform signal is externally applied to the device under test in the furnace. As a result, the reliability of the device under test is ensured.

In the burn-in test, a waveform signal to be applied (hereinafter, referred to as an application pattern) and a signal on a test board for judging a test result pass through a plurality of signal lines to obtain a difference in arrival time. Occurs. This difference in arrival time is called SKEW (skew), and the difference is a slight difference, but the test determination result greatly differs due to the small difference. Therefore, in the burn-in test, the SKEW adjustment plays an important role. .

FIG. 4 is a block diagram showing a main circuit configuration of a conventional burn-in test system for performing SKEW adjustment. Referring to FIG.
The EW adjustment will be described. In FIG. 4, a conventional burn-in test system 100 includes a controller 200,
Although not shown, the configuration includes the device under test 300 and the test board 400, and the test boards 400 corresponding to the number of the devices under test 300 are connected to the device under test 300, respectively, according to the number of the devices under test 300. Has become.
The burn-in test system 100 includes a test board 40
Reference numeral 0 denotes a system for applying a test waveform signal to the device under test 300 and testing the device under test 300 based on a response signal from the device under test 300.

[0005] The test board 400 includes a delay time variable device 11 to 12, a determination circuit 13, and a driver circuit 14
And a comparator circuit 15. The SKEW of the applied pattern and the test result signal is
The delay time variable units 11 to 12 adjust based on data input from 00 (hereinafter referred to as SKEW data),
After outputting the application pattern to the device under test 300 and adjusting the SKEW of the test result signal input from the device under test 300, the quality of the device under test 300 is determined. This SKEW data is supplied to delay time variable devices 11 to 1
2, the controller 200 stores data when SKEW adjustment is performed in advance, and the controller 200 transmits the delay time variable unit 11 when the power of the test system 100 is turned on.
To 12 respectively.

[0006]

However, in the conventional burn-in test system 100, even if the test board 400 is composed of a plurality of test boards, only one controller 200 is provided. It took a considerable time before the SKEW data was sent.

An object of the present invention is to provide SKE on all test boards for a burn-in test without adding a controller.
The purpose is to reduce the transfer time for transferring the W data.

[0008]

According to a first aspect of the present invention, there is provided a test board circuit in a burn-in test system.
A memory for storing SKEW data for KEW adjustment, and when applying a predetermined test signal to a device under test, SKEW adjustment of the test signal is performed based on the SKEW data stored in the memory. SKW adjusting the result signal output from the device under test in accordance with the SKEW data stored in the memory.
An EW adjustment circuit, and the SKEW adjustment circuit
A determination circuit for determining the quality of the device under test based on the adjusted result signal.

According to the invention of the test board circuit in the burn-in test system according to the first aspect, the memory stores SKEW data for SKEW adjustment, and
When a predetermined test signal is applied to the device under test, the W adjustment circuit performs SKEW adjustment of the test signal based on the SKEW data stored in the memory. Based on the SKEW data stored in the memory, the output result signal is
The W adjustment is performed, and the determination circuit determines pass / fail of the device under test based on the result signal SKEW adjusted by the SKEW adjustment circuit.

According to a second aspect of the present invention, in the circuit for a test board in the burn-in test system according to the first aspect of the invention, the SKEW adjustment circuit applies a predetermined test signal to the device under test. A first SKEW adjustment circuit that performs SKEW adjustment of the test signal based on the SKEW data stored in the memory, and applies the test signal to the device under test; and a first SKEW adjustment circuit. Depending on the test signal applied by
A second SKEW adjustment circuit that performs SKEW adjustment based on the SKEW data stored in the memory on the result signal output from the device under test, wherein the determination circuit The quality of the device under test may be determined based on the result signal of the SKEW adjustment performed by the SKEW adjustment circuit.

According to the first and second aspects of the present invention,
Unlike the conventional test board circuit, it is not necessary to input SKEW data from outside the test board circuit for each test, so that the transfer time required for transferring SKEW data to the test board circuit is reduced. Thus, it is possible to provide a highly practical test board circuit, and in a burn-in test system in which a plurality of test board circuits are mounted, it is possible to further reduce the transfer time.

According to a third aspect of the present invention, in the test board circuit in the burn-in test system according to the first aspect, a control signal for controlling a timing at which the SKEW adjustment circuit reads SKEW data stored in the memory is provided. The SKEW adjustment circuit further includes a control circuit that outputs the test signal and the test signal to the SKEW adjustment circuit. The SKEW adjustment circuit reads the SKEW data stored in the memory according to a timing of a control signal input from the control circuit. It is characterized in that SKEW adjustment of the result signal is performed.

According to the third aspect of the present invention, in the test board circuit in the burn-in test system according to the first aspect, the control circuit is configured to control the timing at which the SKEW adjustment circuit reads SKEW data stored in the memory. To the SKEW adjustment circuit, and the SKEW adjustment circuit reads the SKEW data stored in the memory according to the timing of the control signal input from the control circuit, and outputs the test signal And SKEW adjustment of the result signal.

According to a fourth aspect of the present invention, in the test board circuit in the burn-in test system according to the third aspect of the present invention, the memory includes a plurality of SKEWs corresponding to each type of the test signal. Data may be stored.

According to a fifth aspect of the present invention, in the circuit for a test board in the burn-in test system according to the fourth aspect of the present invention, the control circuit further includes: a SKEW data corresponding to a type of the test signal. An address signal indicating a storage address may be output to the memory, and the memory may output SKEW data indicated by the address signal input from the control circuit to the SKEW adjustment circuit.

According to a sixth aspect of the present invention, in the circuit for a test board in the burn-in test system according to the fifth aspect of the present invention, the control circuit further includes a memory for storing the SKEW data in the SKEW adjustment circuit. An output enable signal that controls the timing of output to
Output to the memory, and the memory responds to a timing of an output enable signal input from the control circuit.
The SKEW data may be output to the SKEW adjustment circuit.

According to the third aspect of the present invention, the SKEW adjustment circuit and the memory operate according to the signal output from the control circuit. Therefore, the operation of the SKEW adjustment circuit and the memory can be freely controlled. It is possible to provide a highly practical test board circuit that can set operation timing and can output SKEW data according to the type of test signal.

[0018]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 to FIG. 3 are diagrams showing an embodiment of a test board for a burn-in test to which the present invention is applied, and a burn-in test system.

First, the configuration will be described. 1 and 2
FIG. 5 is a block diagram showing a main circuit configuration of the burn-in test system 1 according to the present embodiment. FIG. 1 shows the main circuit configuration corresponding to FIG. FIG. 2 shows a main circuit configuration showing the above. The same components as those of the conventional burn-in test system shown in FIG. 4 are denoted by the same reference numerals.

1 and 2, a burn-in test system 1 includes a test board 10 and a controller 20.
0 and the device under test 300.
As shown in FIG. 2, when the burn-in test system 1 tests a plurality of devices under test (not shown),
Since a test board for performing a test by connecting to each device under test 300 is required, the test board
It is composed of a plurality of test boards as many as the number of the devices under test 300 of No. to n0.

In the burn-in test system 1, the test board 10 outputs an application pattern to the device under test 300 based on a control signal input from the controller 200, and outputs a test pattern according to a test result signal input from the device under test 300. This is a system for determining the quality of the device under test 300. The test board 10 performs SKEW adjustment for each applied pattern in order to perform SKEW adjustment according to the applied pattern.
Update W data.

As shown in FIG. 2, when the burn-in test system 1 includes a plurality of devices under test and a plurality of test boards 10 to n0, the test boards 10 to n0 Connected in common.
Therefore, when the controller 200 outputs the control signal, the control signal is input to each of the test boards 10 to n0, and the devices under test (not shown) connected to the test boards 10 to n0 are tested.

The test board 10 includes delay time variable circuits 11 to 12, a judgment circuit 13, and a driver circuit 14.
, A comparator circuit 15, a memory 16, a selector 17, an increment circuit 18, and a pattern generation circuit 19, and each circuit will be sequentially described. The test boards 10 to n0 have the same configuration. Therefore, only the test board 10 will be described below.

First, the pattern generation circuit 19 will be described. The pattern generation circuit 19 includes an increment signal a, an output enable signal c, and a selector control signal d based on a control signal input from the controller 200.
And a control circuit for generating and outputting a write enable signal f, and the operation of each circuit constituting the test board 10 is controlled by these signals.

The increment signal “a” is a unit pulse of “H” level for a predetermined unit time outputted to the increment circuit 18, and a memory address “b” outputted to the memory 16.
Is a signal for incrementing. The output enable signal c is a signal that is output to the memory 16 and causes the memory 16 to output SKEW data when the signal is at the “L” level. The write enable signal f is output to the delay time variable circuits 11 to 12, and when the signal is at the “L” level, the delay time variable circuits 11 to 12 capture and hold the SKEW data input from the memory 16. Signal. The selector control signal d is a unit pulse of the "H" level for a predetermined unit time outputted to the selector 17, and the selector 17 selects the delay time variable circuits 11 to 12 after this signal is inputted. Selector signal e
Is output.

The delay time variable circuit 11 is a circuit that performs SKEW adjustment of an application pattern input from the outside and outputs the result to the device under test 300 via the driver circuit 14. The delay time variable circuit 12 is a circuit that performs SKEW adjustment of a test result signal input from the device under test 300 via the comparator circuit 15 and outputs the result to the determination circuit 13. In addition, delay time variable circuits 11 to 12
Indicates that the selector signal e input from the selector 17 is "H".
Level, and when the write enable signal f input from the pattern generation circuit 19 is at “L” level, the memory 1
6 fetches the SKEW data input from
This is a circuit for updating and holding SKEW data for W adjustment.

The determination circuit 13 is a circuit that receives the test result signal of the device under test 300 SKEW adjusted by the delay time variable circuit 12 and determines the quality of the device under test 300.

The driver circuit 14 converts the application pattern after the SKEW adjustment input from the delay time variable circuit 11 into
This is a circuit that outputs to the device under test 300. The comparator circuit 15 includes the device under test 300 and the test board 1
This circuit extracts a test result signal corresponding to the application pattern output from the device under test 300 out of the signals between 0, and outputs the test result signal to the delay time variable circuit 12.

When the output enable signal c input from the pattern generation circuit 19 is at "L" level, the memory 16
This circuit outputs the SKEW data stored at the memory address b input from the increment circuit 18 to the delay time variable circuits 11 to 12.

When the selector control signal d input from the pattern generation circuit 19 rises, the selector 17 outputs the selector signal e to the "H" level or the "L" level to the delay time variable circuits 11 to 12, Together with the write enable signal f output from the generation circuit 19,
This is a circuit for controlling writing of SKEW data to the delay time variable circuits 11 to 12. Also, this "H" level or "L"
The timing and the period of the level are preset in the selector 17 with reference to the rise of the selector control signal d.

The increment circuit 18 holds the memory address b of the memory 16, outputs the held memory address b to the memory 16, and holds the memory address b when the increment signal a input from the pattern generating circuit 19 rises. This is a circuit that increments the memory address b and outputs it to the memory 16.

Next, the operation of this embodiment will be described. In the burn-in test system 1 of FIG. 2, the test board 10 updates the SKEW data with each signal such as the increment signal a generated and output by the pattern generation circuit 19 based on the control signal input from the controller 200. Will be described with reference to FIG.

FIG. 3 is a diagram showing a timing chart of each control signal on the test board 10. First, at the point A, the pattern generation circuit 19 outputs to the increment circuit 18 a unit pulse that sets the increment signal a to the “H” level for a predetermined unit time. At the time of the rise of the increment signal a, the increment circuit 18 to which the increment signal a is input increments the held memory address b and outputs the memory address b to the memory 16.

The pattern generating circuit 19 outputs a unit pulse for setting the selector control signal d to the “H” level for a predetermined unit time to the selector 17. Then, the selector 17 to which the selector control signal d has been input outputs the selector signal e for selecting the delay time variable circuits 11 to 12 as the “H” level or the “L” level at the rise of the selector control signal d. As described above, the timing and the period of the “H” level or the “L” level are changed and output according to the contents set in the selector 17 in advance.

Next, at time B, the pattern generation circuit 19
Falls the output enable signal c to the “L” level and outputs it to the memory 16. Since the output enable signal c has become “L” level, the memory 16
S stored in the memory address b input from
The KEW data is output to the delay time variable circuits 11 to 12. However, since the write enable signal f is at "H" level at this time, the delay time variable circuits 11 to 12 cannot capture and store the SKEW data in the circuits.

Next, at time C, the pattern generation circuit 19
Causes the write enable signal f to fall to the “L” level and outputs it to the delay time variable circuits 11 to 12. Since the write enable signal f is at the “L” level, if the selector signal e is at the “H” level, the delay time variable circuits 11 to 12 take in the SKEW data input from the memory 16 and hold the data in the circuits. I do.

Next, at time D, the pattern generation circuit 19
Raises the write enable signal f to "H" level and outputs it. Therefore, the delay time variable circuits 11 to 12
Stops the operation of taking in the SKEW data, and retains the SKEW data taken in after the time point C.

Next, at the point of E, the pattern generation circuit 19
Raises the output enable signal c to "H" level and outputs it. Then, since the output enable signal c has become “H” level, the memory 16 stops outputting the SKEW data.

The time points A to E correspond to the time on the test board 10.
Is one cycle of the operation for updating the SKEW data. A '
The memory address b is incremented by repeating this cycle in the same manner from -E 'onward, and the SKEW data stored in the memory address b of the memory 16 is fetched by the delay time variable circuits 11 to 12, and the device under test The SKEW adjustment corresponding to the application pattern applied to 300 is performed.

As described above, in the burn-in test system 1 of the present embodiment, the test board 10 applies the test application pattern applied to the device under test 300 in accordance with the control signal input from the controller 200, SKEW with test result signal returned from device under test 300
Make adjustments and test. The SKEW data for SKEW adjustment is updated by the pattern generation circuit 19 according to a control signal input from the controller 200.
Increment circuit 18, memory 16, selector 1
7 and control signals to the delay time variable circuits 11 to 12 to store SKEW data corresponding to the applied pattern in the memory 1.
6 and updates the SKEW data held by the delay time variable circuits 11 to 12.

Therefore, based on the control signal input from the controller 200, the S
Conventionally, since the pattern generation circuit 19 causes the delay time variable devices 11 to 12 to read the SKEW data from the KEW data, it has conventionally been necessary to individually transfer the SKEW data to all test boards as the number of test boards increases. The transfer time can be shortened, and a highly practical burn-in test system and test board can be provided.

The number of test boards 10 to n0 described in the above embodiment is not limited, and can be applied within a range in which a burn-in test can be performed. Since the data is input to all the test boards at the same time, the effect of reducing the transfer time of the SKEW data appears as the number of mounted boards increases.

Further, in the above embodiment, the delay time varying units 11 to 12 are provided with the SKE for outputting the application pattern.
Although two circuits have been described for W adjustment and for SKEW adjustment of the test result signal, one circuit may be configured as a SKEW adjustment circuit for signals input to and output from the device under test 300.

[0044]

According to the first and second aspects of the present invention, like the test board circuit in the conventional burn-in test system, the SKE is supplied from outside the test board circuit every test.
Since there is no need to input W data, it is possible to provide a highly practical test board circuit that can reduce the transfer time required for transferring SKEW data to the test board circuit. In the burn-in test system in which a plurality of test board circuits are mounted, the effect of further reducing the transfer time can be obtained.

According to the third aspect of the invention, the SKEW adjustment circuit and the memory operate according to the signal output from the control circuit. It is possible to provide a highly practical test board circuit that can set timing and output SKEW data according to the type of test signal.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a main circuit configuration of a burn-in test system 1 according to an embodiment to which the present invention is applied.

FIG. 2 is a block diagram showing a connection relationship between a controller 200 and a test board 10 in FIG. 1 and a main part circuit configuration of the burn-in test system 1 showing signals on the test board 10;

FIG. 3 is a diagram showing a timing chart of each control signal on a test board 10 of FIG. 2;

FIG. 4 is a block diagram showing a main circuit configuration of a conventional burn-in test system.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Burn-in test system 10 Test board 11 and 12 Delay time variable device 13 Judgment circuit 14 Driver circuit 15 Comparator circuit 16 Memory 17 Selector 18 Increment circuit 19 Pattern generation circuit 200 Controller 300 Device under test

Claims (6)

[Claims] 1. A memory for storing SKEW data for SKEW adjustment, and, when a predetermined test signal is applied to a device under test, performing SKEW adjustment of the test signal based on the SKEW data stored in the memory. SKEW adjustment is performed on the result signal output from the device under test in response to the test signal based on the SKEW data stored in the memory.
A test board circuit in a burn-in test system, comprising: a KEW adjustment circuit; and a determination circuit for determining the quality of the device under test based on a result signal SKEW adjusted by the SKEW adjustment circuit. 2. The SKEW adjustment circuit, when applying a predetermined test signal to the device under test,
A first SKEW adjustment circuit that performs SKEW adjustment of the test signal based on the SKEW data stored in the memory and applies the test signal to the device under test; In response to the test signal, the result signal output from the device under test is converted into S based on the SKEW data stored in the memory.
And a second SKEW adjustment circuit that performs KEW adjustment.
2. The test board circuit in the burn-in test system according to claim 1, wherein the quality of the device under test is determined based on the result signal after the KEW adjustment. 3. The SKEW adjustment circuit further includes a control circuit for outputting a control signal for controlling a timing at which the SKEW adjustment circuit reads SKEW data stored in the memory to the SKEW adjustment circuit. 2. The SKEW data stored in the memory is read in accordance with a timing of a control signal input from a circuit, and SKEW adjustment of the test signal and the result signal is performed.
A test board circuit in the described burn-in test system. 4. A test board circuit in a burn-in test system according to claim 3, wherein said memory stores a plurality of SKEW data corresponding to each type of said test signal. 5. The control circuit further outputs an address signal indicating a storage address of SKEW data according to a type of the test signal to the memory, and the memory outputs an address signal input from the control circuit. 5. The circuit for a test board in a burn-in test system according to claim 4, wherein the SKEW data specified in the step (c) is output to the SKEW adjustment circuit. 6. The control circuit further outputs to the memory an output enable signal for controlling a timing at which the memory outputs the SKEW data to the SKEW adjustment circuit, and the memory receives an input from the control circuit. 6. The circuit for a test board in a burn-in test system according to claim 5, wherein the SKEW data is output to the SKEW adjustment circuit in accordance with the timing of the output enable signal.