JP2000114314A - Semiconductor element mounting structure, its manufacture, and ic card - Google Patents

Semiconductor element mounting structure, its manufacture, and ic card

Info

Publication number
JP2000114314A
JP2000114314A JP27606698A JP27606698A JP2000114314A JP 2000114314 A JP2000114314 A JP 2000114314A JP 27606698 A JP27606698 A JP 27606698A JP 27606698 A JP27606698 A JP 27606698A JP 2000114314 A JP2000114314 A JP 2000114314A
Authority
JP
Japan
Prior art keywords
semiconductor element
terminal
organic substrate
bump
thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27606698A
Other languages
Japanese (ja)
Inventor
Tasao Soga
太佐男 曽我
Hideyoshi Shimokawa
英恵 下川
Isamu Takaoka
勇 高岡
Shinichi Wai
伸一 和井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP27606698A priority Critical patent/JP2000114314A/en
Publication of JP2000114314A publication Critical patent/JP2000114314A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1301—Shape
    • H01L2224/13016—Shape in side view
    • H01L2224/13018—Shape in side view comprising protrusions or indentations
    • H01L2224/13019—Shape in side view comprising protrusions or indentations at the bonding interface of the bump connector, i.e. on the surface of the bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor element mounting structure which is reduced in thickness and cost, through simplified mounting, a method for manufacturing the structure and non-contacting and contacting IC cards. SOLUTION: In a semiconductor element mounting structure, in which a semiconductor element 5 is mounted on an organic substrate 14 by bonding the terminals of the element 5 to the terminals of thin-film conductors 12 on the substrate 14, the terminals of the element 5 are bonded to the terminals of the conductors 12, in such a way that the front end sections narrowly protruded from flange sections or thin-wall sections 71 of bumps 7 which are thermocompression-bonded to the terminals of the element 5 are made to bite into the terminals of the conductors 12 through thermocompression bonding.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は、半導体素子の端子
を有機基板上の薄膜導体の端子に接合実装する半導体素
子実装構造体およびその製造方法並びに半導体素子実装
構造体を備えた非接触式および接触式ＩＣカードに関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor element mounting structure in which terminals of a semiconductor element are joined to terminals of a thin film conductor on an organic substrate, a method of manufacturing the same, and a non-contact type having the semiconductor element mounting structure. The present invention relates to a contact type IC card.

【０００２】[0002]

【従来の技術】ＩＣカードはインターネットを主とする
ネットワーク社会においてシステムのアクセス管理デバ
イスとして重要な位置を占めている。このため、低コス
トで高信頼度なＩＣカードが強く求められている。他
方、現行の普及している磁気カードはユーザの利便性か
ら厚さ０．２５ｍｍ前後に落ち着いている。従って、Ｉ
Ｃカードも望ましい形態として、薄型化が期待されてい
る。薄型ＩＣカードはマイクロプロセッサ、トランシー
バ、コンデンサの３チップで構成されている。マイクロ
プロセッサは大容量メモリサイズＥＥＰＲＯＭを内臓す
るＩＣカード専用プロセッサである。トランシーバはバ
ッテリレス非接触型ＩＣカードを実現するために電磁エ
ネルギ変換やデータ変復調機能を行うものである（宇佐
美 外５、薄型ＩＣカードにおけるＢａｒｅ Ｃｈｉｐ
実装事例、第５回表面実装技術（ＳＭＴ）フォーラム’
９７講演予稿集、日本電子機械工業会主催、１９９７−
１０）。2. Description of the Related Art An IC card occupies an important position as a system access control device in a network society mainly using the Internet. Therefore, there is a strong demand for a low-cost and highly reliable IC card. On the other hand, the current widespread magnetic card is settled to a thickness of about 0.25 mm for the convenience of the user. Therefore, I
The C card is also expected to be thinner as a desirable form. The thin IC card is composed of three chips of a microprocessor, a transceiver, and a capacitor. The microprocessor is a processor dedicated to an IC card having a large capacity memory EEPROM. The transceiver performs electromagnetic energy conversion and data modulation / demodulation functions to realize a batteryless contactless IC card (Usami et al. 5, Bare Chip in Thin IC Cards).
Mounting Cases, 5th Surface Mount Technology (SMT) Forum '
Proceedings of 97 Lectures, hosted by the Japan Electronics Machinery Association, 1997-
10).

【０００３】従来の非接触式で０〜２ｍｍの通信距離を
対象とした密着型のＩＣカードにおいては、ＰＥＴ樹脂
基板上にＡｇペーストを印刷した導体を形成して作られ
ている。Ｓｉチップ上の端子はＡｌ上に、例えばＴｉ／
Ｃｕ薄膜を形成し、その上にＣｕ／Ａｕめっきバンプを
厚く施したものがある。そのＡｕめっきバンプ上にＡｇ
ペーストを転写し、ＰＥＴ樹脂基板上のＡｇペースト導
体の端子上に圧着させて接続を行う。しかし、Ａｇペー
スト導体は抵抗値が高いため、電磁エネルギ変換におい
て、感度の低い非接触方式のＩＣカードしか適用できな
い課題がある。即ち、高感度が要求される非接触式で０
〜２０ｃｍの通信距離の近接型ＩＣカード用の回路導体
としては特性が得られず適用できなかった。[0003] A conventional non-contact type contact type IC card for a communication distance of 0 to 2 mm is made by forming a conductor on which an Ag paste is printed on a PET resin substrate. The terminal on the Si chip is placed on Al, for example, Ti /
There is one in which a Cu thin film is formed and a Cu / Au plating bump is thickly applied thereon. Ag on the Au plating bump
The paste is transferred, and the connection is performed by pressing the paste onto the terminal of the Ag paste conductor on the PET resin substrate. However, since the Ag paste conductor has a high resistance value, there is a problem that only a non-contact type IC card with low sensitivity can be applied in electromagnetic energy conversion. That is, in the non-contact type requiring high sensitivity, 0
The characteristics could not be obtained as a circuit conductor for a proximity IC card having a communication distance of 特性 20 cm, so that it could not be applied.

【０００４】[0004]

【発明が解決しようとする課題】そこで、高感度の特性
が要求されるＩＣカードとして、低コストで、量産化を
可能とする方式の開発が要求されている。ＰＥＴ樹脂等
の有機基板上の薄膜導体として、高感度の特性が得られ
て、低コストで、量産化を可能とするには導体抵抗値の
低いＡｌ箔、もしくはＣｕ箔導体が必要とされてきてい
る。また、低コストを実現するには簡素化実装が必要で
あり、無洗浄化、プロセスの簡素化が必要条件になる。Therefore, there is a demand for the development of a system which enables mass production at low cost as an IC card requiring high sensitivity characteristics. As a thin film conductor on an organic substrate such as PET resin, an Al foil or a Cu foil conductor having a low conductor resistance value is required to obtain high sensitivity characteristics, to be low cost, and to enable mass production. ing. In addition, simplified mounting is required to achieve low cost, and no cleaning and simplification of the process are necessary conditions.

【０００５】本発明の目的は、上記課題を解決すべく、
簡素化実装で薄型化を図ると共に、低コスト化を実現し
た半導体素子実装構造体およびその製造方法を提供する
ことにある。また、本発明の他の目的は、簡素化実装で
薄型化を図ると共に、低コスト化を実現した非接触式お
よび接触式ＩＣカードを提供することにある。[0005] An object of the present invention is to solve the above problems.
It is an object of the present invention to provide a semiconductor device mounting structure which is reduced in cost while realizing a thinner structure by simplified mounting and a method of manufacturing the same. It is another object of the present invention to provide a non-contact type and a contact type IC card which achieves a reduction in thickness while realizing a reduction in thickness by simplified mounting.

【０００６】[0006]

【課題を解決するための手段】上記目的を達成するため
に、本発明は、半導体素子の端子を有機基板上の薄膜導
体の端子に接合実装した半導体素子実装構造体であっ
て、前記半導体素子の端子上に接合され、且つ鍔状部分
若しくは薄肉状部分の先に細く突き出させて形成したバ
ンプの先端部分を、前記薄膜導体の端子に食い込ませて
金属接合させて構成したことを特徴とする。また、本発
明は、半導体素子の端子を有機基板上の薄膜導体の端子
に接合実装した半導体素子実装構造体であって、前記半
導体素子の端子上に熱圧着により接合され、且つ鍔状部
分若しくは薄肉状部分の先に細く突き出させて形成した
バンプの先端部分を、前記薄膜導体の端子に食い込ませ
て金属接合させて構成したことを特徴とする。また、本
発明は、半導体素子の端子を有機基板上の薄膜導体の端
子に接合実装した半導体素子実装構造体であって、前記
半導体素子の端子上に接合され、且つ鍔状部分若しくは
薄肉状部分の先に細く突き出させて形成したバンプの先
端部分を、前記薄膜導体の端子に熱圧着により食い込ま
せて金属接合させて構成したことを特徴とする。To achieve the above object, the present invention provides a semiconductor element mounting structure in which terminals of a semiconductor element are bonded and mounted to terminals of a thin film conductor on an organic substrate. And the tip of a bump formed by projecting thinly to the tip of a flange-shaped portion or a thin-walled portion is cut into the terminal of the thin-film conductor and metal-joined. . Further, the present invention is a semiconductor element mounting structure in which a terminal of a semiconductor element is bonded and mounted to a terminal of a thin film conductor on an organic substrate, and is bonded to the terminal of the semiconductor element by thermocompression bonding, and a flange-shaped portion or It is characterized in that a tip portion of a bump formed by projecting thinly from a thin-walled portion is cut into a terminal of the thin-film conductor and metal-joined. The present invention also provides a semiconductor element mounting structure in which a terminal of a semiconductor element is bonded and mounted to a terminal of a thin film conductor on an organic substrate, wherein the structure is bonded to the terminal of the semiconductor element and has a flange portion or a thin portion. The tip of the bump formed by projecting thinly at the tip of the thin film conductor is cut into the terminal of the thin film conductor by thermocompression bonding and metal-bonded.

【０００７】また、本発明は、半導体素子の端子を有機
基板上の薄膜導体の端子に接合実装した半導体素子実装
構造体であって、前記半導体素子の端子上に熱圧着によ
り接合され、且つ鍔状部分若しくは薄肉状部分の先に細
く突き出させて形成したバンプの先端部分を、前記薄膜
導体の端子に熱圧着により食い込ませて金属接合させて
構成したことを特徴とする。また、本発明は、前記半導
体素子実装構造体において、更に、半導体素子と有機基
板との間に設けられた樹脂によって半導体素子を有機基
板に接着して構成したことを特徴とする。また、本発明
は、前記半導体素子実装構造体において、半導体素子を
有機基板に接着する樹脂を、硬化後のヤング率が（５０
０〜２０００）ｋｇｆ／ｍｍ2、熱膨張係数が（２０〜
６０）×１０~6／℃とすることにより、接合部及び半導
体素子の周辺部を補強して、かつ曲げ剛性を持たせて耐
変形性を増したことを特徴とする。The present invention also relates to a semiconductor element mounting structure in which terminals of a semiconductor element are bonded and mounted to terminals of a thin film conductor on an organic substrate. The tip portion of the bump formed by projecting thinly into the tip of the thin portion or the thin portion is cut into the terminal of the thin film conductor by thermocompression bonding and metal-joined. Further, the present invention is characterized in that in the semiconductor element mounting structure, the semiconductor element is further bonded to the organic substrate with a resin provided between the semiconductor element and the organic substrate. Further, according to the present invention, in the semiconductor element mounting structure, the resin for bonding the semiconductor element to the organic substrate has a Young's modulus (50) after curing.
0-2000) kgf / mm 2 , and the coefficient of thermal expansion is (20-2000)
With 60) × 10 ~ 6 / ℃ , to reinforce the peripheral portion of the junction and the semiconductor element, and bending to have a rigid, characterized in that increased resistance to deformation by.

【０００８】また、本発明は、前記半導体素子実装構造
体におけるバンプにおいて、細く突き出させた先端面に
微小な凹凸を有することを特徴とする。また、本発明
は、前記半導体素子実装構造体におけるバンプは、Ａｕ
またはＡｇまたはＰｄまたはＣｕまたはＡｌまたはＳｎ
系はんだ合金を主成分とする金属で形成したことを特徴
とする。また、本発明は、前記半導体素子実装構造体に
おける薄膜導体は、低抵抗のＡｌまたはＣｕを主成分と
する金属で形成したことを特徴とする。また、本発明
は、前記半導体素子実装構造体における薄膜導体の端子
部分の接合面に微小な凹凸を有することを特徴とする。
また、本発明は、前記記載の半導体素子実装構造体を有
することを特徴するＩＣカードである。Further, the present invention is characterized in that the bumps in the semiconductor element mounting structure have minute projections and depressions on a tip end surface protruding finely. Further, according to the present invention, the bump in the semiconductor element mounting structure may be formed of Au.
Or Ag or Pd or Cu or Al or Sn
It is characterized by being formed of a metal containing a base solder alloy as a main component. Further, the present invention is characterized in that the thin film conductor in the semiconductor element mounting structure is formed of a low-resistance metal mainly composed of Al or Cu. Further, the present invention is characterized in that the semiconductor element mounting structure has minute irregularities on a bonding surface of a terminal portion of the thin film conductor.
According to another aspect of the present invention, there is provided an IC card including the above-described semiconductor element mounting structure.

【０００９】また、本発明は、ＩＣカードの基材となる
有機基板と、該有機基板上に設けられ、電力を受信し、
通信の送受信を行うためのアンテナと、端子上に接合さ
れ、且つ鍔状部分若しくは薄肉状部分の先に細く突き出
させて形成したバンプを有し、該バンプの先端部分を、
有機基板上の前記アンテナにつながった薄膜導体の端子
に食い込ませて金属接合させて有機基板に対して実装し
た半導体素子とを備えたことを特徴とする非接触式ＩＣ
カードである。また、本発明は、ＩＣカードの基材とな
る有機基板と、該有機基板上に設けられ、電力を受信
し、通信の送受信を行うためのアンテナと、端子上に熱
圧着により接合され、且つ鍔状部分若しくは薄肉状部分
の先に細く突き出させて形成したバンプを有し、該バン
プの先端部分を、有機基板上の前記アンテナにつながっ
た薄膜導体の端子に熱圧着により食い込ませて金属接合
させて有機基板に対して実装した半導体素子とを備えた
ことを特徴とする非接触式ＩＣカードである。また、本
発明は、前記非接触式ＩＣカードにおいて、更に、半導
体素子と有機基板との間に設けられた樹脂によって半導
体素子を有機基板に接着して構成したことを特徴とす
る。また、本発明は、前記非接触式ＩＣカードにおい
て、半導体素子を有機基板に接着する樹脂を、硬化後の
ヤング率が（５００〜２０００）ｋｇｆ／ｍｍ2、熱膨
張係数が（２０〜６０）×１０~6／℃とすることによ
り、接合部及び半導体素子の周辺部を補強して、かつ曲
げ剛性を持たせて耐変形性を増したことを特徴とする。[0009] The present invention also provides an organic substrate serving as a base material of an IC card, and provided on the organic substrate for receiving power.
An antenna for transmitting and receiving communication, and has a bump joined to the terminal and formed to project thinly to the tip of the flange portion or thin portion, the tip of the bump,
A non-contact type IC comprising: a semiconductor element mounted on an organic substrate by being cut into a terminal of a thin film conductor connected to the antenna on the organic substrate and bonded to the organic substrate.
Card. Further, the present invention provides an organic substrate serving as a base material of an IC card, an antenna provided on the organic substrate, for receiving power, transmitting and receiving communication, and bonded to a terminal by thermocompression bonding, and Metal bumps having a bump formed by projecting thinly from the tip of a flange-shaped portion or a thin-walled portion, and having the tip portion of the bump cut into the terminal of the thin-film conductor connected to the antenna on the organic substrate by thermocompression bonding. And a semiconductor device mounted on an organic substrate. Further, the present invention is characterized in that, in the non-contact type IC card, the semiconductor element is further bonded to the organic substrate with a resin provided between the semiconductor element and the organic substrate. Further, according to the present invention, in the non-contact type IC card, the resin for bonding the semiconductor element to the organic substrate has a cured Young's modulus of (500 to 2000) kgf / mm 2 and a thermal expansion coefficient of (20 to 60). By setting the temperature to × 10 to 6 / ° C., the joint portion and the peripheral portion of the semiconductor element are reinforced, and flexural rigidity is provided to increase deformation resistance.

【００１０】また、本発明は、前記非接触式ＩＣカード
において、半導体素子およびアンテナを保護膜で被覆し
て構成したことを特徴とする。また、本発明は、端子上
に接合され、且つ鍔状部分若しくは薄肉状部分の先に細
く突き出させて形成したバンプを有する半導体素子を、
該バンプの先端部分を、小形の有機基板上に外部端子と
して設けられた薄膜導体の端子に食い込ませて金属接合
させて構成した半導体素子実装構造体を、ＩＣカードの
基材となる有機基板上に形成された窪み若しくは凹部に
埋め込んで構成したことを特徴とする接触式ＩＣカード
である。また、本発明は、前記接触式ＩＣカードにおけ
る半導体素子実装構造体において、更に、半導体素子と
小形の有機基板との間に設けられた樹脂によって半導体
素子を小形の有機基板に接着して構成したことを特徴と
する。また、本発明は、前記接触式ＩＣカードにおける
半導体素子実装構造体において、半導体素子を樹脂で被
覆若しくは封止して形成することを特徴とする。Further, the present invention is characterized in that in the non-contact type IC card, a semiconductor element and an antenna are covered with a protective film. Further, the present invention provides a semiconductor element having a bump joined to a terminal and formed by projecting thinly to the tip of a flange portion or a thin portion.
A semiconductor element mounting structure formed by cutting a tip portion of the bump into a thin-film conductor terminal provided as an external terminal on a small-sized organic substrate and performing metal bonding is formed on an organic substrate serving as a base material of an IC card. A contact type IC card characterized by being embedded in a dent or a concave portion formed in the contact IC card. Further, according to the present invention, in the semiconductor element mounting structure of the contact type IC card, the semiconductor element is further bonded to the small organic substrate by a resin provided between the semiconductor element and the small organic substrate. It is characterized by the following. Further, according to the present invention, in the semiconductor element mounting structure of the contact type IC card, the semiconductor element is formed by covering or sealing a resin with a resin.

【００１１】また、本発明は、半導体素子の端子を有機
基板上の薄膜導体の端子に接合実装した半導体素子実装
構造体の製造方法であって、前記半導体素子の端子に熱
圧着して接合させながら鍔状部分若しくは薄肉状部分の
先に細く突き出させた形状のバンプを形成するバンプ形
成工程と、該バンプ形成工程で半導体素子の端子に形成
したバンプと有機基板上の薄膜導体の端子とを相対的に
位置決めして熱圧着することによりバンプの先端部分
を、前記薄膜導体の端子に食い込ませて金属接合させて
有機基板に対して半導体素子を実装する実装工程とを有
することを特徴とする半導体素子実装構造体の製造方法
である。また、本発明は、半導体素子の端子を有機基板
上の薄膜導体の端子に接合実装した半導体素子実装構造
体の製造方法であって、金属線材の先を溶融して球状化
し、該球状化された部分と前記半導体素子の端子とを相
対的に位置決めして球状化された部分を前記半導体素子
の端子に熱圧着して接合させながら鍔状若しくは薄肉状
に成形して金属線材を引っ張って該鍔状部分若しくは薄
肉状部分の先に細く突き出させた形状のバンプを形成す
るバンプ形成工程と、該バンプ形成工程で半導体素子の
端子に形成したバンプと有機基板上の薄膜導体の端子と
を相対的に位置決めして熱圧着することによりバンプの
先端部分を、前記薄膜導体の端子に食い込ませて金属接
合させて有機基板に対して半導体素子を実装する実装工
程とを有することを特徴とする半導体素子実装構造体の
製造方法である。The present invention also relates to a method of manufacturing a semiconductor element mounting structure in which terminals of a semiconductor element are bonded and mounted to terminals of a thin-film conductor on an organic substrate. A bump forming step of forming a thin bump protruding from the tip of the flange-shaped portion or the thin-walled portion, and the bump formed on the terminal of the semiconductor element and the terminal of the thin film conductor on the organic substrate in the bump forming step. A mounting step of mounting the semiconductor element on the organic substrate by making the tip of the bump bite into the terminal of the thin-film conductor and performing metal bonding by performing relative positioning and thermocompression bonding. This is a method for manufacturing a semiconductor element mounting structure. Further, the present invention is a method of manufacturing a semiconductor element mounting structure in which terminals of a semiconductor element are bonded and mounted to terminals of a thin-film conductor on an organic substrate, wherein the tip of a metal wire is melted into a spherical shape, and the spherical shape is formed. The portion formed into a flange or a thin shape is formed by positioning the part and the terminal of the semiconductor element relative to each other by thermocompression bonding to the terminal of the semiconductor element and joining the terminal to the terminal of the semiconductor element. A bump forming step of forming a bump having a shape that protrudes thinly from a flange-shaped portion or a thin-walled portion, and the bump formed on the terminal of the semiconductor element in the bump forming step and the terminal of the thin-film conductor on the organic substrate are relatively opposed to each other. And mounting the semiconductor element to the organic substrate by cutting the tip of the bump into the terminal of the thin-film conductor by metal bonding by thermally positioning and thermocompression bonding. That is a method of manufacturing a semiconductor device mounting structure.

【００１２】また、本発明は、前記半導体素子実装構造
体の製造方法における実装工程において、半導体素子と
有機基板との間に樹脂を置くことによって半導体素子を
有機基板に接着して固定することを特徴とする。また、
本発明は、半導体素子の端子を有機基板上の薄膜導体の
端子に接合実装した半導体素子実装構造体の製造方法で
あって、前記半導体素子の端子に熱圧着して接合させな
がら鍔状部分若しくは薄肉状部分の先に細く突き出させ
た形状のバンプを形成するバンプ形成工程と、前記有機
基板上の薄膜導体の端子部分の表面に微小な凹凸を形成
する凹凸形成工程と、前記バンプ形成工程で半導体素子
の端子に形成したバンプと前記凹凸形成工程で表面に微
小な凹凸を形成した薄膜導体の端子とを相対的に位置決
めして熱圧着することによりバンプの先端部分を、前記
薄膜導体の端子に食い込ませて金属接合させて有機基板
に対して半導体素子を実装する実装工程とを有すること
を特徴とする半導体素子実装構造体の製造方法である。
また、本発明は、Ａｌ、Ｃｕ等の箔導体を有するＰＥＴ
樹脂等の有機基板を用い、半導体素子側の端子構成はＡ
ｌ等の導体（端子）上にＡｕ等の金属をワイヤボールバ
ンピングしたバンプで構成する。端子数が少なく、新た
なメタライズが不要なため低コストの端子形成が可能と
なる。有機基板上のＡｌ等の箔導体の硬さに比べ、Ａｕ
等のバンプの硬さは一般に小さいため、両者の界面での
新生面の接触面積が小さく、かつアンカー効果も小さく
なる弱点があるので、意図的にＡｕ等のバンプの硬さを
増して、Ａｌ等の導体の中に食い込ませながら、変形さ
せて局部的に金属接合し、熱圧着する接合が望ましい。
なお、Ａｕ線以外にＡｕ線より硬いＡｇ線、Ｐｄ線、Ｃ
ｕ線、Ａｌ線等の適用も可能である。Ｃｕ導体の場合
は、若干コスト高になるが予め前工程でＣｕ端子部に多
数の突起を設けることが可能で、バンプを圧接すること
により、接合を確実にできて、量産化が可能となる。Further, the present invention provides a method of manufacturing a semiconductor device mounting structure, wherein in a mounting step, a resin is placed between the semiconductor device and the organic substrate to bond and fix the semiconductor device to the organic substrate. Features. Also,
The present invention is a method for manufacturing a semiconductor element mounting structure in which a terminal of a semiconductor element is bonded and mounted to a terminal of a thin film conductor on an organic substrate. A bump forming step of forming a bump having a shape protruding thinly at the tip of the thin portion; a bump forming step of forming minute bumps on the surface of the terminal portion of the thin film conductor on the organic substrate; and the bump forming step. The bumps formed on the terminals of the semiconductor element and the terminals of the thin film conductor having minute irregularities formed on the surface in the irregularity forming step are positioned relative to each other and thermocompression-bonded, so that the tips of the bumps are connected to the terminals of the thin film conductors. And mounting the semiconductor element on the organic substrate by metal bonding and metal bonding to the organic substrate.
Further, the present invention relates to a PET having a foil conductor such as Al and Cu.
The terminal configuration on the semiconductor element side is A
A conductor (terminal) such as 1 is made of a bump made by wire ball bumping a metal such as Au. Since the number of terminals is small and no new metallization is required, low-cost terminal formation is possible. Compared to the hardness of foil conductor such as Al on organic substrate, Au
In general, the hardness of bumps such as Au is small, so the contact area of the new surface at the interface between them is small, and there is a weak point that the anchor effect is also small. It is desirable to form a metal joint locally while deforming while being cut into the conductor, and to perform thermocompression bonding.
In addition to the Au line, Ag lines, Pd lines, C
Application of a u-line, an Al line, or the like is also possible. In the case of a Cu conductor, the cost is slightly higher, but a large number of protrusions can be provided in advance in the Cu terminal portion in the previous step, and by pressing the bumps, bonding can be surely performed and mass production can be realized. .

【００１３】また、本発明は、Ａｕ線またはＡｇ線また
はＰｄ線またはＣｕ線またはＡｌ線またはＳｎ系はんだ
合金の細線を半導体素子の端子上にボールバンピングし
て該ＡｕまたはＡｇまたはＰｄまたはＣｕまたはＡｌま
たはＳｎ系はんだ合金のボールバンプの引きちぎった先
端を鋭くしてなるＳｉチップ等の半導体素子の裏面を加
熱機能を持ったキュピラリーに吸引させ、該半導体素子
のＡｕまたはＡｇまたはＰｄまたはＣｕまたはＡｌまた
はＳｎ系はんだ合金のボール先端を予めＡｌ圧延箔を接
着して導体を形成した有機基板端子に位置決めし、粘度
の比較的高い熱硬化性、熱可塑性、もしくは光硬化性樹
脂を滴下、もしくは板状に加工した該樹脂を載置した上
から、半導体素子を介して該有機基板側のＡｌ圧延箔導
体の端子上に該バンプの先端を押しつけ、樹脂を押しの
けてＡｕまたはＡｇまたはＰｄまたはＣｕまたはＡｌま
たはＳｎ系はんだ合金とＡｌとの塑性変形により、新生
面を出した金属接合を形成させたことを特徴とする非接
触式、近接型薄型ＩＣカード実装である。また、本発明
は、Ａｕ、Ａｌ、Ｐｄ、ＡｇもしくはＳｎ系はんだ合金
の細線を素子の端子上にボールバンピングして該Ａｕボ
ールバンプの高さを均一にレベリング後、Ｓｉチップ等
の半導体素子の裏面を加熱機能を持ったキュピラリーに
吸引させ、該チップ上の該レベリングしたバンプを、予
めＣｕ箔の端子接合部に多数の針状の突起を形成し、そ
の上をＮｉ／Ａｕめっきを施して導体を形成した有機基
板端子に位置決めし、粘度の比較的高い熱硬化性、熱可
塑性、もしくは光硬化性樹脂を滴下、もしくは板状に加
工した該樹脂を載置した上から、該チップを介して該有
機基板側の該Ｃｕ導体の端子上に該バンプの先端を押し
つけ、樹脂を押しのけてＡｕと針状Ａｕとの塑性変形に
より、新生面を出した金属接合を形成させたことを特徴
とする非接触式、近接型薄型ＩＣカード実装である。Further, according to the present invention, an Au wire, an Ag wire, a Pd wire, a Cu wire, an Al wire, or a thin wire of an Sn-based solder alloy is ball-bumped on a terminal of a semiconductor element to form the Au, Ag, Pd, Cu, or Cu. A back surface of a semiconductor element such as a Si chip having a sharpened tip of a ball bump made of Al or Sn-based solder alloy is sucked into a capillary having a heating function, and Au, Ag, Pd, Cu, or Al of the semiconductor element is sucked. Alternatively, the tip of a Sn-based solder alloy ball is positioned on an organic substrate terminal on which a conductor is formed by previously bonding an Al-rolled foil, and a thermosetting, thermoplastic, or photo-curable resin having a relatively high viscosity is dropped, or The resin processed into a shape is placed on the Al-rolled foil conductor terminal on the organic substrate side via a semiconductor element. Non-contact type characterized by forming a metal bond with a new surface by plastic deformation of Au or Ag or Pd or Cu or Al or Sn-based solder alloy and Al by pressing the tip of the resin and pushing away the resin. And a proximity thin IC card mounting. Also, the present invention provides a method of manufacturing a semiconductor device such as a Si chip after flattening the height of the Au ball bump by ball-bumping a thin wire of Au, Al, Pd, Ag or Sn-based solder alloy on a terminal of the device. The back surface is sucked into a capillary having a heating function, and the leveled bumps on the chip are previously formed with a large number of needle-like protrusions at terminal joints of a Cu foil, and Ni / Au plating is performed thereon. Positioned on the organic substrate terminal on which the conductor was formed, dropped a thermosetting, thermoplastic, or photo-curable resin with a relatively high viscosity, or placed the resin processed into a plate shape, And pressing the tip of the bump onto the terminal of the Cu conductor on the organic substrate side, and pushing away the resin to form a metal bond having a new surface by plastic deformation of Au and needle-like Au. Non-contact, a proximity thin IC card implementation.

【００１４】また、本発明は、前記非接触式、近接型薄
型ＩＣカード実装において、樹脂は硬化後のヤング率が
（５００〜２０００）ｋｇｆ／ｍｍ2、熱膨張係数が
（２０〜６０）×１０~6／℃とすることにより、接合部
及びチップ周辺部を補強して、かつ曲げ剛性を持たせて
耐変形性を増したことを特徴とする。また、本発明は、
前記非接触式、近接型薄型ＩＣカード実装において、前
記有機基板として熱可塑性のＰＥＴ、ＰＩ、液晶ポリマ
ー等のいずれかであることを特徴とする。また、本発明
は、前記非接触式、近接型薄型ＩＣカード実装におい
て、ボールバンプの引きちぎった部分がＡｌ導体より同
等か硬い構成にして、Ａｌ導体へのくいこみ深さを増し
て金属間接合を強くしたことを特徴とする。また、本発
明は、前記非接触式、近接型薄型ＩＣカード実装におい
て、半導体素子の厚さを２００μｍ以下にしたことを特
徴とする。また、本発明は、前記非接触式、近接型薄型
ＩＣカード実装において、細線をボールバンピング後
に、細線上にＡｇペーストもしくはＡｕペーストを転写
したことを特徴とする。Further, according to the present invention, in the non-contact type, proximity type thin IC card mounting, the resin has a cured Young's modulus of (500 to 2000) kgf / mm 2 and a thermal expansion coefficient of (20 to 60) ×. By setting the temperature to 10 to 6 / ° C., the joint portion and the peripheral portion of the chip are reinforced, and flexural rigidity is provided to increase the deformation resistance. Also, the present invention
In the non-contact type, proximity type thin IC card mounting, the organic substrate is made of any one of thermoplastic PET, PI, liquid crystal polymer and the like. Further, in the present invention, in the non-contact type, proximity type thin IC card mounting, the torn portion of the ball bump is configured to be equal or harder than the Al conductor, and the depth of penetration into the Al conductor is increased to achieve the metal-to-metal bonding. It is characterized by being strengthened. Further, the present invention is characterized in that in the non-contact type, proximity type thin IC card mounting, the thickness of the semiconductor element is set to 200 μm or less. Further, the present invention is characterized in that, in the non-contact type, proximity type thin IC card mounting, an Ag paste or an Au paste is transferred onto the fine wire after ball bumping the fine wire.

【００１５】以上説明したように、前記構成によれば、
簡素化実装で薄型化を図ると共に、低コスト化を実現す
ることができる。また、前記構成によれば、有機基板上
の導体抵抗の少ないＡｌ、Ｃｕ等の薄膜導体の端子に対
して半導体素子を間隙を非常に狭めてフラックスレスで
接合実装することが可能となり、電磁特性が優れた高感
度を有する非接触式のＩＣカードをコスト低減をはかっ
て製造することができる。As described above, according to the above configuration,
It is possible to achieve a reduction in thickness and a reduction in cost while simplifying mounting. Further, according to the above configuration, it is possible to extremely narrow the gap between the semiconductor element and the terminal of the thin-film conductor such as Al or Cu on the organic substrate and to mount the semiconductor element in a fluxless manner. However, a non-contact type IC card having excellent high sensitivity can be manufactured at a reduced cost.

【００１６】[0016]

【発明の実施の形態】本発明に係るＩＣチップをポリエ
チレンテレフタレート（ＰＥＴ）樹脂、ポリイミド（Ｐ
Ｉ）樹脂、液晶ポリマー等の有機基板（プラスチック製
基板）に実装して接触式または近接型薄型ＩＣカードを
形成する実施の形態について図面を用いて説明する。図
１（ａ）、（ｂ）、（ｃ）には、Ａｕ、Ａｇ、Ｐｄ、Ｃ
ｕ、Ａｌ、Ｓｎ系はんだ合金等のボールバンピングプロ
セスを示す。まず、図１（ａ）に示すように、クランパ
ー３で固定したＡｕ、Ａｇ、Ｐｄ、Ｃｕ、Ａｌ、Ｓｎ系
はんだ合金等のワイヤ２の先端を水素炎で加熱溶融させ
て表面張力によってＡｕ、Ａｇ、Ｐｄ、Ｃｕ、Ａｌ、Ｓ
ｎ系はんだ合金等のボール１を形成する。特に、Ａｕの
ワイヤの場合軟らかいので、Ｓｉ等を添加することによ
って硬くしたワイヤを用いることも可能である。次に、
図１（ｂ）に示すように、ボンディングステージ１０上
に載置されたＳｉチップ等のＬＳＩチップ（半導体素
子）５上に並設された複数のＡｌ等の導体の端子６の
内、所望の端子６とボール１とを、例えばボンディング
ステージ１０またはクランパ３も含めてキャピラリー４
を位置制御することにより相対的にＸ−Ｙ軸方向に位置
決めし、この位置決めされたボール１を所望の端子６上
にキャピラリー４で超音波を印加して熱圧着により接合
する。なお、このときワイヤ２はクランパー３からは開
放されている。また、ボールのバンピング形状は、キャ
ピラリー４の先端の形状と熱圧着時の加圧力、温度、時
間等とによって決められる。また、所望の端子６とボー
ル１とを位置決めする際、端子の位置を光学的に認識し
ても良い。DESCRIPTION OF THE PREFERRED EMBODIMENTS An IC chip according to the present invention is made of polyethylene terephthalate (PET) resin and polyimide (P).
I) An embodiment in which a contact type or proximity type thin IC card is formed by mounting on an organic substrate (plastic substrate) such as a resin or a liquid crystal polymer will be described with reference to the drawings. FIGS. 1A, 1B, and 1C show Au, Ag, Pd, and C, respectively.
1 shows a ball bumping process for u, Al, Sn-based solder alloys and the like. First, as shown in FIG. 1A, the tip of a wire 2 such as Au, Ag, Pd, Cu, Al, or Sn-based solder alloy fixed by a clamper 3 is heated and melted by a hydrogen flame, and Au, Ag, Pd, Cu, Al, S
A ball 1 of an n-type solder alloy or the like is formed. In particular, since the Au wire is soft, a wire hardened by adding Si or the like can be used. next,
As shown in FIG. 1B, a desired one of a plurality of conductor terminals 6 of Al or the like arranged in parallel on an LSI chip (semiconductor element) 5 such as a Si chip mounted on a bonding stage 10. The terminal 6 and the ball 1 are connected to the capillary 4 including the bonding stage 10 or the clamper 3, for example.
Is positioned relatively in the X-Y axis direction by controlling the position, and the positioned ball 1 is bonded onto a desired terminal 6 by applying ultrasonic waves to the desired terminal 6 by thermocompression bonding. At this time, the wire 2 is released from the clamper 3. The bumping shape of the ball is determined by the shape of the tip of the capillary 4 and the pressure, temperature, time, and the like during thermocompression bonding. When positioning the desired terminal 6 and the ball 1, the position of the terminal may be optically recognized.

【００１７】次に、図１（ｃ）に示すように、キャピラ
リー４を上昇させて逃がし、ワイヤクランパー３でワイ
ヤ２をクランプして引上げることによって接合部分（バ
ンプ部分）７は、ワイヤ２の細くなったネック部で引き
ちぎられ、鍔状部分または薄肉状部分７ａの先に細く突
き出した部分７ｂが形成され、その先端に微小な凹凸が
生じた状態となる。ところで、複数のＡｌ等の導体の端
子６が、Ｓｉチップ等のＩＣチップ５上に並設（配設）
されているので、上記動作を繰り返すことによってこれ
ら複数の端子６に対して先端に微小な凹凸が生じたボー
ルバンプ部分（接合部分）７が形成されることになる。
図２には、Ｓｉチップ等のＬＳＩチップ（半導体素子）
５のＡｌ等の導体の端子６上に、Ａｕ、Ａｇ、Ｐｄ、Ｃ
ｕ、Ａｌ、Ｓｎ系はんだ合金等のボールバンピング７さ
れた形状の拡大を示す。ところで、ＩＣカードに実装さ
れるＬＳＩチップ（半導体素子）５においては端子数が
少ないことから、上記ボールバンプ部分（接合部分）７
を形成する際、ピッチ的な制約を受けることはない。Next, as shown in FIG. 1C, the capillary 4 is raised and released, and the wire 2 is clamped and pulled up by the wire clamper 3 so that the bonding portion (bump portion) 7 The narrowed neck portion is torn off, and a thinly protruding portion 7b is formed at the tip of the flange-shaped portion or the thin-walled portion 7a. By the way, a plurality of conductor terminals 6 such as Al are arranged (arranged) on an IC chip 5 such as a Si chip.
Therefore, by repeating the above operation, a ball bump portion (joining portion) 7 having fine irregularities at the tips is formed for the plurality of terminals 6.
FIG. 2 shows an LSI chip (semiconductor element) such as a Si chip.
5, Au, Ag, Pd, C
7 shows an enlarged shape of a ball bumped 7 of u, Al, Sn-based solder alloy or the like. By the way, the LSI chip (semiconductor element) 5 mounted on the IC card has a small number of terminals.
Are not restricted by pitch.

【００１８】しかしながら、Ａｌ等の導体上の端子部６
に直径２５μｍ程度のＡｕ線等のボールバンピングを行
う際、ネック部の厚さｔをできるだけ小さくして、ボー
ル端子による全体の厚さＴの影響が極力でないようにす
る必要がある。従って、つぶれて広がった鍔状部分また
は薄肉状部分７ａのボール径Ｄを約８０μｍとし、線を
引きちぎった時の細くなって突き出た部分７ｂの高さＴ
（Ａｌ等の導体面から）を約７０μｍとし、引きちぎっ
た線の先端部分７ｂを凸状に突きでた形状とすることに
よって、ネック部の厚さｔをできるだけ小さくすること
ができる。なお、ボールバンプ部分７は、Ａｌ、Ｃｕ等
の導体１２に押し当てたときに座屈しない程度の突出し
長さとする。また、図２（ｂ）に示す如く、ボールバン
プ部分７を段階的に変形させることによって、座屈させ
ずに突起部の突き当て効果を増すことが可能となる。と
ころで、ボールバンプ部分７の先端８がレベリングされ
ていない場合には、Ａｌ等の箔導体（薄膜導体）への突
入を阻害するので望ましくない。従って、成形されたボ
ールバンプ部分７の先端８がとがった状態で、できる限
りレベリングされていることが望ましい。Ａｌ等の圧延
箔導体１２への熱圧着時にはすべての端子は接触して熱
を伴って塑性変形するが、先端がとがった状態でレベリ
ングされていることが接合のばらつきを無くすことから
望ましい。レベリングの方法としては、例えば、ボンデ
ィングステージ１０と平行に保たれた（支持された）板
状体を成形されたボールバンプ部分７の先端８に押し付
ける方法がある。なお、ＬＳＩチップ５の厚さは、でき
る限り薄型にしたいことから、２００μｍ程度以下を対
象とすることにより、４５０μｍ程度以下のＩＣカード
を目標として実現することができる。特に、４５０μｍ
程度より薄い２００μｍ程度の超薄型ＩＣカードとする
ためには、Ｓｉチップ等のＬＳＩチップ５に対してエッ
チング加工や研磨加工等を施して８０μｍ程度レベルの
厚さにする必要がある。However, the terminal 6 on a conductor such as Al
When performing ball bumping of Au wire or the like having a diameter of about 25 μm, it is necessary to minimize the thickness t of the neck portion so as to minimize the influence of the overall thickness T due to the ball terminals. Therefore, the ball diameter D of the crushed and expanded flange-shaped portion or the thin-walled portion 7a is set to about 80 μm, and the height T of the thinned and protruded portion 7b when the line is cut off.
The thickness t of the neck portion can be made as small as possible by making the length (from the conductor surface of Al or the like) about 70 μm and making the tip portion 7b of the torn line protrude in a convex shape. Note that the ball bump portion 7 has a protruding length that does not buckle when pressed against the conductor 12 such as Al or Cu. In addition, as shown in FIG. 2B, by gradually deforming the ball bump portion 7, it is possible to increase the effect of hitting the protrusion without buckling. By the way, if the tip 8 of the ball bump portion 7 is not leveled, it is not desirable because it prevents entry into a foil conductor (thin film conductor) such as Al. Therefore, it is desirable that the tip 8 of the formed ball bump portion 7 is leveled as much as possible in a pointed state. At the time of thermocompression bonding to the rolled foil conductor 12 of Al or the like, all the terminals come into contact and are plastically deformed with heat. However, it is desirable that the terminals are leveled in a sharpened state in order to eliminate variations in joining. As a leveling method, for example, there is a method of pressing a plate-shaped body kept (supported) in parallel with the bonding stage 10 against the tip 8 of the molded ball bump portion 7. Since the thickness of the LSI chip 5 is desired to be as thin as possible, it is possible to realize an IC card of about 450 μm or less by targeting about 200 μm or less. In particular, 450 μm
In order to form an ultra-thin IC card having a thickness of about 200 μm, which is thinner than that of the LSI chip, it is necessary to perform etching or polishing on the LSI chip 5 such as a Si chip to a thickness of about 80 μm.

【００１９】また、耐曲げ性、Ｓｉチップ等のＬＳＩチ
ップ５へのボンディング時の負担を考慮するとＳｉチッ
プ等のＬＳＩチップ５の厚さが２００μｍ位であれば特
にプロセス上の問題は少ない。なお、超薄型ＩＣカード
の場合にはＳｉチップ等のＬＳＩチップ上面に補強板を
接着することにより、曲げによるＬＳＩチップの割れを
防止することができる。次に、ボールバンプ部分７が形
成されたＬＳＩチップ５を、熱可塑性のポリエチレンテ
レフタレート（ＰＥＴ）樹脂、ポリイミド（ＰＩ）樹
脂、液晶ポリマー等の有機基板１４上の低抵抗なＡｌ、
Ｃｕ等の薄膜導体１２に実装する実施の形態について、
図３〜図６を用いて説明する。即ち、ＩＣカードを構成
する有機基板１４上に設けられる薄膜導体１２として、
Ａｌ、Ｃｕ等で形成するのは、薄膜導体を低抵抗化し
て、電力または信号の伝送損失を低減するためである。
まず、ＩＣカードを構成するＡｌ、Ｃｕ等の圧延箔導体
（薄膜導体）１２を接着剤１３等で接着しまたは成膜す
ることによって固着したポリエチレンテレフタレート
（ＰＥＴ）樹脂等の有機基板１４をボンディングステー
ジ２０上に載置する。そして、図３（ａ）に示すよう
に、薄くエッチング加工や研磨加工され、更にＳｉ等が
添加された硬めのＡｕ線を用いて端子６に、ボールバン
プ部分７が形成されたＳｉチップ等のＬＳＩチップ５
を、加熱された支持部材（キャビラリー部材）１１に真
空吸引させる。次いで、支持部材１１に真空吸着若しく
は電磁吸着されたＬＳＩチップ５とボンディングステー
ジ２０上に載置された有機基板１４とを相対的にＸ−Ｙ
軸方向に位置合わせをし、この位置合わせされた状態
で、支持部材１１を所望の圧力で押し下げることによっ
て、図３（ｂ）に示す如く加熱されているボールバンプ
部分７の先端部分がＡｌ、Ｃｕ等の箔導体（薄膜導体）
１２の端子部分に食い込んで熱圧着して接合されること
になる。たとえば、ＰＥＴ樹脂基板１４の耐熱性は約１
５０℃であるため、該基板温度を余り上げることができ
ないので、キャピラリー部材１１側から熱を供給するこ
とで、ボールバンプ部分７に対して３００℃程度レベル
の温度を保つことができる。そして、支持部材１１の真
空吸着若しくは電磁吸着をやめて上昇させることによっ
て、ＬＳＩチップ５の端子６と有機基板上の箔導体（薄
膜導体）１２との間を７〜３０μｍ程度にして接合され
たものが得られる。そして、被覆が必要な部分について
樹脂で被覆することによってＩＣカードが得られること
になる。In consideration of the bending resistance and the load at the time of bonding to the LSI chip 5 such as a Si chip, if the thickness of the LSI chip 5 such as a Si chip is about 200 μm, there is no particular problem in the process. In the case of an ultra-thin IC card, by bonding a reinforcing plate to the upper surface of an LSI chip such as a Si chip, cracking of the LSI chip due to bending can be prevented. Next, the LSI chip 5 on which the ball bump portions 7 are formed is coated with a low-resistance Al on an organic substrate 14 such as a thermoplastic polyethylene terephthalate (PET) resin, a polyimide (PI) resin, or a liquid crystal polymer.
Regarding an embodiment of mounting on a thin film conductor 12 such as Cu,
This will be described with reference to FIGS. That is, as the thin film conductor 12 provided on the organic substrate 14 constituting the IC card,
The reason why the thin film conductor is formed of Al, Cu, or the like is to reduce the resistance of the thin film conductor and reduce transmission loss of electric power or signal.
First, an organic substrate 14 made of polyethylene terephthalate (PET) resin or the like, which is fixed by bonding or forming a rolled foil conductor (thin film conductor) 12 of Al, Cu, or the like constituting an IC card with an adhesive 13 or the like. 20. Then, as shown in FIG. 3 (a), a terminal 6 is formed by etching or polishing a thin Au wire to which a ball bump portion 7 is formed using a hard Au wire to which Si or the like is further added. LSI chip 5
Is sucked into a heated support member (cavity member) 11 by vacuum suction. Next, the LSI chip 5 vacuum-adsorbed or electromagnetically adsorbed to the support member 11 and the organic substrate 14 mounted on the bonding stage 20 are relatively moved in XY.
After the alignment is performed in the axial direction and the support member 11 is pressed down at a desired pressure in this aligned state, the tip of the heated ball bump portion 7 is made of Al, as shown in FIG. Cu or other foil conductor (thin film conductor)
Twelve terminal portions are joined by thermocompression bonding. For example, the heat resistance of the PET resin substrate 14 is about 1
Since the substrate temperature is 50 ° C., the substrate temperature cannot be raised so much. Therefore, by supplying heat from the capillary member 11 side, a temperature of about 300 ° C. can be maintained for the ball bump portion 7. Then, the terminal 6 of the LSI chip 5 and the foil conductor (thin film conductor) 12 on the organic substrate are joined to each other so as to be about 7 to 30 μm by stopping the vacuum or electromagnetic adsorption of the support member 11 and raising the support. Is obtained. Then, an IC card can be obtained by coating a portion requiring coating with a resin.

【００２０】次に、Ｓｉチップ等のＬＳＩチップ５を、
ＰＥＴ樹脂等の有機基板（プラスチック製基板）１４の
Ａｌ、Ｃｕ等の箔導体１２の端子に同時接続、接着する
プロセスの第１の実施例について図４を用いて説明す
る。この第１の実施例においては、瞬時に接合し接着す
る必要があるため、Ｓｉチップ等のＬＳＩチップ５下
に、予め、粘度が比較的に高く、瞬時に硬化しやすいエ
ポキシ樹脂、フェノール樹脂、ポリイミド樹脂、シリコ
ーン樹脂等の熱硬化性樹脂、ポリフェニレンサルファイ
ト（ＰＰＳ）樹脂、ポリエーテルスルフォン（ＰＥＳ）
樹脂、ポリエチレンテレフタレート（ＰＥＴ）樹脂等の
熱可塑性樹脂、光若しくは紫外線硬化型樹脂１５ａを、
図４（ａ）に示すように供給しておいて、次に、図４
（ｂ）に示すように加熱された支持部材１１を所望の圧
力で押し下げてＬＳＩチップ５を加圧することによっ
て、図４（ｃ）に示すようにボールバンプ部分７の尖っ
た先端を端子１２に食い込ませることによる熱圧着接続
と樹脂１５ａによる接着とが同時に行われ、ＬＳＩチッ
プ５の端子６と有機基板１４の薄膜導体１２の端子との
間隙を７〜３０μｍ程度に著しく狭くしてＬＳＩチップ
５を有機基板１４の薄膜導体１２に対して接合実装する
ことが可能となる。Next, an LSI chip 5 such as a Si chip is
A first embodiment of a process of simultaneously connecting and bonding to terminals of a foil conductor 12 of Al, Cu or the like on an organic substrate (plastic substrate) 14 such as a PET resin will be described with reference to FIG. In the first embodiment, since it is necessary to instantaneously join and bond, under the LSI chip 5 such as a Si chip, an epoxy resin, a phenol resin and Thermosetting resin such as polyimide resin and silicone resin, polyphenylene sulfide (PPS) resin, polyether sulfone (PES)
Resin, thermoplastic resin such as polyethylene terephthalate (PET) resin, or light or ultraviolet curable resin 15a,
As shown in FIG.
By pressing down the heated support member 11 at a desired pressure as shown in FIG. 4B and pressing the LSI chip 5, the sharp tip of the ball bump portion 7 is connected to the terminal 12 as shown in FIG. The thermocompression connection by the biting and the bonding by the resin 15a are performed at the same time, and the gap between the terminal 6 of the LSI chip 5 and the terminal of the thin film conductor 12 of the organic substrate 14 is remarkably narrowed to about 7 to 30 μm. Can be bonded and mounted to the thin film conductor 12 of the organic substrate 14.

【００２１】なお、樹脂１５ａとして、光若しくは紫外
線硬化型樹脂を用いる場合には、同時に光若しくは紫外
線を樹脂部１５ａに照射する必要がある。また、支持部
材（キャピラリー部材）１１自体を３００℃に近い高温
に加熱しておくことにより、この熱がＬＳＩチップ５を
介して樹脂１５ａの接着と熱伝導に優れるＡｌ等の導体
１２とに伝わり、ＰＥＴ樹脂等で形成された有機基板１
４への熱影響を最小限に抑制することが可能となる。ま
た、この第１の実施例によれば、Ａｌ等の箔導体１２と
Ａｕ等のボールバンプ部分７とを界面で完全に接合させ
る必要はなく、局所的に金属学的に接合個所があれば、
後は樹脂１５ａの接着効果で接合部を補強することが可
能となる。また、この第１の実施例において、支持部材
（キャピラリー部材）１１の温度が高く、接合部に投入
される温度が高い程接合が完全になるけれども、ＰＥＴ
樹脂等の有機基板１４への熱影響で制約されることにな
る。When a light or ultraviolet curable resin is used as the resin 15a, it is necessary to simultaneously irradiate the resin portion 15a with light or ultraviolet. Further, by heating the support member (capillary member) 11 itself to a high temperature close to 300 ° C., this heat is transmitted to the resin 15 a through the LSI chip 5 and to the conductor 12 made of Al or the like which is excellent in heat conduction. , PET substrate and other organic substrate 1
4 can be minimized. According to the first embodiment, it is not necessary to completely join the foil conductor 12 of Al or the like and the ball bump portion 7 of Au or the like at the interface. ,
After that, it becomes possible to reinforce the joint by the adhesive effect of the resin 15a. Further, in the first embodiment, although the temperature of the support member (capillary member) 11 is high and the temperature applied to the bonding portion is high, the bonding becomes more complete.
It is limited by the thermal influence of the resin or the like on the organic substrate 14.

【００２２】しかしながら、上記第１の実施例によれ
ば、高信頼性を維持するレベルの接続は十分確保できる
ことが分かった。However, according to the first embodiment, it has been found that a connection at a level that maintains high reliability can be sufficiently ensured.

【００２３】なお、上記接合において、Ａｌ、Ｃｕ等の
箔導体１２よりもボールバンプ部分７の方が硬いこと
が、接合メカニズムから望ましく、この点で、純度を落
して硬くしたＡｕ線を用いるよりはＰｄ、Ａｇ線等を用
いる方が向いている。ただしＳｉチップ等のＬＳＩチッ
プ５への機械的強度の影響を考えると、余り線を硬くす
ることもできないことと、材料の組合せによる接合界面
での拡散を考慮すると上記の線材がここでは望ましく、
特に温度、加圧力、相互の硬さ等が接合のポイントとな
る。また、樹脂１５ａの硬化を含めて３０秒以内での接
続、接着が望まれる。硬化型の樹脂の場合、短時間での
完全硬化は困難なため、オフラインでまとめて硬化させ
ることににより短時間でのプロセスを可能にする。In the above-mentioned joining, it is desirable from the joining mechanism that the ball bump portions 7 are harder than the foil conductors 12 of Al, Cu or the like. Is more suitable for using Pd, Ag lines or the like. However, considering the influence of the mechanical strength on the LSI chip 5 such as a Si chip, the above-mentioned wire is desirable here in view of the fact that the extra line cannot be hardened and the diffusion at the bonding interface due to the combination of materials is taken into consideration.
In particular, temperature, pressure, mutual hardness, etc. are the points of joining. In addition, connection and adhesion within 30 seconds including curing of the resin 15a are desired. In the case of a curable resin, it is difficult to completely cure the resin in a short period of time.

【００２４】次に、Ｓｉチップ等のＬＳＩチップ５を、
ＰＥＴ樹脂等の有機基板（プラスチック製基板）１４の
Ａｌ、Ｃｕ等の箔導体１２の端子に同時接続、接着する
プロセスの第２の実施例について図５を用いて説明す
る。この第２の実施例は、第１の実施例において供給さ
れた樹脂１５ａの代わりに、２０μｍ程度の厚さのエポ
キシ樹脂等の粘着テープ状にしたもの１５ｂを切離して
供給したものである。エポキシ樹脂等の接着テープ１５
ｂの供給法は、短冊状に適度の寸法に切離した後、キャ
ピラリー（図示せず）で吸着後、片面（有機基板側）の
保護テープを剥がし、ＰＥＴ樹脂等の有機基板１４上に
おけるチップ搭載位置に固着後、上記キャピラリーの吸
着をある端の部分吸着に切り換えて上記キャピラリーを
上昇させることによって、他面（ＬＳＩチップ側）の保
護テープが一端から剥がされるいくことになって保護テ
ープ全体が剥がされることになる。これによって、エポ
キシ樹脂等の接着テープ１５ｂが、有機基板１４の箔導
体１２上に供給されることになる。Next, an LSI chip 5 such as a Si chip is
A second embodiment of a process of simultaneously connecting and bonding to terminals of a foil conductor 12 of Al, Cu or the like on an organic substrate (plastic substrate) 14 such as a PET resin will be described with reference to FIG. In the second embodiment, instead of the resin 15a supplied in the first embodiment, an adhesive tape 15b made of epoxy resin or the like having a thickness of about 20 μm is cut off and supplied. Adhesive tape 15 such as epoxy resin
The supply method of b is as follows: after cutting into a strip shape of an appropriate size, adsorbing with a capillary (not shown), peeling off the protective tape on one side (organic substrate side), and mounting the chip on the organic substrate 14 such as PET resin. After the capillary is fixed at the position, the suction of the capillary is switched to the partial suction at a certain end to raise the capillary, whereby the protection tape on the other surface (LSI chip side) is peeled off from one end, and the entire protection tape is removed. Will be peeled off. As a result, the adhesive tape 15b such as an epoxy resin is supplied onto the foil conductor 12 of the organic substrate 14.

【００２５】ところで、接着テープ１５ｂがエポキシ樹
脂のみでも、硬化後の物性は、ヤング率が２００ｋｇｆ
／ｍｍ2、熱膨張係数が約８０×１０~6／℃であるが、
薄いチップの曲げ剛性を強くし、継手の寿命を確保する
ため、ヤング率が（５００〜２０００）ｋｇｆ／ｍ
ｍ2、熱膨張係数が（２０〜６０）×１０~6／℃が望ま
しい。一般に、エポキシ樹脂の場合、熱膨張係数が高い
ものはフィラーが少ない場合であり、ヤング率は２００
ｋｇｆ／ｍｍ2程度に低くなる。そこで、チップ下の１
０μｍ程度の厚さレベルの狭い間隙に対応できるよう
に、１μｍ以下の石英フィラー（ＳｉＯ2フィラー）を
体積比で５０〜６０％程度樹脂中に混合することによ
り、ヤング率を（５００〜２０００）ｋｇｆ／ｍｍ2、
熱膨張係数を（２０〜６０）×１０~6／℃にして適切に
することができる。ヤング率を下げる手段としては、エ
ポキシ自体の分子量の低いものを使用すること、あるい
は０．１μｍφレベルのシリコーンを分散（１０％Ｖｏ
ｌ以下）させることが考えられる。１μｍ以下の石英フ
ィラーはＡｕ等のワイヤバンプ７とＡｌ、Ｃｕ等の端子
１２との間にはいっても接続への影響はない。なお、樹
脂１５ａにおいても、同様に構成することができる。Even when the adhesive tape 15b is made of only epoxy resin, the physical properties after curing are such that the Young's modulus is 200 kgf.
/ Mm 2 and a coefficient of thermal expansion of about 80 × 10 6 / ° C.
The Young's modulus is (500-2000) kgf / m in order to increase the bending rigidity of the thin tip and secure the life of the joint.
m 2 , and a coefficient of thermal expansion (20 to 60) × 10 6 / ° C. are desirable. In general, in the case of an epoxy resin, those having a high coefficient of thermal expansion have a small amount of filler, and have a Young's modulus of 200.
kgf / mm 2 . So, one under the chip
By mixing a quartz filler (SiO 2 filler) of 1 μm or less in a volume ratio of 50 to 60% in a resin so as to cope with a narrow gap having a thickness level of about 0 μm, the Young's modulus is (500 to 2000). kgf / mm 2 ,
The coefficient of thermal expansion can be set to (20 to 60) × 10 6 / ° C. to make it appropriate. As means for lowering the Young's modulus, use epoxy having a low molecular weight or disperse 0.1 μmφ silicone (10% Vo).
1 or less). Even if the quartz filler of 1 μm or less is inserted between the wire bump 7 made of Au or the like and the terminal 12 made of Al, Cu or the like, it does not affect the connection. Note that the resin 15a can be similarly configured.

【００２６】以上説明したように、予め、ボンディング
ステージ２０上に載置された有機基板１４の薄膜導体１
２上に接着テープ１５ｂが供給される。次に、図５
（ａ）に示すように、３００℃程度に加熱された支持部
材１１に真空吸着または電磁吸着されたＬＳＩチップ５
のボールバンプ部分７と有機基板１４の薄膜導体１２の
端子とが相対的に位置決めされる。次に、図５（ｂ）に
示すように加熱された支持部材１１を所望の圧力で押し
下げてＬＳＩチップ５を加圧することによって、図５
（ｃ）に示すようにボールバンプ部分７の尖った先端を
端子１２に食い込ませることによる熱圧着接続と樹脂１
５ｂによる接着とが同時に行われ、ＬＳＩチップ５の端
子６と有機基板１４の薄膜導体１２の端子との間隙を７
〜３０μｍ程度に著しく狭くしてＬＳＩチップ５を有機
基板１４の薄膜導体１２に対して接合実装することが可
能となる。As described above, the thin film conductor 1 of the organic substrate 14 previously mounted on the bonding stage 20
2, the adhesive tape 15b is supplied. Next, FIG.
As shown in (a), the LSI chip 5 vacuum-adsorbed or electromagnetic-adsorbed to the support member 11 heated to about 300 ° C.
And the terminal of the thin film conductor 12 of the organic substrate 14 are relatively positioned. Next, as shown in FIG. 5B, the heated support member 11 is pressed down at a desired pressure to press the LSI chip 5, whereby the LSI chip 5 is pressed.
As shown in (c), the thermocompression connection by cutting the sharp tip of the ball bump portion 7 into the terminal 12 and the resin 1
5b is simultaneously performed, and the gap between the terminal 6 of the LSI chip 5 and the terminal of the thin film conductor 12 of the organic substrate 14 is reduced by 7
The LSI chip 5 can be bonded and mounted on the thin film conductor 12 of the organic substrate 14 by remarkably narrowing it to about 30 μm.

【００２７】次に、Ｓｉチップ等のＬＳＩチップ５を、
ＰＥＴ樹脂等の有機基板（プラスチック製基板）１４の
Ａｌ、Ｃｕ等の箔導体１２の端子に同時接続、接着する
プロセスの第３の実施例について図６を用いて説明す
る。この第３の実施例においては、図６（ａ）に示すよ
うに、有機基板１４上のＣｕ等の箔リード（薄膜導体）
１２の端子部分に２０μｍ程度の厚さのＣｕめっきを電
気めっき等により施し、このＣｕめっきに対して特殊な
エッチング除去加工を施すことによって鋭い凹凸形状１
６を形成する。なお、この鋭い凹凸形状１６としては、
例えば、エッチングによるテクスチャ加工によって得ら
れる、２〜数μｍ程度の凸部を規則的に配列したもので
も良い。更に、このＣｕの多数の針状体１６上にＮｉ／
Ａｕめっき１７を施すことにより、酸化されにくい端子
部を形成することができる（ＳＨＭワークショップ：三
井金属鉱業：ノジュラーコネクションによる接続）。こ
の場合、ボールバンプ部分７は、Ａｕ等にして軟らか
く、かつバンプの先端１８を平坦にレべリングした方が
好ましい。そして、図６（ａ）に示すように、前述の樹
脂１５ａまたはテープ１５ｂが有機基板４上に置かれ、
ついで、ＬＳＩチップ５をキャピラリー部材１１で吸着
して加熱しながら、ＬＳＩチップ５のボールバンプ部分
７を有機基板１４上の薄膜導体の鋭い突起状（微小な凸
状）の端子１６に対して加圧することによって、図６
（ｂ）に示すように、鋭い突起部がボールバンプ部分７
に食い込んでしっかり接合されると共に樹脂１５ａ、１
５ｂによって固定され、高信頼性が確保された実装が可
能となる。この多数の針状の突起は、樹脂１５ｂのぬれ
に勝って、Ａｕの新生面と熱圧着される接触部はＡｕと
Ａｕであることから、接していれば導通では問題はな
い。Ａｕは変形しやすいので樹脂の中に硬い１μｍ以下
の石英フィラーが入っていても何ら問題はない。Next, an LSI chip 5 such as a Si chip is
A third embodiment of a process of simultaneously connecting and bonding to terminals of a foil conductor 12 of Al, Cu or the like on an organic substrate (plastic substrate) 14 such as a PET resin will be described with reference to FIG. In the third embodiment, as shown in FIG. 6A, a foil lead (thin film conductor) of Cu or the like on the organic substrate 14 is used.
The terminal portion 12 is coated with a Cu plating having a thickness of about 20 μm by electroplating or the like, and the Cu plating is subjected to a special etching removal process to form a sharp unevenness 1.
6 is formed. In addition, as this sharp uneven | corrugated shape 16,
For example, it may be one in which convex portions of about 2 to several μm obtained by texture processing by etching are regularly arranged. Furthermore, Ni / Ni
By applying the Au plating 17, it is possible to form a terminal portion that is hardly oxidized (SHM workshop: Mitsui Kinzoku Mining: Connection by nodular connection). In this case, it is preferable that the ball bump portion 7 is made of Au or the like so as to be soft and the tip 18 of the bump is leveled flat. Then, as shown in FIG. 6A, the above-described resin 15a or tape 15b is placed on the organic substrate 4,
Then, while the LSI chip 5 is attracted and heated by the capillary member 11, the ball bump portion 7 of the LSI chip 5 is applied to the sharp projecting (small convex) terminal 16 of the thin film conductor on the organic substrate 14. By pressing, FIG.
As shown in (b), the sharp protrusion is formed in the ball bump portion 7.
The resin 15a, 1
5b enables mounting with high reliability. The large number of needle-like projections overcome the wettability of the resin 15b, and the contact portions that are thermocompression-bonded to the new surface of Au are Au and Au. Since Au is easily deformed, there is no problem even if a hard quartz filler of 1 μm or less is contained in the resin.

【００２８】以上説明した実施の形態によれば、ＬＳＩ
チップ５の端子６と有機基板１４上の薄膜導体１２との
間の間隙を非常に狭めて接合実装することが可能とな
り、薄型化を実現することが可能となる。また、前記実
施の形態によれば、ＬＳＩチップ５の端子６を、有機基
板１４上の薄膜導体１２の端子にフラックスレスで接合
させることができ、しかもＬＳＩチップ５と有機基板１
４との間の接着も同時に実現することができるので、量
産化も可能で、大幅な時間短縮によって大幅なコスト低
減も図ることができる。特に、フラックスレスであるた
め、フラックスを洗浄して溶剤を乾かすプロセスを必要
とせず、低コスト化が可能となる。また、従来のよう
に、有機基板上の薄膜導体の端子上に予め、印刷等で１
５０℃以下の温度で接合できるＳｎ−Ｉｎ等のはんだを
供給する必要がなく、簡素化実装を実現して、低コスト
化を実現することができる。ところで、ＩＣカードが、
図７に示す如く、非接触式ＩＣカード３０の場合、リー
ダ／ライタ装置から無線（電磁波）によって電力を受信
し、通信情報についてはリーダ／ライタ装置との間で無
線（電磁波）によって送受信する必要があり、そのため
に、電力損失の少ない低抵抗のＣｕ、Ａｌ等から形成さ
れたアンテナ３１が設けられる。このアンテナ３１とし
ては、カード基材となる有機基板（プラスチック製基
板）１４の両面に互いにつなげて設けても良い。このよ
うに、非接触式ＩＣカード３０の場合、カード基材とな
る有機基板１４上にアンテナ３１が設けられる関係で、
カード基材となる有機基板（プラスチック製基板）１４
上の箔導体（薄膜導体）１２は、アンテナ３１そのもの
であったり、或いはアンテナ３１に電気的に接続される
ものとなる。なお、アンテナ３１とＬＳＩチップと接合
される薄膜導体の端子との間にコンデンサ等の能動素子
が組み込まれる場合がある。従って、ＬＳＩチップ５の
端子６を、カード基材となる有機基板（プラスチック製
基板）１４上におけるアンテナ３１またはアンテナ３１
につながった箔導体（薄膜導体）１２の端子に、ボール
バンプ部分７を用いて非常に狭い間隔で接合実装させ、
アンテナ３１やＬＳＩチップ５等を保護膜で被覆するこ
とよって、非常に薄型の非接触式ＩＣカード３０を製造
することができる。特に、アンテナ３１も含めて薄膜導
体１２および接合部分７を低抵抗化して半導体素子５を
薄型で実装することができるので、電磁特性を向上させ
た高感度の非接触式ＩＣカードを低コストで実現するこ
とができる。According to the embodiment described above, the LSI
The gap between the terminal 6 of the chip 5 and the thin-film conductor 12 on the organic substrate 14 can be extremely narrow, and can be bonded and mounted, so that a reduction in thickness can be realized. Further, according to the embodiment, the terminals 6 of the LSI chip 5 can be bonded to the terminals of the thin film conductors 12 on the organic substrate 14 in a fluxless manner.
4 can be realized at the same time, mass production is also possible, and significant cost reduction can be achieved by a significant reduction in time. In particular, since it is fluxless, a process of washing the flux and drying the solvent is not required, and the cost can be reduced. Further, as in the conventional case, the terminal of the thin film conductor on the organic substrate is printed in advance by printing or the like.
There is no need to supply a solder such as Sn-In that can be joined at a temperature of 50 ° C. or less, so that it is possible to realize simplified mounting and cost reduction. By the way, IC card
As shown in FIG. 7, in the case of the non-contact type IC card 30, it is necessary to receive electric power from the reader / writer device by radio (electromagnetic wave) and to transmit and receive communication information to and from the reader / writer device by radio (electromagnetic wave). For this purpose, an antenna 31 made of low-resistance Cu, Al, or the like with low power loss is provided. The antenna 31 may be provided on both sides of an organic substrate (plastic substrate) 14 serving as a card base material, by connecting them to each other. As described above, in the case of the non-contact type IC card 30, the antenna 31 is provided on the organic substrate 14 serving as a card base material.
Organic substrate (plastic substrate) 14 to be a card base material
The upper foil conductor (thin film conductor) 12 is the antenna 31 itself, or is electrically connected to the antenna 31. Note that an active element such as a capacitor may be incorporated between the antenna 31 and a terminal of a thin film conductor bonded to the LSI chip. Therefore, the terminal 6 of the LSI chip 5 is connected to the antenna 31 or the antenna 31 on the organic substrate (plastic substrate) 14 serving as a card base material.
Are connected to the terminals of the foil conductor (thin film conductor) 12 connected at a very narrow interval using the ball bump portions 7,
By covering the antenna 31, the LSI chip 5, and the like with a protective film, a very thin non-contact IC card 30 can be manufactured. In particular, since the semiconductor element 5 can be mounted thin by reducing the resistance of the thin-film conductor 12 and the bonding portion 7 including the antenna 31, a highly sensitive non-contact IC card with improved electromagnetic characteristics can be manufactured at low cost. Can be realized.

【００２９】また、ＩＣカードが、図８に示す如く、接
触式ＩＣカード４０の場合、外部接続端子４１を、直接
リーダ／ライタ装置の端子（図示せず）と直接接触させ
て電源の供給を受けると共に通信信号の授受を行うこと
になる。従って、ＬＳＩチップ５の端子６が、小形の有
機基板１４に固着された外部端子４１となる薄膜導体１
２に、ボールバンプ部分７を用いて非常に狭い間隔で接
合実装させることになる。即ち、この場合、小形の有機
基板１４に穴があけてあり、この穴内にＬＳＩチップ５
を位置させて、ＬＳＩチップ５の端子６を、外部端子４
１となる薄膜導体１２の裏面にボールバンプ部分７を用
いて接合実装することになる。そして、このようにＬＳ
Ｉチップ５を実装した小形の有機基板１４が、図８
（ｂ）に示すように、プラスチック製基材４２に形成さ
れた窪み４３に埋め込まれて実装され、接触式ＩＣカー
ド４０が構成されることになる。ところで、ＬＳＩチッ
プ５を実装した小形の有機基板１４を窪み４３に埋め込
む前に、窪み４３の形状に合わせてＬＳＩチップ５の上
を樹脂でモールド封止または被覆し、これを接着剤等を
用いて窪み４３の中に固定して埋め込むことも可能であ
る。また、薄膜導体１２の外側の面は外部端子４１とな
るため、耐摩耗性が要求されるので、Ｗ等の耐摩耗性の
ある膜をめっき等のよって成膜すればよい。以上説明し
たように、ＬＳＩチップの端子と有機基板上の薄膜導体
との間の間隙を非常に狭くすることができるので、非接
触式および接触式の両方のＩＣカードにおいて薄型化を
実現することができる。When the IC card is a contact type IC card 40 as shown in FIG. 8, the external connection terminal 41 is brought into direct contact with a terminal (not shown) of the reader / writer device to supply power. Receiving and transmitting and receiving communication signals. Therefore, the terminal 6 of the LSI chip 5 is replaced with the thin-film conductor 1 serving as the external terminal 41 fixed to the small organic substrate 14.
Second, bonding and mounting are performed at very narrow intervals using the ball bump portions 7. That is, in this case, a hole is formed in the small organic substrate 14, and the LSI chip 5
And the terminal 6 of the LSI chip 5 is connected to the external terminal 4
1 is mounted on the back surface of the thin film conductor 12 using the ball bump portion 7. And like this, LS
The small organic substrate 14 on which the I chip 5 is mounted is shown in FIG.
As shown in (b), the contact-type IC card 40 is configured by being embedded and mounted in the depression 43 formed in the plastic base material 42. By the way, before embedding the small organic substrate 14 on which the LSI chip 5 is mounted in the depression 43, the top of the LSI chip 5 is molded or covered with a resin in accordance with the shape of the depression 43, and this is sealed with an adhesive or the like. It is also possible to fix and embed in the depression 43. Since the outer surface of the thin-film conductor 12 becomes the external terminal 41, wear resistance is required. Therefore, a wear-resistant film such as W may be formed by plating or the like. As described above, the gap between the terminal of the LSI chip and the thin-film conductor on the organic substrate can be made very narrow, so that both the non-contact type and the contact type IC cards can be made thin. Can be.

【００３０】[0030]

【発明の効果】本発明によれば、ＬＳＩチップの端子と
有機基板上の薄膜導体との間の間隙を非常に狭め、低抵
抗で、且つ確実に接合実装することが可能となるので、
接合実装構造として薄型化を高信頼度で実現することが
できる効果を奏する。また、本発明によれば、ＬＳＩチ
ップが実装されるＩＣカードにおいて、高感度を得なが
ら薄型化を低コストで実現することができる効果を奏す
る。また、本発明によれば、ＬＳＩチップをフラックス
レス接合実装でき、大幅な時間短縮とコスト低減を図る
ことができる効果を奏する。According to the present invention, the gap between the terminal of the LSI chip and the thin-film conductor on the organic substrate can be extremely narrowed, and low-resistance and reliable bonding can be achieved.
There is an effect that the thickness can be reduced with high reliability as the bonding mounting structure. Further, according to the present invention, in an IC card on which an LSI chip is mounted, there is an effect that thinning can be realized at low cost while obtaining high sensitivity. Further, according to the present invention, an LSI chip can be mounted by fluxless bonding, and there is an effect that a significant reduction in time and cost can be achieved.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明に係る半導体素子の端子へのボールバン
プを形成するプロセスの一実施例を示す断面図である。FIG. 1 is a cross-sectional view showing one embodiment of a process for forming a ball bump on a terminal of a semiconductor device according to the present invention.

【図２】本発明に係る半導体素子の端子へボールバンプ
が形成された形状を示す断面図である。FIG. 2 is a cross-sectional view illustrating a shape in which a ball bump is formed on a terminal of a semiconductor device according to the present invention.

【図３】本発明に係る半導体素子の端子に形成されたボ
ールバンプを有機基板上の薄膜導体の端子に接合実装さ
れる前後の状態を示す断面図である。FIG. 3 is a cross-sectional view showing a state before and after a ball bump formed on a terminal of a semiconductor device according to the present invention is bonded and mounted to a terminal of a thin film conductor on an organic substrate.

【図４】本発明に係る半導体素子を有機基板上の薄膜導
体の端子に同時接続、接着するプロセスの第１の実施例
を示す断面図である。FIG. 4 is a sectional view showing a first embodiment of a process for simultaneously connecting and bonding a semiconductor element according to the present invention to terminals of a thin film conductor on an organic substrate.

【図５】本発明に係る半導体素子を有機基板上の薄膜導
体の端子に同時接続、接着するプロセスの第２の実施例
を示す断面図である。FIG. 5 is a cross-sectional view showing a second embodiment of a process for simultaneously connecting and bonding a semiconductor element according to the present invention to terminals of a thin film conductor on an organic substrate.

【図６】本発明に係る半導体素子を有機基板上の薄膜導
体の端子に同時接続、接着するプロセスの第３の実施例
を示す断面図である。FIG. 6 is a sectional view showing a third embodiment of a process for simultaneously connecting and bonding a semiconductor element according to the present invention to terminals of a thin film conductor on an organic substrate.

【図７】本発明に係る半導体素子実装構造体を備えた非
接触式ＩＣカードの概略構成を示す斜視図である。FIG. 7 is a perspective view showing a schematic configuration of a non-contact type IC card provided with a semiconductor element mounting structure according to the present invention.

【図８】本発明に係る半導体素子実装構造体を備えた接
触式ＩＣカードの概略構成を示す斜視図および一部断面
図である。FIG. 8 is a perspective view and a partial cross-sectional view showing a schematic configuration of a contact IC card provided with a semiconductor element mounting structure according to the present invention.

【符号の説明】[Explanation of symbols]

１…ボール、２…ワイヤ（線）、３…クランパー、４…
キャピラリー、５…ＬＳＩチップ（半導体素子）、６…
端子、７…ボールバンプ部分（接合部分）、７ａ…鍔状
部分または薄肉状部分、７ｂ…細く突き出た部分、８…
引きちぎった線の先端、１１…支持部材（キャピラリー
部分）、１２…箔導体（薄膜導体）、１３…接着剤、１
４…有機基板（小形の有機基板、ＩＣカード基材）、１
６…針状体（鋭い凹凸形状）、３０…非接触式ＩＣカー
ド、３１…アンテナ、４０…接触式ＩＣカード、４１…
外部端子、４２…ＩＣカード基材、４３…窪み（凹
部）。1 ... ball, 2 ... wire (wire), 3 ... clamper, 4 ...
Capillary, 5 ... LSI chip (semiconductor element), 6 ...
Terminal, 7: ball bump portion (joining portion), 7a: flange portion or thin portion, 7b: thin protruding portion, 8 ...
Tip of the torn wire, 11: support member (capillary part), 12: foil conductor (thin film conductor), 13: adhesive, 1
4: Organic substrate (small organic substrate, IC card substrate), 1
6 needle-like body (sharp irregularities), 30 non-contact IC card, 31 antenna, 40 contact IC card, 41
External terminals, 42: IC card base material, 43: recess (recess).

───────────────────────────────────────────────────── フロントページの続き (72)発明者 高岡 勇 神奈川県秦野市堀山下１番地 株式会社日 立製作所汎用コンピュータ事業部内 (72)発明者 和井 伸一 神奈川県秦野市堀山下１番地 株式会社日 立製作所汎用コンピュータ事業部内 Ｆターム(参考） 2C005 MA15 MA18 MA31 NA09 NB34 PA18 RA04 RA11 RA12 TA21 TA22 5B035 AA04 BA03 BA04 BA05 BB09 CA23 5F044 KK02 LL11 LL15 QQ02 5F061 AA01 BA03 CA05 FA03  ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Isamu Takaoka 1st Horiyamashita, Hadano-shi, Kanagawa Prefecture In-house Computer Division, Hitachi, Ltd. (72) Inventor Shinichi Wai 1st Horiyamashita, Hadano-shi, Kanagawa Japan F-term in the General-purpose Computer Division, Ritsumi Works (for reference)

Claims (21)

【特許請求の範囲】[Claims] 【請求項１】半導体素子の端子を有機基板上の薄膜導体
の端子に接合実装した半導体素子実装構造体であって、 前記半導体素子の端子上に接合され、且つ鍔状部分若し
くは薄肉状部分の先に細く突き出させて形成したバンプ
の先端部分を、前記薄膜導体の端子に食い込ませて金属
接合させて構成したことを特徴とする半導体素子実装構
造体。1. A semiconductor element mounting structure in which a terminal of a semiconductor element is bonded and mounted to a terminal of a thin film conductor on an organic substrate, wherein the structure is bonded to the terminal of the semiconductor element and has a flange portion or a thin portion. A semiconductor element mounting structure, wherein a tip portion of a bump formed by projecting thinly is bitten into a terminal of the thin film conductor and metal-joined. 【請求項２】半導体素子の端子を有機基板上の薄膜導体
の端子に接合実装した半導体素子実装構造体であって、 前記半導体素子の端子上に熱圧着により接合され、且つ
鍔状部分若しくは薄肉状部分の先に細く突き出させて形
成したバンプの先端部分を、前記薄膜導体の端子に食い
込ませて金属接合させて構成したことを特徴とする半導
体素子実装構造体。2. A semiconductor element mounting structure in which a terminal of a semiconductor element is bonded and mounted to a terminal of a thin film conductor on an organic substrate, wherein the structure is bonded to the terminal of the semiconductor element by thermocompression bonding, and has a flange portion or a thin portion. A semiconductor element mounting structure, characterized in that a tip portion of a bump formed by projecting thinly from a tip of a thin portion is cut into a terminal of the thin-film conductor and metal-joined. 【請求項３】半導体素子の端子を有機基板上の薄膜導体
の端子に接合実装した半導体素子実装構造体であって、 前記半導体素子の端子上に接合され、且つ鍔状部分若し
くは薄肉状部分の先に細く突き出させて形成したバンプ
の先端部分を、前記薄膜導体の端子に熱圧着により食い
込ませて金属接合させて構成したことを特徴とする半導
体素子実装構造体。3. A semiconductor element mounting structure in which a terminal of a semiconductor element is bonded and mounted to a terminal of a thin film conductor on an organic substrate, wherein the terminal is connected to the terminal of the semiconductor element and has a flange portion or a thin portion. A semiconductor element mounting structure characterized in that a tip portion of a bump formed by projecting thinly is bitten into a terminal of the thin film conductor by thermocompression bonding and metal-bonded. 【請求項４】半導体素子の端子を有機基板上の薄膜導体
の端子に接合実装した半導体素子実装構造体であって、 前記半導体素子の端子上に熱圧着により接合され、且つ
鍔状部分若しくは薄肉状部分の先に細く突き出させて形
成したバンプの先端部分を、前記薄膜導体の端子に熱圧
着により食い込ませて金属接合させて構成したことを特
徴とする半導体素子実装構造体。4. A semiconductor element mounting structure in which a terminal of a semiconductor element is bonded and mounted to a terminal of a thin film conductor on an organic substrate, wherein the structure is bonded to the terminal of the semiconductor element by thermocompression bonding and has a flange portion or a thin portion. A semiconductor element mounting structure, characterized in that a tip portion of a bump formed by protruding thinly from a tip of a shaped portion is bitten into a terminal of the thin film conductor by thermocompression bonding to be metal-joined. 【請求項５】請求項１または２または３または４記載の
半導体素子実装構造体において、更に、半導体素子と有
機基板との間に設けられた樹脂によって半導体素子を有
機基板に接着して構成したことを特徴とする半導体素子
実装構造体。5. The semiconductor device mounting structure according to claim 1, wherein the semiconductor device is further bonded to the organic substrate with a resin provided between the semiconductor device and the organic substrate. A semiconductor element mounting structure characterized by the above-mentioned. 【請求項６】請求項１または２または３または４記載の
バンプにおいて、細く突き出させた先端面に微小な凹凸
を有することを特徴とする半導体素子実装構造体。6. A semiconductor element mounting structure according to claim 1, wherein said bump has a fine projection and a depression on a tip surface thereof. 【請求項７】請求項１または２または３または４記載の
バンプは、ＡｕまたはＡｇまたはＰｄまたはＣｕまたは
ＡｌまたはＳｎ系はんだ合金を主成分とする金属で形成
したことを特徴とする半導体素子実装構造体。7. The semiconductor element mounting according to claim 1, wherein the bump is formed of a metal mainly containing Au, Ag, Pd, Cu, Al, or a Sn-based solder alloy. Structure. 【請求項８】請求項１または２または３または４記載の
薄膜導体は、ＡｌまたはＣｕを主成分とする金属で形成
したことを特徴とする半導体素子実装構造体。8. A semiconductor element mounting structure according to claim 1, wherein the thin film conductor is formed of a metal containing Al or Cu as a main component. 【請求項９】請求項１または２または３または４記載の
薄膜導体の端子部分の接合面に微小な凹凸を有すること
を特徴とする半導体素子実装構造体。9. A semiconductor element mounting structure, characterized in that the thin film conductor according to claim 1, 2, 3 or 4 has minute irregularities on a joint surface of a terminal portion. 【請求項１０】請求項１または２または３または４記載
の半導体素子実装構造体を有することを特徴するＩＣカ
ード。10. An IC card having the semiconductor element mounting structure according to claim 1, 2, 3 or 4. 【請求項１１】ＩＣカードの基材となる有機基板と、 該有機基板上に設けられ、電力を受信し、通信の送受信
を行うためのアンテナと、 端子上に接合され、且つ鍔状部分若しくは薄肉状部分の
先に細く突き出させて形成したバンプを有し、該バンプ
の先端部分を、有機基板上の前記アンテナにつながった
薄膜導体の端子に食い込ませて金属接合させて有機基板
に対して実装した半導体素子とを備えたことを特徴とす
る非接触式ＩＣカード。11. An organic substrate serving as a base material of an IC card, an antenna provided on the organic substrate, for receiving power, transmitting and receiving communication, and joined to a terminal and having a flange portion or It has a bump formed by protruding thinly at the tip of the thin portion, and the tip of the bump is cut into the terminal of the thin film conductor connected to the antenna on the organic substrate and metal-bonded to the organic substrate. A non-contact IC card comprising a mounted semiconductor element. 【請求項１２】ＩＣカードの基材となる有機基板と、 該有機基板上に設けられ、電力を受信し、通信の送受信
を行うためのアンテナと、 端子上に熱圧着により接合され、且つ鍔状部分若しくは
薄肉状部分の先に細く突き出させて形成したバンプを有
し、該バンプの先端部分を、有機基板上の前記アンテナ
につながった薄膜導体の端子に熱圧着により食い込ませ
て金属接合させて有機基板に対して実装した半導体素子
とを備えたことを特徴とする非接触式ＩＣカード。12. An organic substrate serving as a base material of an IC card, an antenna provided on the organic substrate, for receiving power and transmitting and receiving communication, and bonded to the terminal by thermocompression bonding, and A thin portion or a thin-walled portion, a bump formed by projecting the tip of the thin portion, and the tip of the bump is cut into the terminal of the thin film conductor connected to the antenna on the organic substrate by thermocompression bonding to be metal-bonded. And a semiconductor element mounted on an organic substrate. 【請求項１３】請求項１１または１２記載の非接触式Ｉ
Ｃカードにおいて、更に、半導体素子と有機基板との間
に設けられた樹脂によって半導体素子を有機基板に接着
して構成したことを特徴とする非接触式ＩＣカード。13. A non-contact type I according to claim 11 or 12.
A non-contact type IC card, wherein the semiconductor element is further adhered to the organic substrate with a resin provided between the semiconductor element and the organic substrate. 【請求項１４】請求項１１または１２記載の非接触式Ｉ
Ｃカードにおいて、半導体素子およびアンテナを保護膜
で被覆して構成したことを特徴とする非接触式ＩＣカー
ド。14. A non-contact type I according to claim 11 or 12.
A non-contact type IC card, wherein the semiconductor element and the antenna are covered with a protective film in the C card. 【請求項１５】端子上に接合され、且つ鍔状部分若しく
は薄肉状部分の先に細く突き出させて形成したバンプを
有する半導体素子を、該バンプの先端部分を、小形の有
機基板上に外部端子として設けられた薄膜導体の端子に
食い込ませて金属接合させて構成した半導体素子実装構
造体を、ＩＣカードの基材となる有機基板上に形成され
た窪み若しくは凹部に埋め込んで構成したことを特徴と
する接触式ＩＣカード。15. A semiconductor device having a bump which is joined to a terminal and is formed by projecting thinly to the tip of a flange portion or a thin portion, wherein a tip portion of the bump is connected to an external terminal on a small organic substrate. A semiconductor element mounting structure formed by cutting into a thin-film conductor terminal provided as a metal bond and embedding into a recess or recess formed on an organic substrate serving as a base material of an IC card. Contact type IC card. 【請求項１６】請求項１５記載の半導体素子実装構造体
において、更に、半導体素子と小形の有機基板との間に
設けられた樹脂によって半導体素子を小形の有機基板に
接着して構成したことを特徴とする接触式ＩＣカード。16. The semiconductor element mounting structure according to claim 15, wherein the semiconductor element is bonded to the small organic substrate with a resin provided between the semiconductor element and the small organic substrate. Characteristic contact IC card. 【請求項１７】請求項１５記載の半導体素子実装構造体
において、半導体素子を樹脂で被覆若しくは封止して形
成することを特徴とする接触式ＩＣカード。17. A contact type IC card according to claim 15, wherein the semiconductor element is formed by covering or sealing the semiconductor element with a resin. 【請求項１８】半導体素子の端子を有機基板上の薄膜導
体の端子に接合実装した半導体素子実装構造体の製造方
法であって、 前記半導体素子の端子に熱圧着して接合させながら鍔状
部分若しくは薄肉状部分の先に細く突き出させた形状の
バンプを形成するバンプ形成工程と、 該バンプ形成工程で半導体素子の端子に形成したバンプ
と有機基板上の薄膜導体の端子とを相対的に位置決めし
て熱圧着することによりバンプの先端部分を、前記薄膜
導体の端子に食い込ませて金属接合させて有機基板に対
して半導体素子を実装する実装工程とを有することを特
徴とする半導体素子実装構造体の製造方法。18. A method of manufacturing a semiconductor element mounting structure in which a terminal of a semiconductor element is bonded and mounted to a terminal of a thin film conductor on an organic substrate, wherein the flange-shaped portion is bonded to the terminal of the semiconductor element by thermocompression bonding. Alternatively, a bump forming step of forming a thin bump protruding from the thin portion, and positioning the bump formed on the terminal of the semiconductor element and the terminal of the thin film conductor on the organic substrate in the bump forming step relative to each other Mounting the semiconductor element to the organic substrate by bonding the tip end of the bump to the terminal of the thin film conductor by metal bonding and thermocompression bonding, and mounting the semiconductor element on the organic substrate. How to make the body. 【請求項１９】半導体素子の端子を有機基板上の薄膜導
体の端子に接合実装した半導体素子実装構造体の製造方
法であって、 金属線材の先を溶融して球状化し、該球状化された部分
と前記半導体素子の端子とを相対的に位置決めして球状
化された部分を前記半導体素子の端子に熱圧着して接合
させながら鍔状若しくは薄肉状に成形して金属線材を引
っ張って該鍔状部分若しくは薄肉状部分の先に細く突き
出させた形状のバンプを形成するバンプ形成工程と、 該バンプ形成工程で半導体素子の端子に形成したバンプ
と有機基板上の薄膜導体の端子とを相対的に位置決めし
て熱圧着することによりバンプの先端部分を、前記薄膜
導体の端子に食い込ませて金属接合させて有機基板に対
して半導体素子を実装する実装工程とを有することを特
徴とする半導体素子実装構造体の製造方法。19. A method for manufacturing a semiconductor element mounting structure in which terminals of a semiconductor element are bonded and mounted to terminals of a thin film conductor on an organic substrate, wherein a tip of a metal wire is melted to form a sphere, and the sphere is formed. The part and the terminal of the semiconductor element are relatively positioned and the spherical part is thermocompression-bonded to the terminal of the semiconductor element and formed into a flange shape or a thin shape while being joined to the terminal of the semiconductor element. Forming a bump having a shape protruding from the tip of a thin portion or a thin-walled portion. The bump formed on the terminal of the semiconductor element in the bump forming process and the terminal of the thin film conductor on the organic substrate are relatively positioned. A mounting step of mounting the semiconductor element on the organic substrate by cutting the tip of the bump into the terminal of the thin-film conductor by metal bonding and positioning by thermocompression bonding. The method of manufacturing a semiconductor device mounting structure that. 【請求項２０】請求項１８または１９記載の実装工程に
おいて、半導体素子と有機基板との間に樹脂を置くこと
によって半導体素子を有機基板に接着して固定すること
を特徴とする半導体素子実装構造体の製造方法。20. A semiconductor element mounting structure according to claim 18, wherein the semiconductor element is adhered and fixed to the organic substrate by placing a resin between the semiconductor element and the organic substrate in the mounting step. How to make the body. 【請求項２１】半導体素子の端子を有機基板上の薄膜導
体の端子に接合実装した半導体素子実装構造体の製造方
法であって、 前記半導体素子の端子に熱圧着して接合させながら鍔状
部分若しくは薄肉状部分の先に細く突き出させた形状の
バンプを形成するバンプ形成工程と、 前記有機基板上の薄膜導体の端子部分の表面に微小な凹
凸を形成する凹凸形成工程と、 前記バンプ形成工程で半導体素子の端子に形成したバン
プと前記凹凸形成工程で表面に微小な凹凸を形成した薄
膜導体の端子とを相対的に位置決めして熱圧着すること
によりバンプの先端部分を、前記薄膜導体の端子に食い
込ませて金属接合させて有機基板に対して半導体素子を
実装する実装工程とを有することを特徴とする半導体素
子実装構造体の製造方法。21. A method of manufacturing a semiconductor element mounting structure in which terminals of a semiconductor element are bonded and mounted to terminals of a thin film conductor on an organic substrate, wherein the flange-shaped portion is bonded to the terminals of the semiconductor element by thermocompression bonding. Alternatively, a bump forming step of forming a bump having a shape protruding thinly at the tip of the thin-walled portion, a bump forming step of forming minute bumps and dips on the surface of the terminal portion of the thin film conductor on the organic substrate, and the bump forming step The bumps formed on the terminals of the semiconductor element and the terminals of the thin film conductor having minute irregularities formed on the surface in the irregularity forming step are positioned relative to each other and thermocompression-bonded, so that the tip of the bumps is formed on the thin film conductor. And mounting the semiconductor element on the organic substrate by biting into the terminal and bonding the metal to the organic substrate.
JP27606698A 1998-09-29 1998-09-29 Semiconductor element mounting structure, its manufacture, and ic card Pending JP2000114314A (en)

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