JP2000112715A - Sine/cosine arithmetic circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a sine/cosine arithmetic circuit that does not need a large capacity memory for previously writing operation results by using specific operation results and obtaining the operation results in quadrants other than a prescribed and limited quadrant. SOLUTION: An absolute value/code extraction circuit finds an absolute value signal |A| of a phase angle signal A being an input signal and a code information signal IS, and a sine/cosine approximation arithmetic circuit finds sine operation results S and cosine operation results C in a 1st quadrant through a primary approximation operation shown by an expression in accordance with a low order (N-2) bit of the absolute value signal |A|. A phase rotation processing circuit performs phase rotation processing by replacing the results S and C obtained by performing the approximation operation in accordance with the signal of three bits of high orders of the signal |A| and inverting a code and obtains sine operation results SIN and cosine operation results COS in the quadrants other than the 1st quadrant by that. In this expression, Kij and Lij are each 0 or ±1, Mi and Ni are each 0 or 1 and zero (ω) is 0 in the case of ω=0 and is 1 in the case of ω≠0.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sine / cosine operation circuit for generating a sine wave signal and a cosine wave signal based on a signal representing a phase angle, and in particular, to a digital circuit using a digital circuit. The present invention relates to a sine / cosine operation circuit for calculating a signal.

[0002]

2. Description of the Related Art Conventionally, a circuit using a memory is well known as a circuit for performing a sine / cosine operation in a digital circuit.

FIG. 7 is a diagram showing an example of a conventional sine / cosine operation circuit CC. Conventional sine / cosine operation circuit CC
Is a ROM (Read Only Memory) 11
And 12, all the operation results are stored in the ROM
11 and 12 are written. That is, the phase angle signal A is input as an address of the ROMs 11 and 12, and the sine operation result SIN corresponding to the phase angle signal A input as the address is previously written in the ROM 11, and is input as the address. The cosine operation result COS corresponding to the phase angle signal A is written in the ROM 12 in advance, and the sine operation result SIN and the cosine operation result COS are read out corresponding to the address.

[0004]

In the above-mentioned conventional sine / cosine operation circuit, the result of the sine / cosine operation is written in advance in the memory. However, there is a problem that the capacities of the memories 11 and 12 become very large.

The present invention provides a sine / cosine operation circuit that does not require a large-capacity memory for previously writing the sine / cosine operation result when calculating a sine / cosine operation result for a multi-bit phase angle signal. The purpose is to do so.

[0006]

The present invention provides an absolute value / sign extraction circuit for outputting an absolute value signal of an input phase angle signal and a sign signal of the input signal, and an absolute value / sign extraction circuit. Based on the absolute value signal output by, using a first-order approximation equation, within a predetermined limited quadrant,
A sine / cosine approximation calculation circuit for approximating the sine calculation result and the cosine calculation result; and the sine calculation according to the sign signal output by the absolute value / sign extraction circuit and the upper 3 bits of the absolute value signal. The sine calculation result and the cosine calculation result output by the cosine approximation calculation circuit are interchanged or inverted to output a sine calculation result and a cosine calculation result in a quadrant other than the predetermined limited quadrant. A sine / cosine operation circuit having a phase rotation processing circuit.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1A is a block diagram showing a sine / cosine operation circuit CC1 according to an embodiment of the present invention. FIG. 1B is a diagram illustrating an operation truth table of the selector 32 in the above embodiment.

The sine / cosine operation circuit CC1 comprises an absolute value / sign extraction circuit 10, a sine / cosine approximation operation circuit 20, and a phase rotation processing circuit 30.

An absolute value / sign extraction circuit 10 generates an absolute value signal | A | of a phase angle signal A as an input signal and a phase angle signal A
And the code information signal IS.

The sine / cosine approximation calculation circuit 20 calculates a sine calculation result S, in the first quadrant (predetermined limited quadrant) in accordance with the lower (N-2) bits of the absolute value signal | A |
This is a circuit that obtains a cosine operation result C by a first-order approximation operation. Note that a polynomial approximation operation may be performed instead of the first-order approximation operation.

The phase rotation processing circuit 30 exchanges the sine operation result S and the cosine operation result C approximated by the sine / cosine approximation operation circuit 20 in accordance with the upper three bits of the absolute value signal | A |. Or by inverting the sign,
This circuit performs a phase rotation process and obtains a sine operation result SIN and a cosine operation result COS in quadrants other than the first quadrant. The signal of the upper 3 bits of the absolute value signal | A | is a signal that, when 2π is divided into eight quadrants, which quadrant belongs to the quadrant.

The phase rotation processing circuit 30 receives the N-bit phase angle signal A, and outputs the EXOR circuits 31, 33, 34, 3
6, a selector 32, a first adder 35, and a second adder 37.

The EXOR circuit 31 excludes the (N-1) th bit signal | A | _N-1 and the (N-2) th bit signal | A | _N-2 of the absolute value signal | A | A logical OR operation is performed to output a selection signal SEL for extracting a quadrant (second, third, sixth, and seventh quadrants) in which the sine operation result S and the cosine operation result C need to be exchanged, and sent to the selector 32. Things.

The selector 32 is a circuit for selecting one of the sine calculation result S and the cosine calculation result C output by the sine / cosine approximation calculation circuit 20 in accordance with the selection signal SEL output by the EXOR circuit 31. FIG. 1B shows the relationship between the selection signal SEL and the output signals CY and SY of the selector 32.

[0015] EXOR33 the absolute value signal | A | N-th bit of the signal | A | _N and (N-1) th bit of the signal | A
_N−1 and the exclusive OR operation to invert the sign of the output signal CY of the selector 32 (to make the output signal CY a negative number)
It outputs a signal for extracting necessary quadrants (third, fourth, fifth, and sixth quadrants).

The EXOR circuits 33 and 34 and the adder 35 constitute sign inverting means and perform sign inversion within a range of π / 2 ≦ θ ≦ 3π / 2. That is, the third, fourth,
When a phase angle signal A of 5 or 6 quadrants is input, EXOR
The circuit 33 outputs “1”, and therefore, the EXOR circuit 34 inverts the output signal CY bit by bit (performs 1 → 0 or 0 → 1), and adds the adder 3 to the inverted signal.
Since 5 adds 1, the sign of the output signal CY can be inverted. In other words, for example, if the CY is "0011" (a binary number indicating "3"), the sign of this "0011" is inverted in bit units to generate "1100". Add “1” to
"1101", which is a binary number indicating "-3".

The EXOR circuit 33 and the EXOR circuit 3
4 and the adder 35 are circuits that output the cosine calculation results in the second to eighth quadrants and the cosine calculation results in the first quadrant.

The EXOR circuit 36 and the adder 37 constitute a sign inverting means, and in a range of -π ≦ θ ≦ 0 according to the sign information signal IS output from the absolute value / sign extracting circuit 10.
The sign of the sine operation result S and the cosine operation result C are inverted. The EXOR circuit 36 and the adder 37 are circuits that output a sine operation result in the second to eighth quadrants and a sine operation result in the first quadrant.

The sine operation result S is a sine operation result in only the first quadrant, and the sine operation result SIN is a sine operation result in all of the first to eighth quadrants. In other words, the sine operation result SIN Is a result of the phase rotation processing circuit 30 performing the phase rotation processing on the sine calculation result S. Similarly, the cosine calculation result C is a cosine calculation result only in the first quadrant, and the cosine calculation result COS is a cosine calculation result in all of the first to eighth quadrants, in other words, the cosine calculation result COS. Is the result of the phase rotation processing circuit 30 performing the phase rotation processing on the cosine calculation result C. When there is a change, the sine operation result S becomes the cosine operation result C, and the cosine operation result C becomes the sine operation result SIN.

FIG. 2 is a diagram showing a configuration example of the sine / cosine approximation calculation circuit 20 in the above embodiment.

The sine / cosine approximation operation circuit 20 includes a sign inversion circuit 21, a signal switch means 22, a first bit shift circuit 231, a second bit shift circuit 232, and an EX.
OR circuit 24, zero value determination circuit 25, first decoder 261, second decoder 262, and selectors 271 to 271
273, 281-284, a first adder 291 and a second adder 291.
And an adder 292.

The signal switch means 22 switches output signals between two signals composed of the absolute value of the phase angle signal and the output signal of the sign inversion circuit 21 according to the most significant bit of the phase angle signal. Or means for outputting without switching the output terminal.

FIG. 3 is a diagram showing the correspondence between input signals and output signals of each circuit in the above embodiment. Fig. 3 (1)
Is a diagram showing a truth table of the signal switch means 22,
FIG. 3 (2) is a diagram showing the operation of the first decoder 261, FIG. 3 (3) is a diagram showing the operation of the second decoder 262, and FIG. FIG. 9 is a diagram illustrating the operation of the circuit 25.

Next, the operation of the sine / cosine operation circuit CC1 will be described.

First, the absolute value / sign extraction circuit 10 obtains the absolute value signal | A | of the phase angle signal A, and extracts the sign information signal IS of the phase angle signal A. Then, the sine / cosine approximation circuit 20 uses the lower bits (bits excluding the upper 2 bits) of the absolute value signal | A | C is obtained by an approximate calculation, and a sine calculation result S / cosine calculation result C in the predetermined limited quadrant is output.

Then, the phase rotation processing circuit 30 calculates the sine / cosine approximation circuit 20 according to the upper 3 bits of the absolute value signal | A | The sine operation result S / cosine operation result CIN corresponding to all quadrants is obtained by exchanging the calculated sine operation result S / cosine operation result C and inverting the sign.
Get.

Next, the sine / cosine approximation calculation circuit 20 will be described in detail.

The sine / cosine approximation calculation circuit 20 calculates the absolute value
In accordance with the lower bit signal of the absolute value signal | A | restricted to a positive value by the sign extraction circuit 10, an approximation operation for obtaining the sine operation result S and the cosine operation result C is performed only in the first quadrant.

Since the calculation is performed only in the limited quadrant of the first quadrant, a first-order approximation can be applied. But,
When the first-order approximation is applied, in general, it is necessary to multiply the coefficients, which causes a problem of increasing the hardware scale. To eliminate this adverse effect, the phase angle signal A (here, ω
), A signal in which the phase angle signal A is shifted by at least one bit and a blank portion is filled with the most significant bit (a signal obtained by dividing the phase angle signal A by a power of 2) and the sign of the phase angle signal A are inverted. After that, a signal obtained by shifting at least one bit and filling the most significant bit in a blank portion (a signal obtained by dividing the sign-inverted signal by a power of 2), a zero-value determination signal of the phase angle signal A, and a constant are combined. The sine / cosine function is approximated using a first-order approximation formula that can obtain the sine operation result S and the cosine operation result C only by performing the addition and subtraction operations. Note that the zero value determination signal of the phase angle signal A is a signal for finely adjusting the sine calculation result S and the cosine calculation result C, and the zero value determination signal may not be used.

FIG. 4 is a diagram showing equations (1) and (2) used in the above embodiment. When the above description is expressed by an equation, the equation (1) shown in FIG. 4 is obtained.

In the equation (1), α is a coefficient in the case where the real number operation is quantized and the fixed point operation is performed.
K _oj is 0 or ± 1, L _oj is 0 or ± 1, M _o is 0 or 1, N _o is 0 or 1.
And zero (x) is 0 if x = 0, and 1 if x ≠ 0.

By employing a first-order approximation equation as shown in equation (1), the sine operation result S and the cosine operation result C can be obtained without using an arithmetic means such as a multiplier having a large hardware scale.
Can be obtained.

However, when the quadrant range is approximated by one linear expression, there is a problem that an error increases. In order to prevent this adverse effect, the sine / cosine approximation calculation circuit 20 uses
As shown in FIG. 5 described later, the value of the input phase angle signal A is divided into a plurality of sections, and a plurality of linear approximations are sequentially switched and applied to each section. Specifically, equation (2) shown in FIG.
, Different values are selected for each section as K _ij , L _ij , M _i , N _i , and B _i .

In the equation (2), α is a coefficient when a real number operation is quantized and a fixed-point operation is performed.
_ij is 0 or ± 1, L _ij is 0 or ± 1, M _i is 0 or 1, N _i is 0 or 1, and if x = 0, zero (x ) = 0 and x ≠
If 0, zero (x) = 1.

In this case, if the approximate expression is switched according to an arbitrary value of the input phase angle signal A, a multi-bit comparator or the like is required to switch the approximate expression, and the hardware scale increases. The adverse effect occurs. In order to prevent this adverse effect, the domain of the input phase angle signal A is divided into sections of a power of 2 (for example, 8 sections), and this section is used as a switching point of the approximate expression.

FIG. 5 is a diagram showing an example of each applicable range of a plurality of linear approximations in the sine / cosine approximation circuit 20.

In FIG. 5, in the first quadrant, for the sine function, the change in the amount of change of the sine operation result with respect to the change in the unit phase angle is small, so that three linear approximations F _S1 ,
From F _S2, F _S3, select the one primary approximate expression for the cosine function, the change of the amount of change of the cosine calculation results with respect to the change of the unit phase angle is large, five primary approximate expression F _C1,
One linear approximation formula is selected from F _C2 , F _C3 , F _C4 , and F _C5 .

As shown in FIG. 5, the domain of the input phase angle signal A is divided into sections of a power of two, and this division is used as a switching point of the approximation formula, whereby the higher order of the input phase angle signal A is obtained. The bits are decoded, and first-order approximation expressions to be applied to a predetermined section (a section set at unequal intervals or at equal intervals) are switched by the selectors 271 to 273 and 281 to 284. As described above, if the primary approximate expression is switched by the selector, a multi-bit comparator for switching the approximate expression becomes unnecessary. Therefore, the sine / cosine calculation result can be approximated with a minimum hardware scale while suppressing errors.

Next, the operation of the sine / cosine approximation calculation circuit 20 will be described in more detail.

The phase angle signal which is the input signal of the sine / cosine approximation operation circuit 20 is the most significant bit | A | of the absolute value signal | A | of the phase angle signal A input to the sine / cosine operation circuit CC1. _N and the next bit | a | a signal with _N-1 is removed, for example, 10-bit signal | a | ₉ ~
│A│ ₀ , the ninth bit signal │A│ ₉ is regarded as a sign bit, and the eighth bit signal │A│ _{8 to the zeroth} bit signal │A│0 is the phase angle excluding the sign. This bit indicates a signal.

Then, the sign inverting circuit 21 obtains a signal-| A | in which the sign of the absolute value signal | A | of the phase angle signal A is inverted. As shown in the truth table of FIG. 3A, the bit | A | ₉ of the absolute value signal | A | of the phase angle signal A (the absolute value signal | of the phase angle signal A input to the sine / cosine operation circuit CC1 | A
|, The signal switching means 22 outputs the signals | A | and-| A |
Select and output. When 0 to 2π are divided into eight quadrants, bit | A | ₉ is set to sine / cosine operation circuit CC1
Is the third most significant bit of the absolute value signal | A | of the input phase angle signal A, and is a bit indicating an odd quadrant and an even quadrant shown in FIG.

That is, if bit | A | ₉ = 0, output signal X = | A |, and if bit | A | ₉ = 1, output signal X = − | A | and bit | A | ₉ = 0
, The output signal Y = − | A |, and the bit | A |
_{If 9} = 1, the output signal Y = | A |.

The EXOR circuit 24 outputs the phase angle signal |
When the bit of A || A | ₉ = 1, the phase angle signal |
The upper bits | A | ₈ to | A | ₅ of A | are logically inverted. The control of the signal switch means 22 and the EXOR circuit 2
4, the value in the range of 0 ≦ | A | ≦ π / 4 is made to correspond to the range of π / 4 ≦ | A | ≦ π / 2. For example, 0 ≦ | A | ≦ π / 4 and π / 4 ≦
In the case of | A | ≦ π / 2, the result of sine operation and the result of cosine operation are interchanged.
It is line symmetric at the position. Here, in order to obtain the value of 7π / 16, it is necessary to separately exchange the sine operation result and the cosine operation result, but the value of π / 16 may be used.

That is, considering the value of the phase angle, π /
For the value of | A | that satisfies 4 ≦ | A | ≦ π / 2, assuming that the value to be replaced in the first quadrant is | A | ′, | A | ′ =
π / 4− | A |. Here, the input of this circuit is an absolute value signal, which is obtained by cutting off the upper 2 bits.
When | A | ₉ is “0”, 0 ≦ | A | ≦ π / 4, and when | A | ₉ is “1”, π / 4 ≦ | A | ≦ π /
2 and | A | ₉ represents π / 4. So, |
In order to realize A | ′ = π / 4− | A |, the assignment (| A |
And-| A |) and logically inverting the signal to the decoder that controls the change of the approximation expression, thereby expressing "-| A |". When the logic is inverted, “0” becomes “15”, and the application range in FIG. 5 is viewed from the opposite direction to the normal direction.

The first bit shift circuit 231 outputs signals X / 2 and X in accordance with the output signal X of the signal switch means 22.
/ 4, X / 8, X / 16, X / 32, X / 64.
Further, the second bit shift circuit 232 outputs the signals Y / 2, Y / 4,
Y / 8, Y / 16, Y / 32, Y / 64 are obtained.

The first decoder 261 and the second decoder 2
Reference numeral 62 decodes the output signal DX of the EXOR circuit 24, and outputs a signal selection control signal DY and a signal selection control signal DZ, as shown in FIGS. 3 (2) and 3 (3).
That is, if the signal DX is 0-5, the signal selection control signal DY = 0, and if the signal DX is 6-10, the signal selection control signal DY = 1, and the signal DX becomes 11-15.
Then, the signal selection control signal DY = 2. Then, the first decoder 261 and the second decoder 262
It outputs a signal for selecting a first-order approximation formula actually used among a plurality of first-order approximation formulas used in one quadrant.

Further, as shown in FIG. 3D, the zero value determination circuit 25 detects a bit string in which all 10 bits constituting the phase angle signal | A | are 0, and outputs a control signal AZ. .

The selectors 271 to 273 control the signals X / 4, X / 8, X / 32, Y /
32, and switches between each signal and a constant and outputs it to the adder 291. When the signal selection control signal DY is “0”, the signal described at the top of each of the selectors 271 to 273 in FIG. 2 is output, and the signal selection control signal DY is “1”. At a certain time, a signal described at the center of each of the selectors 271 to 273 in FIG. 2 is output. When the signal selection control signal DY is “2”, each of the selectors 271 to 273 in FIG. The signal described at the bottom is output.

Further, the selectors 281 to 284 operate the X / 16, X / 64, Y / 2,
Each signal of Y / 4, Y / 8, Y / 16, Y / 64, and AZ is switched and a constant is output to the adder 292. The switching of the selectors 281 to 284 switches the approximate expression to be applied. When the signal selection control signal DZ is “0”, “1”, “2”, or “3”, each of the selectors 281 to 284 in FIG.
From the top, the first, second, third, and fourth signals are output.

The first adder 291 includes selectors 271 to 271.
273, and outputs a sine operation result signal S. The adder 292 adds the outputs of the selectors 281 to 284 and outputs a cosine calculation result signal C.

As described above, the result of the sine / cosine operation in this case is a value in the range of 0 ≦ | A | ≦ π / 4, and the value of the phase angle signal | A | is π / 4 ≦ | A | If ≦ π / 2,
The adder 291 outputs a cosine calculation result signal, and the adder 29
2 outputs a sine operation result signal, so that a separate process is required by the phase rotation processing circuit 30.
That is, when the phase angle signal belongs to the second, third, sixth, and seventh quadrants, replacement is necessary.

When the sine / cosine approximation calculation circuit 20 shown in FIG. 2 is used, sine / cosine calculation is performed using bit shift and addition, so that an increase in calculation scale can be suppressed.

Next, the operation of the phase rotation processing circuit 30 will be described in detail.

FIG. 6 is an explanatory diagram of the operation of the phase rotation processing circuit 30 in the above embodiment, and is a diagram showing a sine operation result and a cosine operation result for the phase angle.

When obtaining the sine operation result SIN and the cosine operation result COS for the input phase angle signal | A |, first, for the given phase angle signal | A |, the phase plane (2π) is converted into the first quadrant, It is divided into eight quadrants, the second quadrant,..., The eighth quadrant. Then, the result of the sine operation in the first quadrant is _s, and the result of the cosine operation in the first quadrant is
_C , the sine operation result in the second quadrant is _s , the cosine operation result in the second quadrant is _C ,.
The result of the sine operation in the quadrant is _s, and the result of the cosine operation in the eighth quadrant is _C. Here, the sine operation result _s in the first quadrant and the cosine operation result in the first quadrant
_C is approximated by the sine / cosine approximation operation circuit 20.

The sine and cosine functions are periodic functions,
Further, since they are orthogonal to each other, a sine operation result S and a cosine operation result C are obtained only in the first quadrant, the obtained sine operation result S and the cosine operation result C are exchanged, the sign is inverted, and the phase angle is changed. By inverting the logic of the signal, the sine operation result SIN and the cosine operation result COS in the quadrants other than the predetermined quadrant can be obtained.

That is, the cosine calculation result in the first quadrant
_{If C} is logically inverted with respect to the phase angle signal, the sine operation result _S in the second quadrant can be obtained. That is, in FIG. 6, the cosine calculation result _C in the first quadrant and the sine calculation result _S in the second quadrant are line-symmetric with respect to the broken line indicating the phase angle π / 4.
Similarly to the case where the cosine calculation result _C changes (increases) when changing from / 4 to 0, the sine calculation result _S in the second quadrant is changed when changing from π / 4 to π / 2 ( Increase). That is, the cosine calculation result _C
Is logically inverted with respect to the phase angle signal.
You can ask for _S. The cosine calculation result _C in the second quadrant may be obtained by logically inverting the sine calculation result _s in the first quadrant with respect to the phase angle signal in the same manner as described above.

As the sine operation result _S in the third quadrant, the cosine operation result _C may be used as it is (the sine operation result _S may be replaced as the cosine operation result _C ),
The cosine calculation result _C in the third quadrant is the sine calculation result
After inverting the sign of _s, the logic of the phase angle signal may be inverted. The sine operation result _S in the fourth quadrant may be obtained by logically inverting the sine operation result _s with respect to the phase angle signal, and the cosine operation result _C in the fourth quadrant may be obtained by logically inverting the cosine operation result _C with respect to the phase angle signal.

The sine operation result _S in the fifth quadrant
Can be obtained by inverting the sign of the operation result _S , the cosine operation result _C in the fifth quadrant can be obtained by inverting the sign of the operation result _C , and the sine operation result _S in the sixth quadrant can be obtained by changing the sign of the operation result _C The cosine operation result _C in the sixth quadrant may be obtained by inverting the sign of the operation result _C and then logically inverting the phase angle signal.

Further, the result of the sine operation in the seventh quadrant
_S may be obtained by inverting the sign of the operation result _C , the cosine operation result _C in the seventh quadrant may be obtained by replacing the operation result _S, and the sine operation result _S in the eighth quadrant may be obtained by inverting the sign of the operation result _S. The cosine calculation result _C in the eighth quadrant may be obtained by logically inverting the calculation result _C with respect to the phase angle signal.

As described above, the sine operation result SIN and the cosine operation result COS on all the phase planes are obtained.
Can be requested.

In the case of performing the above exchange, it is necessary to output a sine operation result to a signal terminal for outputting a normal cosine operation result, and conversely, to output a cosine operation result to a signal terminal for outputting a normal sine operation result. The replacement process is performed by the phase rotation processing circuit 30. That is, in the phase rotation processing circuit 30, the (N-2) th bit | A | _N-2 and the (N-1) th bit signal | A | _{N-1 of} the absolute value signal | A | Performs exclusive OR operation, and EXOR31
By controlling the selector 32 with the output signal of, the sine calculation result S and the cosine calculation result C output from the sine / cosine approximation calculation circuit 20 are exchanged.

According to the above embodiment, when obtaining the sine / cosine operation result for the multi-bit phase angle signal A, a large-capacity memory for previously writing the sine / cosine operation result is not required.

[0064]

According to the present invention, when a sine / cosine operation result is obtained for a multi-bit phase angle signal,
This has the effect of not requiring a large-capacity memory for previously writing the cosine operation result.

[Brief description of the drawings]

FIG. 1 shows a sine / cosine operation circuit C according to an embodiment of the present invention.
FIG. 7 is a block diagram showing C1 and a diagram showing an operation truth table of the selector 32 in the embodiment.

FIG. 2 is a sine / cosine approximation calculation circuit 2 in the embodiment.
FIG. 9 is a diagram illustrating a configuration example of a zero.

FIG. 3 is a diagram showing a correspondence between an input signal and an output signal of each circuit in the embodiment.

FIG. 4 is a diagram showing equations (1) and (2) used in the above embodiment.

FIG. 5 is a diagram showing an example of each applicable range of a plurality of linear approximations in the sine / cosine approximation calculation circuit 20;

FIG. 6 is an explanatory diagram of an operation of the phase rotation processing circuit 30 in the embodiment, showing a sine operation result and a cosine operation result for a phase angle.

FIG. 7 is a diagram illustrating an example of a conventional sine / cosine operation circuit CC.

[Explanation of symbols]

 CC1: sine / cosine operation circuit, 10: absolute value / sign extraction circuit, 2155 sign inversion circuit, 22: selector, 231: first bit shift circuit, 232: second bit shift circuit, 24: EXOR, 261 ... 1st decoder, 262 ... 2nd decoder, 271-273, 281-284 ... selector, 291 ... 1st adder, 292 ... 2nd adder, 20 ... sine / cosine approximation arithmetic circuit, 30 ... phase Rotation processing circuit, 31, 3234, 36... EXOR, 35, 37.

────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] September 27, 1999 (September 9, 1999
7)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

(Equation 1) (However, K _ij and L _ij are 0 or ± 1, and M _i and N _i are
0 or 1 and zero (ω) is 0 if ω = 0
And sine / cosine approximation operation circuit for performing a first-order approximation operation using ω ≠ 0) ; the positive / negative sign signal output from the absolute value / sign extraction circuit; The sine calculation result and the cosine calculation result output by the sine / cosine approximation calculation circuit are exchanged and sign-reversed according to the upper three bits, so that the sine in a quadrant other than the predetermined limited quadrant is obtained. And a phase rotation processing circuit for outputting a calculation result and a cosine calculation result.

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Masahiro Morikura 3-19-2 Nishi-Shinjuku, Shinjuku-ku, Tokyo F-term in Nippon Telegraph and Telephone Corporation (reference) 5B022 AA00 BA02 CA04 CA07 DA01 DA02 EA07 FA03

Claims (2)

[Claims] An absolute value / sign extraction circuit for outputting an absolute value signal of an input phase angle signal and a positive / negative sign signal of the phase angle signal; the absolute value signal output by the absolute value / sign extraction circuit A sine / cosine approximation circuit for approximating a sine operation result and a cosine operation result within a predetermined limited quadrant based on a predetermined lower-order bit of The sine operation result and the cosine operation result output by the sine / cosine approximation operation circuit are exchanged according to the positive / negative sign signal output by the value / sign extraction circuit and the upper 3 bits of the absolute value signal. A phase rotation processing circuit that outputs a sine calculation result and a cosine calculation result in a quadrant other than the predetermined limited quadrant by inverting the sign. . 2. The sine / cosine approximation operation circuit according to claim 1, wherein: a sign inversion circuit for inverting and outputting a sign of the phase angle signal; and a signal output from the phase angle signal and the sign inversion circuit. The output signals are switched between the two systems of signals according to the most significant bit of the phase angle signal, or
Signal switch means for outputting without switching the output terminal; and shifting down the first signal output by the selector to at least one lower bit to the lower bit side. First bit shifting means for outputting a signal filled with the same bits as the upper bits; and shifting down the second signal output by the selector to at least one lower bit side, and further comprising: A second bit shift means for outputting a signal in which the same bit as the most significant bit is filled in a blank portion generated by the above; zero for determining whether or not the absolute value of the phase angle signal is "0" A value determination circuit;
Exclusive-OR means for performing an exclusive-OR operation on the most significant bit of the phase angle signal and a plurality of other higher-order bits; a first signal selection in accordance with an output signal of the exclusive-OR means A first decoder for outputting a control signal for use in the first bit shifter; a second decoder for outputting a control signal for selecting a second signal in response to the output signal of the exclusive OR means; From the output signal, the output signal of the second bit shift means, and the signal representing the constant, a plurality of signals necessary for the first-order approximation equation are determined according to the first signal selection control signal. A first signal selecting means for selecting; a first adder for adding a plurality of signals output from the first signal selecting means to each other; an output signal from the first bit shifting means; The output signal of the bit shift means and the zero value determination circuit Second signal selecting means for selecting, from the force signal and the signal representing the constant, a plurality of signals required for the first-order approximation equation in accordance with the second signal selection control signal; A second adder that adds together a plurality of signals output by the two signal selection means. 2. A sine / cosine operation circuit.