JP2000082931A - Piezoelectric single crystal wafer, its manufacture and surface acoustic wave device - Google Patents

Piezoelectric single crystal wafer, its manufacture and surface acoustic wave device

Info

Publication number
JP2000082931A
JP2000082931A JP25250098A JP25250098A JP2000082931A JP 2000082931 A JP2000082931 A JP 2000082931A JP 25250098 A JP25250098 A JP 25250098A JP 25250098 A JP25250098 A JP 25250098A JP 2000082931 A JP2000082931 A JP 2000082931A
Authority
JP
Japan
Prior art keywords
layer
wafer
single crystal
piezoelectric single
crystal wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25250098A
Other languages
Japanese (ja)
Inventor
Shunichi Aikawa
俊一 相川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP25250098A priority Critical patent/JP2000082931A/en
Publication of JP2000082931A publication Critical patent/JP2000082931A/en
Pending legal-status Critical Current

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  • Mechanical Treatment Of Semiconductor (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a surface acoustic wave device superior in electric characteristics and to supply a highly precise device by removing a machined distorted layer consisting of a crack layer and an elastic distortion layer on the surface of a piezoelectric single crystal wafer. SOLUTION: A piezoelectric single crystal wafer 1, a crack layer 2, a, elastic distorted layer 3, a machined layer 4 and a mirror polishing area 5 are displayed. In such a case, the wafer where the machined distorted layer 4 of the crack layer 2 and the elastic distortion layer 3 does not exist is obtained on the surface of the electrode forming face-side of the piezoelectric single crystal wafer (wafer) 1. Thus, the wafer 1 is etched and the thickness D/3 being at least 1/3 of the thickness D of the crack layer is polished in addition to the thickness D of the crack layer of the wafer 1 by using abrasive grains whose average grain diameter is not more than 100 nm and using abrasive cloth having raised fibers (nap). Namely, the mirror area 5 with 4/3D in the thickness of the crack layer is mirror-polished and the surface of the wafer 1 is finished.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は弾性表面波デバイス
等の基板に用いられる圧電単結晶ウェーハとその製造方
法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a piezoelectric single crystal wafer used for a substrate of a surface acoustic wave device or the like and a method for manufacturing the same.

【0002】通常、テレビ映像中周波(TV−IF)フ
ィルタや携帯電話用フィルタに使用される表面弾性波
(SAW)フィルタの圧電基板としてニオブ酸リチウム
やタンタル酸リチウムの単結晶ウェーハが用いられる。
In general, a single crystal wafer of lithium niobate or lithium tantalate is used as a piezoelectric substrate of a surface acoustic wave (SAW) filter used in a television picture medium frequency (TV-IF) filter or a mobile phone filter.

【0003】近年、これらのフィルタの特性向上のた
め、単結晶のラッピング時の加工歪みを除去するため
に、様々なエッチングや鏡面加工等の表面加工が行われ
ている。
[0003] In recent years, in order to improve the characteristics of these filters, various surface treatments such as etching and mirror finishing have been performed in order to remove processing distortion during lapping of a single crystal.

【0004】[0004]

【従来の技術】図1はウェーハのラッピングによる加工
歪み層と鏡面研磨領域の説明図である。
2. Description of the Related Art FIG. 1 is an explanatory view of a strained layer caused by lapping of a wafer and a mirror-polished region.

【0005】図において、1は圧電単結晶ウェーハ、2
はクラック層、3は弾性歪み層、4は加工歪み層、5は
鏡面研磨領域である。従来、弾性表面波デバイス用等に
用いられる圧電単結晶ウェーハには、圧電性を有する単
結晶が多く用いられている。圧電単結晶ウェーハの製造
では、アニール及びポーリング処理された単結晶インゴ
ットをワイヤソー若しくは内周刃によりウェーハ状にス
ライスした後、炭化珪素(SiC)系等の砥粒を用いた
両面ラッピングを行う。
In the drawing, reference numeral 1 denotes a piezoelectric single crystal wafer, 2
Is a crack layer, 3 is an elastic strain layer, 4 is a work strain layer, and 5 is a mirror-polished region. 2. Description of the Related Art Conventionally, piezoelectric single crystal wafers used for surface acoustic wave devices and the like often use piezoelectric single crystals. In the production of a piezoelectric single crystal wafer, a single crystal ingot that has been annealed and poled is sliced into a wafer by a wire saw or an inner peripheral blade, and then double-sided lapping is performed using silicon carbide (SiC) -based abrasive grains.

【0006】そして、図1に示すように、両面ラッピン
グされた圧電単結晶ウェーハ(以下ウェーハ)1の表面
にはクラック層2と弾性歪み層3からなる加工歪み層4
が存在する。そこで、エッチング処理によって加工歪み
層4を有る程度除去した後、ウェーハ1の電極パターン
形成面を鏡面加工している。
[0006] As shown in FIG. 1, on the surface of a double-sided wrapped piezoelectric single crystal wafer (hereinafter referred to as a wafer) 1, a processing strain layer 4 comprising a crack layer 2 and an elastic strain layer 3
Exists. Therefore, after the processing strain layer 4 is removed to some extent by etching, the surface of the wafer 1 on which the electrode pattern is formed is mirror-finished.

【0007】[0007]

【発明が解決しようとする課題】従来は、上記のエッチ
ング処理条件及び鏡面加工研磨量は、鏡面加工後のウェ
ーハ表面にクラックが残らない程度に行っており、その
ウェーハを用いて弾性表面波デバイス等の圧電基板を製
造してきた。
Conventionally, the above-mentioned etching conditions and mirror polishing amount have been set so that no cracks remain on the wafer surface after the mirror surface processing. And other piezoelectric substrates.

【0008】しかしながら、目視で表面にクラックがな
い鏡面ウェーハにおいても、視認不可能である弾性歪み
が残存すると、例えば、そのウェーハを基板として弾性
表面波デバイス等を製造した場合、電気的特性の悪化が
認められる。
However, even if a mirror-surface wafer having no cracks on the surface is visually observed, if elastic strain that cannot be seen remains, for example, when a surface acoustic wave device or the like is manufactured using the wafer as a substrate, electrical characteristics deteriorate. Is recognized.

【0009】これは、例えば弾性表面波デバイスにおい
て、弾性表面波がウェーハのごく表面を伝播するため、
加工歪みによって弾性表面波が減衰してしまうことによ
ると考えられる。
This is because, for example, in a surface acoustic wave device, the surface acoustic wave propagates on the very surface of the wafer.
It is considered that surface acoustic waves are attenuated due to processing strain.

【0010】本出願の目的は、上記問題を解決し、圧電
単結晶ウェーハにクラックおよび加工歪みのないウェー
ハを得ることを目的として提供される。
[0010] An object of the present application is to solve the above-mentioned problems and to provide a piezoelectric single crystal wafer free of cracks and processing distortion.

【0011】[0011]

【課題を解決するための手段】図1はラッピング加工に
よるウェーハ表面の加工歪み層を示すウェーハの断面図
である。
FIG. 1 is a sectional view of a wafer showing a strained layer on the surface of the wafer by lapping.

【0012】図において、1は圧電単結晶ウェーハ、2
はクラック層、3は弾性歪み層、4は加工歪み層、5は
鏡面研磨領域である。本発明では、図1で示したよう
に、圧電単結晶ウェーハ(以下ウェーハ)1の電極形成
面側の表面にクラック層2及び弾性歪み層3からなる加
工歪み層4が存在しないウェーハを得る。
In the figure, 1 is a piezoelectric single crystal wafer, 2
Is a crack layer, 3 is an elastic strain layer, 4 is a work strain layer, and 5 is a mirror-polished region. In the present invention, as shown in FIG. 1, a wafer is obtained in which a processing strain layer 4 composed of a crack layer 2 and an elastic strain layer 3 does not exist on the surface on the electrode forming surface side of a piezoelectric single crystal wafer (hereinafter, wafer) 1.

【0013】そのために、ウェーハ1をエッチング処理
した後で、平均粒径が100nm以下の研磨砥粒を使用
し、且つ、図2に示すような起毛せんい(nap)6を
有する研磨布7を用いて、第1図に示すウェーハ1のク
ラック層の厚さDに加えて、更にクラック層の厚さDの
少なくとも3分の1の厚さD/3を研磨する、すなわち
クラック層の厚さの4/3Dの鏡面研磨領域5を鏡面研
磨して、ウェーハ1の表面仕上げを行う。
For this purpose, after the wafer 1 has been subjected to the etching treatment, polishing abrasive grains having an average particle diameter of 100 nm or less are used, and a polishing cloth 7 having a nap 6 as shown in FIG. Then, in addition to the crack layer thickness D of the wafer 1 shown in FIG. 1, at least one third of the crack layer thickness D D / 3 is polished, that is, the crack layer thickness is reduced. The 4 / 3D mirror polishing region 5 is mirror-polished to finish the surface of the wafer 1.

【0014】このような本発明の表面仕上げ方法によ
り、ウェーハ表面のクラック層のみならず、弾性歪み層
をも完全に除去することができるため、加工歪みのない
ウェーハの製作が可能となるとともに、そのようなウェ
ーハを用いて電気的特性の優れた弾性表面波デバイス等
の圧電単結晶ウェーハの製造が可能となる。
According to the surface finishing method of the present invention, not only the crack layer on the wafer surface but also the elastic strain layer can be completely removed, so that a wafer without processing distortion can be manufactured. Using such a wafer, a piezoelectric single crystal wafer such as a surface acoustic wave device having excellent electrical characteristics can be manufactured.

【0015】[0015]

【発明の実施の形態】図3はSAWバンドパスフィルタ
特性説明図である。図4は800MHz帯SAWバンド
パスフィルタ特性説明図である。
FIG. 3 is an explanatory diagram of SAW band-pass filter characteristics. FIG. 4 is an explanatory diagram of the 800 MHz band SAW bandpass filter characteristics.

【0016】本発明においては一実施例として、圧電単
結晶ウェーハを弾性表面波デバイスの基板に用いた場合
のウェーハ処理方法について説明する。試料として、4
0°回転Yのタンタル酸リチウム(LiTaO3)単結晶
ウェーハを用いた。チョコラルスキー(CZ)法によっ
て製造したこの単結晶を、ワイヤーソーによりスライス
した後、FO#1000の砥粒を用い、両面ラッピング
を行った後、室温で、弗酸と硝酸の混合液(HF:HN
3 =1:2)中で1時間のエッチングを行った。
In the present invention, as one embodiment, a wafer processing method when a piezoelectric single crystal wafer is used as a substrate of a surface acoustic wave device will be described. As a sample, 4
A lithium tantalate (LiTaO 3 ) single crystal wafer with 0 ° rotation Y was used. This single crystal produced by the Czochralski (CZ) method was sliced with a wire saw, and then double-sided lapping was performed using FO # 1000 abrasive grains. At room temperature, a mixed solution of hydrofluoric acid and nitric acid (HF: HN
Etching was performed in O 3 = 1: 2) for 1 hour.

【0017】次に、鏡面研磨加工による加工歪みを少な
くするため、および電極を形成する上で必要な面の粗さ
を得るために、80nmの平均粒径を有するコロイダル
シリカ砥粒と、更に図2に示すようなnapを有する研
磨布を用い、ウェーハの表面を10ないし20μmの厚
さで鏡面研磨加工を行った。
Next, colloidal silica abrasive grains having an average particle size of 80 nm are used to reduce processing distortion due to mirror polishing and to obtain surface roughness required for forming electrodes. Using a polishing cloth having a nap as shown in No. 2, the surface of the wafer was mirror-polished to a thickness of 10 to 20 μm.

【0018】そして、それぞれのウェーハの鏡面加工表
面に、DCスパッタリングによりアルミニウム(Al)
膜を形成し、このAl膜を金属顕微鏡の暗視野により表
面の検査を行った。
Then, aluminum (Al) is formed on the mirror-finished surface of each wafer by DC sputtering.
A film was formed, and the surface of the Al film was inspected using a dark field of a metal microscope.

【0019】その結果、10〜14μmの鏡面研磨を行
ったウェーハの表面には数μmの大きさのクラックがウ
ェハー全面に認められたが、15μm以上研磨したもの
はクラックを確認することが出来なかった。この観察結
果によりクラック層の厚さは15μmであることが判っ
た。
As a result, cracks having a size of several μm were observed on the entire surface of the wafer after mirror polishing to a thickness of 10 to 14 μm, but no cracks could be confirmed in a wafer polished to 15 μm or more. Was. From this observation result, it was found that the thickness of the crack layer was 15 μm.

【0020】次に、上記のウェーハを用いて、800M
Hz帯のSAW(弾性表面波)バンドパスフィルタを製
作した。バンドパスフィルタの特性評価は、図3に示す
ような最小挿入損失を用いて確認した。図4に鏡面研磨
量とSAWバンドパスフィルタの最小挿入損失の関係を
示す。
Next, using the above wafer, 800M
A SAW (surface acoustic wave) bandpass filter in the Hz band was manufactured. The evaluation of the characteristics of the bandpass filter was confirmed using the minimum insertion loss as shown in FIG. FIG. 4 shows the relationship between the mirror polishing amount and the minimum insertion loss of the SAW bandpass filter.

【0021】図4で示されるように、鏡面研磨量が増え
るに従って、SAWフィルタの最小挿入損失が小さくな
っていき、ウェーハのクラック層の厚さ15μmに対し
て、更にクラック層の厚さの1/3の5μmを追加研磨
して20μmの鏡面研磨とすればそれ以上は一定値を示
すことがわかる。
As shown in FIG. 4, as the mirror polishing amount increases, the minimum insertion loss of the SAW filter decreases, and the crack layer thickness of the wafer is 15 μm and the crack layer thickness is 1 μm. It can be seen that if 5 μm of 3 is additionally polished and mirror polishing of 20 μm is performed, a constant value is shown beyond that.

【0022】以上の結果より、ウェーハのクラック層を
除去した後、更にクラック層の少なくとも1/3の厚さ
を鏡面研磨することで、クラック層のみならず、弾性歪
み層をも除去することができ、最小挿入損失の少ないS
AWバンドパスフィルタが製造出来る。
From the above results, it is possible to remove not only the crack layer but also the elastic strain layer by mirror-polishing at least one third of the thickness of the crack layer after removing the crack layer of the wafer. S with low minimum insertion loss
An AW bandpass filter can be manufactured.

【0023】またこのような圧電単結晶ウェーハは各種
のフィルタ、発振器、遅延線(ディレーライン)、コン
ボルバ、圧力センサ等の基板として用いることが出来
る。
Such a piezoelectric single crystal wafer can be used as a substrate for various filters, oscillators, delay lines (delay lines), convolvers, pressure sensors, and the like.

【0024】[0024]

【発明の効果】以上説明したように、本発明によれば、
硝酸と弗酸との混合液でウェハ表面のエッチングを充分
に行い、ウェハ表面のクラック層および弾性歪み層を鏡
面研磨加工により完全に除去することにより、電気的特
性に優れた弾性表面波デバイスを得ることができ、より
高精度のデバイスの供給が可能となる。
As described above, according to the present invention,
By fully etching the wafer surface with a mixture of nitric acid and hydrofluoric acid and completely removing the crack layer and the elastic strain layer on the wafer surface by mirror polishing, a surface acoustic wave device with excellent electrical characteristics is obtained. And a more accurate device can be supplied.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 ウェーハのラッピングによる加工歪み層と鏡
面研磨領域の説明図
FIG. 1 is an explanatory diagram of a work-strained layer and a mirror-polished region due to lapping of a wafer

【図2】 本発明の鏡面研磨で用いる研磨布の断面形状FIG. 2 is a sectional view of a polishing cloth used for mirror polishing according to the present invention.

【図3】 SAWバンドパスフィルタ特性説明図FIG. 3 is an explanatory diagram of SAW bandpass filter characteristics.

【図4】 800MHz帯SAWバンドパスフィルタ特
性説明図
FIG. 4 is an explanatory diagram of characteristics of an 800 MHz band SAW bandpass filter.

【符号の説明】[Explanation of symbols]

図において 1 圧電単結晶ウェーハ 2 クラック層 3 弾性歪み層 4 加工歪み層 5 鏡面研磨領域 6 起毛せんい(nap) 7 研磨布 In the figure, 1 a piezoelectric single crystal wafer 2 a crack layer 3 an elastic strain layer 4 a work strain layer 5 a mirror polished area 6 a napping 7 (nap) 7 a polishing cloth

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H01L 41/22 H01L 41/18 101A H03H 3/02 41/22 Z ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H01L 41/22 H01L 41/18 101A H03H 3/02 41/22 Z

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】 圧電単結晶ウェーハ表面のクラック層及
び弾性歪み層からなる加工歪み層が除去されていること
を特徴とする圧電単結晶ウェーハ。
1. A piezoelectric single crystal wafer characterized in that a cracked layer and a processing strain layer comprising an elastic strain layer on the surface of the piezoelectric single crystal wafer are removed.
【請求項2】 前記ウェーハの表面のクラック層の厚さ
の少なくとも4/3の厚さが研磨されてなることを特徴
とする請求項1記載の圧電単結晶ウェーハ。
2. The piezoelectric single crystal wafer according to claim 1, wherein at least 4/3 of the thickness of the crack layer on the surface of the wafer is polished.
【請求項3】 圧電単結晶ウェーハの表面をエッチング
した後で、鏡面研磨加工によりクラック層及び弾性歪み
層からなる加工歪み層を除去することを特徴とする圧電
単結晶ウェーハの製造方法。
3. A method for manufacturing a piezoelectric single crystal wafer, comprising: after etching a surface of a piezoelectric single crystal wafer, removing a work-strained layer comprising a crack layer and an elastic strain layer by mirror polishing.
【請求項4】 前記ウェーハ表面のクラック層の厚さの
少なくとも4/3の厚さを鏡面研磨加工することを特徴
とする請求項3記載の圧電単結晶ウェーハの製造方法。
4. The method for producing a piezoelectric single crystal wafer according to claim 3, wherein at least 4/3 of the thickness of the crack layer on the wafer surface is mirror-polished.
【請求項5】 前記鏡面研磨加工に起毛繊維を有する研
磨布を用いることを特徴とする請求項3または4記載の
圧電単結晶ウェーハの製造方法。
5. The method for producing a piezoelectric single crystal wafer according to claim 3, wherein a polishing cloth having raised fibers is used for the mirror polishing.
【請求項6】 前記鏡面研磨加工に100nm径以下の
砥粒を用いることを特徴とする請求項3、4または5記
載の圧電単結晶ウェーハの製造方法。
6. The method for manufacturing a piezoelectric single crystal wafer according to claim 3, wherein abrasive grains having a diameter of 100 nm or less are used for the mirror polishing.
【請求項7】 前記ウェーハがタンタル酸リチウムから
なることを特徴とする請求項3、4、5、または6記載
の圧電単結晶ウェーハの製造方法。
7. The method according to claim 3, wherein the wafer is made of lithium tantalate.
【請求項8】 請求項1記載の圧電単結晶ウェーハを基
板とすることを特徴とする弾性表面波デバイス。
8. A surface acoustic wave device comprising the piezoelectric single crystal wafer according to claim 1 as a substrate.
JP25250098A 1998-09-07 1998-09-07 Piezoelectric single crystal wafer, its manufacture and surface acoustic wave device Pending JP2000082931A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25250098A JP2000082931A (en) 1998-09-07 1998-09-07 Piezoelectric single crystal wafer, its manufacture and surface acoustic wave device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25250098A JP2000082931A (en) 1998-09-07 1998-09-07 Piezoelectric single crystal wafer, its manufacture and surface acoustic wave device

Publications (1)

Publication Number Publication Date
JP2000082931A true JP2000082931A (en) 2000-03-21

Family

ID=17238245

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25250098A Pending JP2000082931A (en) 1998-09-07 1998-09-07 Piezoelectric single crystal wafer, its manufacture and surface acoustic wave device

Country Status (1)

Country Link
JP (1) JP2000082931A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001332949A (en) * 2000-05-19 2001-11-30 Toshiba Corp Method for manufacturing surface acoustic wave element
WO2006046494A1 (en) * 2004-10-25 2006-05-04 Ngk Insulators, Ltd. Piezoelectric/electrostrictive device
JP2017222029A (en) * 2017-08-31 2017-12-21 日本碍子株式会社 Composite substrate polishing method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001332949A (en) * 2000-05-19 2001-11-30 Toshiba Corp Method for manufacturing surface acoustic wave element
KR100453083B1 (en) * 2000-05-19 2004-10-15 가부시끼가이샤 도시바 A method for manufacturing surface acoustic wave
WO2006046494A1 (en) * 2004-10-25 2006-05-04 Ngk Insulators, Ltd. Piezoelectric/electrostrictive device
US7402936B2 (en) 2004-10-25 2008-07-22 Ngk Insulators, Ltd. Piezoelectric/electrostrictive device
JP2017222029A (en) * 2017-08-31 2017-12-21 日本碍子株式会社 Composite substrate polishing method

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