JP2950497B2 - Semiconductor wafer and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer for a micromachine such as a pressure sensor and a method of manufacturing the same, and more particularly, to a high flatness (TTV: Total).
The present invention relates to a technique for producing a thin silicon wafer (thickness value is 1 μm or less) and thin (thickness is 100 μm or less).

[0002]

2. Description of the Related Art Heretofore, a thin and high flatness silicon wafer provided for a micromachine has been manufactured by the following method. That is, the wrapped silicon wafer is etched and further polished using wax. In this wax polishing, a silicon wafer (etched wafer) is attached to a polishing board with wax, and one surface thereof is first subjected to mechanochemical polishing. After this polishing, the wax was removed by washing, and the other side was polished with wax.

[0003]

However, such a conventional method has the following disadvantages. That is,
Although a thin silicon wafer can be manufactured, there is a drawback that the flatness of the surface is deteriorated (TTV: 3 to 10 μm) because wax is used for polishing. In addition, there is a problem that a crack occurs when the wafer is peeled off from the polishing platen. Further, there is also a problem that it takes time and effort to apply wax to the back surface of the wafer and stick it to the platen, and to remove the wax by washing. Moreover, once the wafer has been polished, it is difficult to rework the wafer.

[0004]

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to produce a thin and highly flat semiconductor wafer. An object of the present invention is to provide a semiconductor wafer that can reduce the size of an element (element for micromachine). Another object of the present invention is to produce a thin and highly flat semiconductor wafer in a short time. SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a thin, high flatness wafer having a high production yield without causing cracks in a semiconductor wafer during fabrication. Another object of the present invention is to provide a method of manufacturing a semiconductor wafer which does not require wax cleaning, and aims to provide a method that facilitates rework. A further object of the present invention is to provide a manufacturing method capable of completely eliminating the damage from being held by a chuck that may damage the wafer.

[0005]

According to the first aspect of the present invention, in a semiconductor wafer having both front and back surfaces polished, the thickness is 100 μm or less, and both front and back surfaces of the semiconductor wafer are 1 μm or less in TTV. It is a semiconductor wafer.

According to a second aspect of the present invention, there is provided a grinding step of grinding a surface opposite to a polished surface of a semiconductor wafer whose one surface has been polished in advance to reduce the thickness to 105 to 120 μm; A polishing step of vacuum-adhering a polished surface of the semiconductor wafer and polishing the polished surface of the semiconductor wafer. Note that the grinding mentioned here includes cutting in addition to grinding using fixed abrasive grains by a grinding machine.

According to a third aspect of the present invention, there is provided the method of manufacturing a semiconductor wafer according to the second aspect, wherein, in the polishing step, the vacuum-adsorbed semiconductor wafer is polished with a polishing cloth rotated at a high speed. For example, polishing cloth (polishing machine) is 1000 to 60
The semiconductor wafer vacuum-adsorbed at 00 rpm is 50-
It shall be rotated at 100 rpm.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor wafer according to the second or third aspect, wherein in the semiconductor wafer having one surface polished in advance, an oxide film is applied to the polished surface. Is the way.

[0009]

In the semiconductor wafer according to the first aspect, since the thickness is set to 100 μm or less, cracks hardly occur during handling. Therefore, in the method of the present invention, the semiconductor wafer is easy to handle. Also,
With a high degree of flatness, the yield in manufacturing microelements can be further increased.

According to the second aspect of the invention, a thin semiconductor wafer having a high flatness can be manufactured. At that time, the wafer is not broken. Also, there is no need to attach wax or wash the wax. Further, since the damage is smaller in the grinding than in the case of the lap, the polishing amount can be reduced.

According to the third aspect of the present invention, a thin semiconductor wafer having a high flatness can be manufactured at a high throughput.

According to the fourth aspect of the present invention, since an oxide film is applied to the polished surface of the polished wafer, the polished surface is protected by the oxide film during grinding or the like. That is,
In the grinding step and the subsequent polishing step of the ground surface, it is possible to completely prevent the damage caused by the chuck or the like holding the semiconductor wafer. In view of the fact that the semiconductor wafer may be damaged depending on the type of the chuck, this is to completely eliminate such additional damage when the chuck is used. Note that the oxide film can be deposited by thermal oxidation, CVD oxidation, or the like. After the polishing of the ground surface is completed, the oxide film is removed by, for example, HF cleaning.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. 1 and 2 are views showing the flatness of a silicon wafer according to one embodiment of the present invention. FIGS. 3 and 4 show the flatness of a silicon wafer manufactured by a conventional method. In the method of the present invention, the thickness is 500 to 20
A silicon wafer having a thickness of 105 to 120 μm by grinding a surface opposite to the polished surface of a silicon wafer having one surface polished in advance.
Drop it. Further, the ground surface of the silicon wafer is mirror-polished (mechanochemical polishing) by rotating the polishing cloth at a high speed (1000 to 6000 rpm) using a known polishing machine. At this time, the polished surface of the silicon wafer is ground and polished by vacuum suction. As a result, a silicon wafer having a thickness of 100 μm was obtained. The flatness of this silicon wafer is 0.78 μm in TTV. In the conventional method using wax polishing, the flatness is 3.00 μm.
m. The evaluation of TTV was performed using a known ADE (capacitance type flatness meter).

In the above-mentioned silicon wafer, an oxide film may be applied to a polished surface (mirror surface) to a predetermined thickness before the single-side grinding. Thermal oxide film or CVD
Any of oxide films (such as LTO) may be used. The application of the oxide film in this case is performed using a known means. This oxide film is for completely eliminating the damage added by chucking by the vacuum chuck (chuck that may cause damage) in the grinding step and the polishing step. After the final polishing step, the oxide film thus deposited is removed by, for example, HF solution cleaning.

FIG. 5 shows the relationship between the flatness of a silicon wafer and the number of elements (yield) per wafer. FIG. 6 shows the relationship between the thickness of the silicon wafer and the crack rate in the subsequent steps (handling). The cutting of the silicon wafer that can be used in place of the above-described grinding is performed using a “fly cutter F300 / 1000” manufactured by Kuggler, Germany.

In another embodiment, a sliced wafer is wrapped, first reduced to a certain thickness by single-side grinding, the ground surface is polished without wax, and the opposite surface is ground by a single-side grinding machine. To the desired thickness.
Thereafter, the ground surface is similarly polished without wax. Even with this method, a double-side polished silicon wafer having a desired thickness can be obtained. In this case, the flatness of the front and back surfaces was also sufficiently satisfied as described above. In addition, a well-known thing can be used as a one-side grinding machine and a one-side polishing machine. FIG. 7 shows a single-sided grinding machine. In this single-side grinding machine, a silicon wafer W is mounted on a stage S, and each side thereof is ground by a rotating grinding blade B.

[0017]

According to the present invention, a thin and high flatness wafer can be obtained. For example, a 6-inch wafer having a thickness of 100 μm or less and a TTV of 1 μm or less is possible. Further, since no wax is used in the polishing step, there is no problem of wafer cracking at the time of peeling.
Also, rework of the wafer is possible. Further, the trouble of removing the wax is unnecessary, and the cleaning after the processing is easy. Also, it has high throughput. In addition, unmanned manufacturing is possible. This leads to space saving on equipment. Further, the cleanliness of the process can be improved. Furthermore, the yield of devices from the wafer is improved.

[Brief description of the drawings]

FIG. 1 is a diagram showing the flatness of a silicon wafer according to one embodiment of the present invention by contour lines.

FIG. 2 is a diagram schematically showing flatness of a silicon wafer according to one embodiment of the present invention.

FIG. 3 is a diagram showing the flatness of a silicon wafer manufactured by a conventional method by contour lines.

FIG. 4 is a diagram schematically showing the flatness of a silicon wafer manufactured by a conventional method.

FIG. 5 is a graph showing the relationship between the number of elements per silicon wafer and its flatness.

FIG. 6 is a graph showing the relationship between the thickness of a silicon wafer and its cracking rate.

FIG. 7 is a schematic view showing a single-side grinding machine used in one embodiment of the present invention.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-56-129699 (JP, A) JP-A-9-97775 (JP, A) JP-A-5-315305 (JP, A) JP-A-3-3 221367 (JP, A) JP-A-7-321363 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 21/304 H01L 21/02

Claims (4)

(57) [Claims] 1. A semiconductor wafer having both front and back surfaces polished, the thickness of which is 100 μm or less, and the front and back surfaces of the semiconductor wafer are 1 μm or less by TTV. 2. A grinding step of grinding a surface opposite to the polished surface of a semiconductor wafer that has been previously polished on one side to a thickness of 105 to 120 μm, and polishing the semiconductor wafer after the grinding. A polishing step of polishing a ground surface by vacuum suction of the surface. 3. The method of manufacturing a semiconductor wafer according to claim 2, wherein, in the polishing step, the vacuum-adsorbed semiconductor wafer is polished using a polishing cloth rotated at a high speed. 4. The method for manufacturing a semiconductor wafer according to claim 2, wherein said semiconductor wafer having one surface polished in advance is coated with an oxide film on said polished surface.