JP2000066638A - Plasma display method, and plasma display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent thermal breakage of a data driver IC by suppressing excessive increase of the power consumption, to achieve a high integration of circuit density, to reduce the manufacturing cost, and to display an image of higher quality than the standard one by increasing the display gradation number when the power consumption is small since the data driver loss leaves a margin. SOLUTION: The plasma display device comprises a data driver 1, a scan driver 2 and a common driver 6 to drive a data electrode, a scan electrode and a common electrode, respectively, a frame memory 3, and a display drive control part 4 to perform a sub field sequence control. A sub field number monitoring control part 5 performs the monitoring by inputting the sub field number of the display sequence from the display drive control part 4, and monitors the display data to be supplied from the frame memory 3 to the data driver 1 by the transition pattern to predict the power consumption of the data driver, and reduces the display gradation number so that the data is not written or switched from the sub field of the lightest weighting of the display gradation.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device used as a wall-mounted television, a high-definition HDTV, or the like.

[0002]

2. Description of the Related Art A plasma display device is promising as a wall-mounted television and further as a finer and higher quality HDTV because of its feature of being thin and capable of displaying a large screen color. The display panel of the plasma display device has a structure in which data electrodes are regularly arranged on one surface, and scan electrodes are arranged on an opposing surface having a predetermined gap so as to be orthogonal to the data electrodes. The micro discharge cells are formed at the same time. When the light emission mode is the surface discharge / AC drive type, a common electrode that is paired with each scan electrode is arranged in addition. The three types of electrodes are electrically insulated and are in a coupling relationship by capacitance between each other. Generally, in a color display panel, one pixel of a square is constituted by three color discharge cells of red, green and blue, so that the data electrodes are arranged particularly close to each other.

In the display method, a write discharge based on display data is performed between the data electrode and the scan electrode, and the sustain discharge is performed between the scan electrode and the common electrode so as to have sufficient luminance for visual observation. As a method of performing gradation display of color display on the plasma display panel, since each discharge cell is a digital display of turning on or off, a plurality of display periods (for example, one field display period or one frame display period) of one screen are required. Display period (for example, subfield period)
It is known that gray scale display is performed by time-division and weighting the number of sustain discharges in each display period corresponding to the number Np of display gray scales (Np is an integer of 2 or more). For example, one field display period 1F (for example, about 1
6.6 ms) is divided into sub-field periods SF1 to SF6 including six data write periods WP and sustain discharge periods SP.
And the number of sustain discharges in each of the subfield periods SF1 to SF6 is weighted with a ratio of 32: 16: 8: 4: 2: 1 corresponding to the MSB bit to LSB bit of the display gradation. , 6 bits, and 64 gradations are displayed.

As described above, the AC drive type plasma display apparatus performs at least Np times of data write operation in performing 2Np gray scale display with Np bits of display data. Further, since the gradation display is time division in the subfield, it is necessary to further prevent the image quality from being deteriorated due to the occurrence of the outline which occurs in the moving image display. is there. As described above, the higher the quality of the display, the greater the number of data writing operations, the greater the power consumption of the driver, and an excessive heat load on the integrated data driver.

[0005] In a conventional plasma display device, for example, in Japanese Patent Laid-Open No. 6-259034, the difference in power consumption between when the average video level of a video signal is high and when the average video level is low is large, and the load on the power supply increases. As a solution to the problem, the brightness of the displayed image is increased by m stages (m is 2) by comparing the average video level of the video signal with the set level.
Display the halftone image by switching the number of time divisions N according to the brightness level of the display image so that the number of display gradations increases as the brightness of the display image increases. I am trying to do it.

[0006]

However, in this conventional gradation display method, the difference in power consumption is controlled so as to be reduced and averaged based on the brightness of the entire screen. Fig. 13 with the largest power
There is a problem that there is no effect of suppressing the power for the repeated image display of the display pattern as shown in FIG. Therefore, power consumption and heat generation exceeding the allowable level in the data driver IC in such a case pose a problem.

The present invention has been made in view of such a problem, and can suppress an excessive increase in power consumption and prevent thermal destruction of a data driver IC, thereby achieving high integration of a circuit density. The present invention provides a plasma display device capable of increasing the number of display gradations and displaying a higher-quality image than a standard when the power consumption is small because the manufacturing cost is low and the data driver has a margin for loss of data driver. The purpose is to:

[0008]

According to the plasma display method of the present invention, the power consumption of a data electrode driver is monitored by a display transition pattern, and a display sequence is changed based on data which predicts a loss amount of the data driver. It is characterized in that data is not written / switched from the subfield with the lightest display gradation weight and the number of display gradations is reduced for display.

According to the present invention, the power consumption of the data electrode driver is monitored in accordance with the transition pattern of the display, and the display sequence is changed based on the data predicting the loss amount of the data driver. The thermal destruction of the driver IC can be prevented. Therefore, the circuit density can be increased to achieve high integration, and the manufacturing cost can be reduced.
In addition, since there is a margin for the loss of the data driver, when the power consumption is small, it is possible to increase the number of display gradations and display a higher quality image than the standard.

A plasma display device according to the present invention temporarily stores data electrodes, scan electrodes, and common electrodes, data drivers, scan drivers, and common drivers for driving these electrodes, and display data input from the outside. A frame memory for supplying this to the data driver, and a subfield required for gradation display by supplying display data from the frame memory to the data driver and supplying drive timing signals for the data driver, scan driver and common driver. A display drive control unit that performs sequence control, and inputs and monitors the number of subfields of the display sequence from the display drive control unit, and monitors display data supplied from the frame memory to the data driver in a transition pattern. Turn off the data driver And having a number of subfields monitoring control unit to specify this by supplying the number of sub-fields for predicting power the display drive unit based on the prediction data.

In the plasma display device, the subfield number monitoring control unit may reduce the number of display gradations by not writing / switching data from the subfield with the lightest display gradation weight. Can be configured. Further, the subfield number monitoring control unit includes:
A data transition detection and counting section for detecting and counting data transitions by inputting display data and a data transfer clock from the frame memory and the display drive control section, and weighting a power amount ratio according to the type of data transition pattern. And a data driver loss amount estimating unit that estimates the data driver loss amount by extracting the maximum IC loss amount and specifies the number of subfields to the display drive control unit. it can.

In this case, the data transition detection and counting section can be configured to include a data transition detection section and a counting section for counting the data transition detected by the detection section. The detection unit of the transition is to detect by referring to 6-pixel data of 2 rows and 3 columns, or the detection unit of the data transition is to detect by referring to 10-pixel data of 2 rows and 5 columns Can be configured.

The display panel of the plasma display device has data electrodes Xj (j = 1 to n) and scan electrodes Yk (k = 1 to n).
m) and a common electrode Z are provided, and a data driver, a scan driver, and a common driver connected to these electrodes are provided. In a large-screen high-definition color display panel, red, green, and blue electrodes for three colors are provided on the data side, the wiring interval on the data side is narrower than that on the scan side, and the data driver must have a high circuit density. Highly integrated. On the other hand, since the data electrodes are particularly close to each other, the capacitance between the data electrodes is a large value, and the mutual capacitance between the scan electrode and the common electrode arranged opposite to each other is added. Is accompanied. Therefore, it is a known example that the charge is recovered from the charged capacitive load and is repeatedly used to reduce the consumption. In a high-definition large-screen display panel, a highly integrated data driver IC still involves a heavy power consumption.

The power consumption differs depending on the display transition pattern, for example, a large value occurs in a display pattern in which adjacent data electrodes simultaneously perform opposing potential transitions.
In addition, the gradation display of a color image is a method of dividing into at least Np subfields when performing 2Np gradation display with Np bit display data.
The higher the color display quality, the greater the number of data writing operations and the greater the power consumption.

Therefore, in the present invention, a subfield number monitoring control unit is provided. In the subfield number monitoring control unit, the power consumption of the data electrode driver is monitored with the display transition pattern, the power amount ratio is weighted according to the type of the display transition pattern, and integrated by the number of circuits for each data driver IC. The display sequence is dynamically changed to increase or decrease the number of subfields based on the data in which the maximum IC loss is extracted and the data driver loss is predicted. For example, an excessive increase in power consumption is suppressed by reducing the number of display gradations by preventing writing / switching of data from a subfield with the lightest display gradation weight. Further, when there is a margin for the data driver loss and the power consumption is small, it is possible to achieve a high image quality display in which the number of display gradations is increased from the standard.

[0016]

Embodiments of the present invention will be specifically described below with reference to the accompanying drawings. FIG. 1 is a block diagram showing a plasma display device according to an embodiment of the present invention. As shown in FIG. 1, the plasma display panel has a data electrode Xj (j = 1 to n) and a scan electrode Yk (k = 1 to n).
m) and a common electrode Z are provided. These data electrode Xj, scan electrode Yk and common electrode Z are connected to data driver 1, scan driver 2 and common driver 6, respectively, and are driven by these drivers. The data driver 1 is generally composed of an IC in which a driving circuit is integrated, and is further generally divided into a plurality of IC groups, and is generally constructed in a plurality of IC groups. The circuit is installed on a structure that can be considered to have the same operating temperature environment. The frame memory 3 temporarily stores display data input from the outside,
The data is supplied to the data driver 1.

The display drive controller 4 is supplied with horizontal and vertical synchronization clocks, supplies display data from the frame memory 3 to the data driver 1 and supplies a timing clock for driving, and furthermore, the scan driver 2 and the common driver 6 By supplying the drive timing control signal to the
Performs subfield sequence control necessary for gradation display.

A feature of the present invention resides in that a subfield number monitoring control unit 5 is provided. The subfield number monitoring control unit 5 inputs and monitors the number of subfields of the display sequence performed by the display drive control unit 4, and displays the display data supplied from the frame memory 3 to the data driver 1 in a transition pattern. It monitors and predicts the power consumption of the data electrode driver, and supplies the number of subfields to the display drive control unit 4 to specify it.
The subfield number monitoring control unit 5 receives the display data and the data transfer clock from the frame memory 3 and the display drive control unit 4 as input, detects the pattern of the data transition, and integrates the data transition by the number of circuits for each data driver unit. And a detection / counting unit 51 for detecting and counting data, and weighting the power ratio according to the type of the data transition pattern, extracting the maximum IC loss, predicting the data driver loss, and controlling the display drive. And a data driver loss amount prediction unit 52 for designating the number of subfields to the unit 4.

The data transition detection and counting section 51 in FIG.
Is composed of a data transition detection unit 510 shown in FIG. 2 and a counting unit 511 and counting units 512 to 515 shown in FIG. The data transition detection unit 510 shown in detail in FIG.
The display data of the data electrode Xj of interest is the scan electrode Y
The two rows and three columns determine whether there is a change from the time of writing with k-1 to the time of driving for writing with the scan electrode Yk and, at the same time, whether the display data of the adjacent electrodes Xj-1 and Xj + 1 also change. The detection is performed with reference to the six pixel data. The data transition detection unit 510 includes a data electrode Xj and a scan electrode Y that focus on data transition detection.
k, the temporary memory M (0,
0) and a temporary memory M of data of the adjacent electrode Xj-1.
(-1, 0) and a temporary memory M for data of the electrode Xj + 1
(1, 0) and a similar temporary memory M (0,-) storing data driven at the time of the electrode Yk-1 one scan before.
1), M (-1, -1), M (1, -1), three exclusive OR gates EXOR, and five AND gates A
ND and four inverters. The data stored in these six temporary memories is, as shown in FIG.
This is display data of pixels in two rows and three columns adjacent to an arbitrary electrode Xj. In this way, the data is stored, and the detection signal DA, the detection signal DB,
The output of each of the detection signal DC, the detection signal DD, and the detection signal DE is obtained. It should be noted that the embodiment shown here is merely an example, and the present invention is not limited to this. For example, the configuration can be expanded to easily refer to 10-pixel data in 2 rows and 5 columns. Further, the configuration of the logic circuit in the data transition detection unit 510 is not limited to the configuration shown in FIG. 2, and may be, for example, the configuration shown in FIGS.

The counting section 511 shown in FIG.
Counter for counting the signal CLK of the logical product of the clock signal and the data transfer clock DCK, a cycle counter for generating a signal R for initializing this counter operation with the cycle T of the number of driver circuits NIC, and a latch circuit for temporarily holding the counter output And counts the number of occurrences of the detection signal DA. Counting section 51
2 is responsible for counting the number of occurrences of the detection signal DB, and this configuration is the same as that of the counting unit 511. Similarly, the counting unit 513 is responsible for counting the number of occurrences of the detection signal DC, the counting unit 514 is responsible for counting the number of occurrences of the detection signal DD, and the counting unit 515 is counting the number of occurrences of the detection signal DE, and the configuration is the same as that of the counting unit 511. .

Further, the data driver loss amount estimating unit 52 in FIG. 1 is a processing unit using a microprocessor. For details, a power amount ratio according to the type of data transition pattern is weighted, integrated for each data driver, and temporarily processed. It comprises an arithmetic processing unit 520 (see FIG. 7) for storing, and a data driver loss amount prediction unit 521 (see FIG. 8). As shown in FIG. 7, the arithmetic processing unit 520 stores the temporary memory D1 of the number of driver configurations (integer s) and the temporary memories D2 to Ds as IC units or IC set group units, The corresponding electric energy ratios α and β, 2β,
The process of multiplying each of the latch output data of the counting units 511 to 515 by β, 2β, the demultiplexer process of distributing the result data of the multiplication process to the temporary memories D2 to Ds, and the selection control process of this distribution , Time division. FIG.
The data driver loss amount prediction unit 521 shown in FIG. 9 performs a process of extracting the maximum value of the data driver loss prediction amount from the data held in the temporary memories D2 to Ds, and a look-up table having input / output relation data shown as an example in FIG. And a comparison determination process of inputting and comparing the output number of subfields with the number of subfields being executed by the display drive control unit 4 and specifying the new number of subfields to the display drive control unit 4. .

Next, the operation of the plasma display device according to the present embodiment configured as described above will be described. The detection of the data transition in the data transition detection unit 510 in FIG. 2 will be described first with reference to FIGS. FIG.
Is a display panel schematically displayed, and the data electrodes Xj of interest on which the data driver drives the writing of display data are provided with the capacitances C11 and C12 between the counter electrodes and the capacitance C between the adjacent electrodes.
2, C3, etc. are attached. Capacity C3
Is a small value of about several percent of the capacitance C2.

In the present embodiment, the capacitance C3 having a small effect is omitted, and the detection of a two-row, three-column pattern referring to display data on two-row scan electrodes will be mainly described for data transition of three columns of data electrodes. . If it is desired to further increase the power consumption accuracy, a 2-row, 5-column pattern including the capacitance C3 may be detected.

Now, in the six temporary memories in FIG.
That is, stored data D (Xj-1, Yk-1), D (Xj, Yk-1), D (Xj + 1, Yk-1), D (Xj
An operation in the case where an example of the display pattern shown in FIG. 13 is stored as (-1, Yk), D (Xj, Yk), and D (Xj + 1, Yk) will be described. In the display pattern (a) shown in FIG. 13, when the scan electrode Yk-1 and the electrode Yk are used, the data electrode Xj-1 and the electrode Xj
j, display data of electrode Xj + 1 is turned off (L), turned on (H), turned off
(L) is a pattern having no data shift. At this time, detection signals DA, DB, D from detection section 510 in FIG.
Each of the outputs of C, DD, and DE receives the signal DA, which is the output of the AND gate AND, when the output of the exclusive OR gate EXOR becomes L, and outputs the L signal, and the detection signals DB, DC , DD, and DE also have an L output.
In the display pattern (b) shown in FIG. 13, similarly, each of the detection signals DA, DB, and DD has an H output, and the detection signals DC and DE have an L output.

The detection signal DA becomes level H when a charge cycle of power consumption relating to the capacitance C1 (= C11 + C12) between the opposed electrodes is detected at the electrode Xj, and the detection signal DB is applied to the adjacent electrode Xj-1 at this time. When the charge cycle of power consumption related to the capacitance C2 between the adjacent electrodes is detected without data displacement, the level becomes H. The detection signal DC detects the detection signal DA at the same time as detecting the power consumption cycle in which the adjacent electrode Xj-1 has a data displacement in a phase opposite to that of the electrode Xj and the discharging and charging related to the capacitance C2 between the adjacent electrodes are doubled. Level H when Similarly, the detection signal DD and the detection signal DE are detected in relation to the electrode Xj-1 and the electrode Xj + 1 at the symmetric position.

FIG. 4 shows a circuit for detecting the detection signal DC shown in FIG.
The detection circuit of the detection signal DA shown in FIG.
The detection circuit E is an example in which a result equivalent to the detection circuits shown in FIG. 2 is obtained.

Then, next, these display patterns are transferred to the data driver, and the driver load state when the scan electrodes Yk are driven on the display panel will be described with reference to FIG. In the display pattern (b), the capacitance C1 (= C11 + C12)
, The charging power of the capacitor C2 between the electrodes Xj-1 and the charging power of the capacitor C2 between the electrodes Xj + 1 are consumed via the data driver. In the display pattern (a) in which no data transition is detected, the display lighting rate is 1/3, but this reactive power is not consumed through the data driver. FIG. 12 shows the power consumption when these display patterns are repeatedly displayed. The power consumption in the data driver is omitted because the effective power consumption due to gas discharge at the time of display writing is small, but it can be seen that the power consumption is mainly due to the capacitance C2 due to the data displacement. Display pattern (c) with the same display lighting rate
Also in (f), there is a large difference in the consumption of reactive power in the data driver. Therefore, it is necessary to determine the power consumption based on the display transition pattern monitoring. From the above operation description, FIG.
Regarding various display patterns that are not illustrated in FIG. 3, for example, the load state of the driver such as the display of full lighting (all of the temporary memory data in 2 rows and 3 columns is H) and no consumption of reactive power is estimated in advance. It can be determined.

The counting section 511 shown in FIG.
Each time A goes to level H, the counter operates and the driver I
The counter value is temporarily held in the latch circuit and the counter value is initialized in the cycle T of the number of driver circuits NIC which constitutes the driver block as a unit of C unit or IC unit group. In the counting section 512, the detection signal DB
Counting unit 513, and the counting unit 513 detects the detection signal D
The occurrence count of C, the counting section 514 counts the occurrence count of the detection signal DD, and the counting section 515 counts the occurrence count of the detection signal DE. These operations are the same as those of the counting section 511.

The arithmetic processing unit 520 shown in FIG. 7 multiplies each of the latch output data of the counting units 511 to 515 by the power ratio α and β, 2β, β, 2β, and outputs the result data of this multiplication process. The distribution of the driver configuration number (integer s) as an IC unit or a unit of an IC set group (integer s) to the temporary memories D2 to Ds and the integration process are performed in a time sharing manner. Here, the power amount ratio is the amount of power that generates heat in the data driver per drive, and the ratio α∝capacity C1 (= C11 + C12) × (voltage V) ² and the ratio β∝capacity C2 × (voltage V ) ² )

The data driver loss amount predicting section 5 shown in FIG.
21 extracts the maximum value of the data driver loss prediction value from the data held in the temporary memories D2 to Ds, and as shown in an example in FIG. The number of subfields executed by the display drive control unit 4 is determined by inputting so as to reduce the number of fields ns to the minimum value Ls and to use the maximum value Ms in the area a where the loss in the data driver is small. The number of fields is specified to the display drive control unit 4.

FIG. 10 shows the subfield number monitoring control unit 5.
10 shows an example of the subfield sequence control performed by the display drive control unit 4 based on the instruction of FIG. 10A. In the area a where the loss in the data driver is small as shown in FIG. The number of fields is designated to form a one-field configuration composed of subfields SF1 to SF10. As shown in FIG. 10B, in a region b showing an intermediate loss, a configuration is sequentially deleted from the subfield SF10. . FIG. 10C shows a configuration example (Ls = 6) of the subfield in which the number of subfields is reduced to the minimum value Ls in the region C where the loss is the maximum.

Since the number of display gradations is reduced by not writing / switching data from the (LSB) subfield having the highest probability of data transition and the lightest display gradation weight, the display image quality is reduced. The effect is minimal and the effect is large.

[0033]

As described in detail above, according to the present invention, the power consumption of the data driver is predicted based on the detected amount of the data transition pattern, and the number of subfields is reduced when displaying a large amount of power. Power consumption during the data writing period is reduced, and a highly reliable plasma display device can be realized.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a plasma display device according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a data transition detection unit 510 according to the present embodiment.

FIG. 3 is a circuit diagram showing a modification of the logic circuit of the data transition detection unit 510.

FIG. 4 is a circuit diagram showing a modification of the logic circuit of the data transition detection unit 510.

FIG. 5 is a circuit diagram showing a modified example of the logic circuit of the data transition detection unit 510.

FIG. 6 is a diagram illustrating data stored in a temporary memory according to the present embodiment.

FIG. 7 shows data transition counting units 511 to 515 and a calculation unit 5
FIG.

FIG. 8 is a block diagram showing a data driver loss amount prediction unit 521.

FIG. 9 is a diagram showing the operation of a data driver loss amount prediction unit 521.

FIG. 10 is a diagram illustrating subfield sequence control of a display drive control unit.

FIG. 11 is a diagram showing a driver load state.

FIG. 12 is a diagram showing power consumption.

FIG. 13 is a diagram showing a display pattern.

[Explanation of symbols]

 1: data driver 2: scan driver 3: frame memory 4: display drive control unit 5: subfield number monitoring control unit 6: common driver 51: data transition detection counting unit 52: data driver loss amount prediction unit 510: data Transition detecting sections 511 to 515: counting section 520: calculating section 521: data driver loss amount predicting section

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H04N 5/66 H04N 5/66 A 101 101B

Claims (7)

[Claims] The power consumption of a data electrode driver is monitored by a transition pattern of a display, and a display sequence is changed based on data predicting a loss amount of a data driver. A plasma display method characterized in that display is performed with a reduced number of display gradations without performing writing / switching. 2. A data electrode, a scan electrode, and a common electrode, a data driver, a scan driver, and a common driver for driving these electrodes, and display data input from the outside are temporarily stored and supplied to the data driver. And display drive control for performing subfield sequence control necessary for gradation display by supplying display data from the frame memory to the data driver and supplying drive timing signals for the data driver, scan driver, and common driver And the number of subfields of the display sequence from the display drive control unit and monitor the same, and monitor the display data supplied from the frame memory to the data driver in a transition pattern to reduce the power consumption of the data driver. Make predictions and use this And a subfield number monitoring control unit for supplying the number of subfields to the display drive unit and designating the number of subfields. 3. The sub-field number monitoring control unit reduces the number of display gradations by not writing / switching data from a sub-field having the lightest display gradation weight. Item 3. A plasma display device according to item 2. 4. A data transition detection and counting section for receiving display data and a data transfer clock from the frame memory and the display drive control section and detecting and counting data transitions. Data that weights the power ratio according to the type of data transition pattern, extracts the maximum IC loss, predicts the data driver loss, and specifies the number of subfields to the display drive control unit. The plasma display device according to claim 2, further comprising a driver loss amount prediction unit. 5. The plasma according to claim 4, wherein the data transition detection and counting unit has a data transition detection unit and a counting unit that counts the data transition detected by the detection unit. Display device. 6. The plasma display device according to claim 5, wherein the data transition detecting unit detects by referring to 6-pixel data of 2 rows and 3 columns. 7. The plasma display device according to claim 5, wherein the data transition detecting unit detects by referring to 10 pixel data in 2 rows and 5 columns.