JP2000059034A - Resistor, printed board provided with built-in capacitor and formation thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a printed board of a structure, wherein the electrical characteristics of the printed board are improved and a high-density mounting is made possible. SOLUTION: A printed board, which is provided with a power supply layer 11, a grounding layer 5, a signal layer 2 and the like of which the printed board is formed, is furthermore provided with a resistance layer 3 having a pull-up resistor 8 formed of a material having resistance characteristics, a dielectric layer 10 formed of an insulating material and a capacitor layer having two electrode layers 4a and 4b, which are formed of a conductor material and hold the layer 10 between them, utilizing the internal layers in the printed board.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board with a built-in resistor and capacitor, and more particularly to a printed circuit board with a built-in resistor and capacitor which has improved electrical characteristics and can be mounted at high density.

[0002]

2. Description of the Related Art Conventionally, a printed circuit board has a through hole, a PAD (pad) for mounting electronic components such as an IC, a resistor, a capacitor, and an LED (light emitting diode), and a pad for electrically connecting these electronic components. Are arranged on a plane. In addition, the function is realized by increasing the number of wiring layers as needed and connecting these layers with through holes.

As a conventional example described above, Japanese Utility Model Laid-Open No. 1-089
No. 781 discloses a multilayer printed circuit board. This substrate is provided with a noise preventing capacitor in which a dielectric is sandwiched between electrodes in an inner layer of the multilayer printed board used in an electric circuit.

A wiring substrate described in Japanese Patent Application Laid-Open No. H5-110264 is a wiring substrate having a wiring layer on a silicon substrate, and a first electrode layer, a dielectric layer, A capacitor in which two electrode layers are sequentially laminated is formed. In this case, a silicon substrate is used as a first electrode layer of the capacitor.

[0005]

In recent years, as the demand for high-density mounting on a printed circuit board has increased, the number of electronic components that can be mounted has been limited by the surface area of the printed circuit board. Further, there has been a problem that the mounting design of a printed circuit board has become extremely difficult due to the arrangement conditions of a bypass capacitor or the like to be mounted near a terminal of an IC (integrated circuit).

[0006] Further, the conventional example disclosed in the above-mentioned conventional example 1-0897.
No. 81, Japanese Patent Application Laid-Open No. 5-110
The wiring board described in Japanese Patent Publication No. 264 does not use an inner layer, but rather manufactures a capacitor by separately providing an electrode and a dielectric, or simply inserts an existing capacitor into a printed circuit, which requires a lot of man-hours. It was a substrate.

Accordingly, an object of the present invention is to provide a printed circuit board using an inner layer which improves electrical characteristics and enables high-density mounting in order to solve the above-mentioned problems.

It is another object of the present invention to provide a method for forming a printed circuit board using an inner layer.

[0009]

In order to achieve the above object, a printed circuit board according to the present invention includes a power supply layer, a ground layer, a signal layer, and the like as inner layers. A resistance layer having a resistance formed of a material having a resistance characteristic, and a dielectric layer formed of an insulating material using an inner layer, and two electrode layers formed of a conductor material and sandwiching the dielectric layer And a capacitor layer having the following.

Preferably, the resistance layer is connected to the power supply layer and the integrated circuit.

Further, the capacitor layer is preferably connected to the ground layer and the integrated circuit.

Further, the method of forming a printed circuit board according to the present invention includes a power supply layer, an earth layer, a signal layer, and the like as inner layers.
In a method of forming a printed circuit board on which an integrated circuit is mounted,
The method may further include forming a resistance layer having resistance formed of a material having resistance characteristics using the inner layer.

Furthermore, it is preferable that the resistance layer is connected to the power supply layer and the integrated circuit.

Still further, the method further includes the step of forming a capacitor layer having a dielectric layer formed of an insulating material and two electrode layers sandwiching the dielectric layer formed of a conductive material by using the inner layer. preferable.

Preferably, the method further includes a step of connecting a capacitor layer to the ground layer and the integrated circuit.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a sectional view showing the structure of a printed circuit board according to an embodiment of the present invention. This printed circuit board has an insulating layer 1 formed of an insulating material between the surface of the printed circuit board and each layer. Further, there are a signal layer 2, a power supply layer 11, and a ground layer 5 formed of a conductor material (such as copper). Further, the resistance layer 3 having a resistance R8 formed of a material having resistance characteristics.
A dielectric layer 10 formed of an insulating material (such as aluminum) to constitute the capacitor 9;
And electrode layers 4a and 4b of a conductive material arranged so as to sandwich the same.

Next, the operation of the embodiment of the present invention will be described in detail.

FIG. 2 is an equivalent circuit diagram showing the operation of the embodiment of the printed circuit board of the present invention. This equivalent circuit diagram is an example in which integrated circuits IC-A6 and IC-B7 are mounted. IC-A6 has terminals IC-Aa and IC-Ab, and IC-B7 has terminals IC-Ba and IC-Bb. The IC-Aa side, which is one terminal of the IC-A6, is connected to the signal layer 2 because it is a signal line. In addition, IC-A
IC-Ab, which is the other terminal of IC 6, is connected to one terminal I of IC-B7.
It is connected to C-Ba and also connected to the pull-up resistor 8 at the same time. The pull-up resistor 8 realizes the pull-up resistor 8 by using the resistance layer 3 and securing an appropriate area. In addition, other terminal IC-B of IC-B7
b is grounded to the ground 5 via the capacitor C9. One electrode layer Ca of this capacitor C9 is
Bb, and the other electrode layer Cb is connected to the ground layer 5.

As described above, the present invention is characterized in that a resistor and a capacitor layer are prepared in addition to the power supply layer 11, the ground layer 5, the signal layer 2 and the like forming the printed circuit board.

The resistance value of the resistance layer 3 and the capacitance values of the capacitor layers 4a and 4b are obtained as follows. In the case of a resistive layer, the resistance is obtained by the following equation, where only one resistive layer 3 is used, the area formed by the printed pattern is S, and the resistivity of the resistive layer 3 is Ω / S. Can be

Resistance value Ω = (Ω / S) × (S) In the case of a capacitor layer When the capacitor has two electrode layers 4a and 4b, the insulating layer 1 is interposed between the electrode layers 4a and 4b. The dielectric layer 10 has a dielectric constant of ε, the thickness of the insulating layer 1 is L, and the area formed by the printed pattern is S.
Then, the capacitance value is obtained by the following equation.

Capacitance C = (ε) × (S) × (1 / L ² ) Further, according to the method of forming a printed board of the present invention, a layer formed of a material having resistance characteristics is used as an inner layer of the printed board. A method of using and realizing a resistance by using this, and as an inner layer of a printed circuit board, a dielectric layer of an insulating material (such as aluminum) and an electrode layer of a conductor material arranged so as to sandwich the dielectric layer, A method of realizing a capacitor by using these can be considered.

[0024]

As described above, according to the present invention, since the pull-up resistor can be realized in the inner layer, the wiring pattern for connection to the pull-up resistor is shortened. The effect of the problem of the reflection of the electric signal due to the branching is reduced, thereby providing an effect that the electric characteristics can be improved.

Further, since the bypass capacitor can be realized in the inner layer, the connection wiring to the capacitor can be shortened, so that an ideal arrangement can be obtained, which is very effective as a measure against power supply noise.

Further, a conventional mounting area for a pull-up resistor and a bypass capacitor is not required, and mounting another electronic component in this area has an effect of enabling high-density mounting.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a configuration of a printed circuit board according to an embodiment of the present invention.

FIG. 2 is an electric circuit diagram showing the operation of the embodiment of the printed circuit board of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Insulating layer 2 Signal layer 3 Resistance layer 4a, 4b Electrode layer 5 Ground layer 6 IC-A 7 IC-B 8 Resistance R 9 Capacitor C 10 Dielectric layer 11 Power supply layer

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4E351 AA01 AA06 BB03 BB05 BB23 BB24 BB26 BB27 DD01 DD41 GG09 GG20 5E346 AA12 AA13 AA14 AA15 AA41 BB02 BB03 BB04 BB07 BB20 CC01 CC21 CC31 DD07 DD09HFF25H

Claims (7)

[Claims] 1. A printed circuit board on which an integrated circuit is mounted, including a power supply layer, an earth layer, a signal layer, and the like as an inner layer, wherein a resistor formed of a material having resistance characteristics using the inner layer. A capacitor layer having a dielectric layer formed of an insulating material using the inner layer, and two electrode layers formed of a conductive material and sandwiching the dielectric layer. And printed circuit board. 2. The printed circuit board according to claim 1, wherein said resistance layer is connected to said power supply layer and said integrated circuit. 3. The printed circuit board according to claim 1, wherein the capacitor layer is connected to the ground layer and the integrated circuit. 4. A method of forming a printed circuit board on which an integrated circuit is mounted, including a power supply layer, an earth layer, a signal layer, etc. as an inner layer, wherein the inner layer is formed of a material having a resistance characteristic. A method for forming a printed circuit board, further comprising the step of forming a resistance layer having: 5. The method according to claim 4, wherein the resistance layer is connected to the power supply layer and the integrated circuit. 6. The method according to claim 1, further comprising the step of using the inner layer to form a capacitor layer having a dielectric layer made of an insulating material and two electrode layers made of a conductive material and sandwiching the dielectric layer. The method for forming a printed circuit board according to claim 4, wherein: 7. The method according to claim 4, further comprising the step of connecting said capacitor layer to said ground layer and said integrated circuit.