JP2000036770A - Intermittent receiving device and method and portable telephone system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To end a sleep state in the proper timing and in consideration of both frequency and phase errors between the slow and fast clocks. SOLUTION: A 1st clock circuit 20, which supplies a slow clock, a 2nd clock circuit 30 which supplies a fast clock, a power control part 10 which supplies power to operate the circuit 30, a receiving part 60 whose receiving operation is controlled by the clock to be supplied, a switch 50, a control part 40 which controls the intermittent actions of the part 60, a frequency error detection part 41 which detects frequency errors between the slow and fast clocks, a phase error detection part 42 which detects phase errors between the slow and fast clocks, and a wait timing calculation part 43 which decides the timing to switch the part 60 from a sleep state to a wake state in the timing, where both frequency and phase errors caused between the slow and fast clocks are reflected are provided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improved intermittent reception apparatus and method capable of intermittent reception, and a portable telephone device including the improved intermittent reception apparatus.

[0002]

2. Description of the Related Art Communication between a mobile phone and a base station is shown in FIG.
As shown in (1), the transmission is performed by exchanging a subframe sequence including a reception period (paging channel), an idle period, and a transmission period, and information necessary for the transmission period is sequentially transmitted while receiving the reception period.

When the portable telephone device enters a standby state (sleep state) waiting for reception, transmission is no longer necessary, and the portable telephone device receives only a necessary reception period instead of receiving all reception periods sequentially. Operation is performed. That is, after receiving a certain reception period, an operation of going into a sleep state for a predetermined period and going into a wake state to receive the next desired reception period has been repeated.

In the sleep state, a fast clock (master clock) for operating the device is used.
The power supply is stopped by supplying a different clock, a slower clock, instead. In this case, with reference to the counting result of the slow clock, the next timing to put the device in the wake state is determined.

[0005]

However, since the fast clock and the slow clock are supplied separately and independently, they are not synchronized with each other, so that there is a problem that a phase shift occurs between the two.

Further, there is a problem that a crystal oscillation circuit for supplying a slow clock has a temperature dependency, and its clock frequency is apt to fluctuate. Therefore,
A frequency error and a phase error occur between the two clocks, and when the device in the sleep state is set to the wake state by using a slow clock, there is a problem that a deviation from an ideal timing occurs.

SUMMARY OF THE INVENTION The present invention has been made to solve such a conventional problem, and an object thereof is to terminate a sleep state at an appropriate timing in consideration of a frequency error and a phase error between both clocks. And providing intermittent receiving means.

Another object of the present invention is to provide a portable telephone device provided with this intermittent receiving means.

[0009]

According to a first aspect of the present invention, there is provided an apparatus for performing reception at a receiving unit while sleeping at a predetermined interval, wherein the apparatus operates even in a sleep mode and operates slowly. A first clock generation unit for supplying a clock, a second clock generation unit for stopping during sleep and supplying a fast clock, and an intermittent operation of the reception unit receiving at least one of the two clocks Control means for performing control, wherein the control means obtains a frequency error between the two clocks, a means obtains a phase error between the two clocks, and a timing reflecting the frequency error and the phase error between the two clocks, Means for determining a timing at which the receiving unit in a sleep state is set to a wake state.

[0010] Here, the wake state means a state opposite to the sleep state. According to the present invention, the control means obtains the frequency error between the slow clock and the fast clock, also obtains the phase error between the two clocks, and sets the receiver in the sleep state to the wake state at a timing reflecting these. , The sleep state can be terminated at an appropriate timing even if there are frequency errors and phase errors. Further, in the invention according to claim 2, in claim 1, the means for determining the frequency error between the two clocks is means for determining the frequency error in a wake state, and the means for determining the phase error between the two clocks is It is a means for obtaining the phase error a predetermined time before the change from the wake state to the sleep state.

According to the present invention, since the frequency error is obtained in the wake state and the phase error is obtained a predetermined time before the change from the wake state to the sleep state, the frequency error and the phase error can be obtained accurately. Becomes possible.

According to a third aspect of the present invention, in any one of the first and second aspects, the receiver in a sleep state is set to a wake state at a timing reflecting a frequency error and a phase error of the two clocks. The means for performing a predetermined sleep period, at the end timing of the period obtained by adding and subtracting each of the frequency error and the phase error, is a means to put the receiving unit in a sleep state to a wake state. I do.

According to the present invention, the end timing of the sleep period is obtained by adding or subtracting each of the frequency error and the phase error to the predetermined sleep period, so that the end timing can be obtained only by operations such as addition, subtraction, multiplication and division. .

A fourth aspect of the present invention is a portable telephone device including the intermittent receiving device according to any one of the first, second and third aspects. According to the present invention, it is possible to provide a mobile telephone device having an intermittent reception function for terminating a sleep state at an appropriate timing in consideration of a frequency error and a phase error.

According to a fifth aspect of the present invention, there is provided a method of performing reception at a receiving unit while sleeping at a predetermined interval, wherein a slow clock supplied during the sleep and a sleep clock during the sleep are provided. Determining the frequency error between the two clocks of the fast clock to be stopped; obtaining the phase error between the two clocks; and wake-up the receiving unit in the sleep state at a timing reflecting the frequency error and the phase error between the two clocks. And an intermittent receiving method.

According to the present invention, the frequency error between the slow clock and the fast clock is determined, and the phase error between the two clocks is also determined, and the receiver in the sleep state is set to the wake state at the timing reflecting these. Even if a frequency error and a phase error exist, the sleep state can be ended at an appropriate timing.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of an intermittent receiving apparatus according to an embodiment of the present invention.

The intermittent receiving apparatus 100 includes, for example, a first clock circuit 20 for supplying a slow clock having a frequency of 32 (kHz) and a frequency of 14.4 (MH), for example.
z) The second clock circuit 30 for supplying a fast clock
Power supply control section 10 for supplying power to operate second clock circuit 30; receiving section 60 for controlling the receiving operation by the supplied clock; switch 50 for performing the opening and closing operation; And a control unit 40 for performing intermittent operation control.

The control unit 40 includes a frequency error detection unit 41 for obtaining a frequency error between both clocks, a phase error detection unit 42 for obtaining a phase error between both clocks, and a timing reflecting the frequency error and the phase error between both clocks. A wait timing calculator 43 for determining a timing for putting the receiver 60 in the sleep state into the wake state;

Next, the operations of the frequency error detector 41, the phase error detector 42, and the wake timing calculator 43, which are main parts of the present invention, will be described. As shown in FIG. 2, the frequency error detection unit 41
When it is assumed that the time of 5 (ms) is measured by the clock of z), that is, while counting 160 clocks of 32 (kHz), counting the clock of 14.4 (MHz) by counting the clock of 14.4 (MHz), Find the frequency error. In this example, the ideal count value of the 14.4 (MHz) clock is 72000, but if a frequency error occurs, it appears as an error α in the number of clocks, and ± α clocks become frequency errors.

As shown in FIG. 3, the phase error detector 42 counts 14.4 from the rise of 32 (kHz) immediately before the start of sleep to the start of sleep.
(MHz) The number of clocks is obtained as a phase shift (β). In the example shown in FIG. 2, the phase shift is two clocks.

The wake timing calculation section 43 determines the timing at which the sleep state is changed to the wake state. Specifically, as shown in FIG. 2, since there is a frequency error of ± α at 5 (ms), assuming that the sleep time is 100 (ms), the frequency of ± 20α (100 (ms) / 5 (ms)) There is an error, and when the phase error β is taken into consideration, the error is ± 20α−β. The sleep time is set to 1
Assuming that the count value (no error) when counting 00 (ms) with a fast clock is X, after sleep is started,
The sleep state may be ended at the timing when the number of slow clocks corresponding to the fast clock of "X ± 20α-β" is counted. Therefore, by converting the total sleep time “X ± 20α−β” into the number of slow clocks (Y count) and the error of one slow clock or less, and expressing this as a fast clock (Z count), It is possible to obtain a correct timing for shifting from the sleep state to the wake state. By stopping the fast clock during the counting time (while counting the Y count) with the slow clock, power consumption can be reduced.

Next, the operation of the entire apparatus will be described with reference to FIGS. First, at point A in the wake state,
The frequency error detector 41 obtains the frequency error α. Next, the switch 50 is opened to stop supplying the fast clock to the receiving unit 60. Then, at point B a predetermined time before the start of sleep, the phase error detection unit 42 obtains the phase error β, and the wake timing calculation unit 43 obtains the sleep error end timing reflecting the frequency error α and the phase error β. The unit 40 controls the power control unit 10 to stop supplying power to the second clock circuit. After this, the second
The clock supply operation by the clock circuit stops and the sleep state is set.

Next, when shifting from the sleep state to the wake state at the timing indicated by the point C, the control unit 40
However, at the timing of point D (32 (kHz) one clock before point C), the power supply control unit 10 is controlled to start the clock supply operation of the second clock circuit 30, and is indicated by the wake timing calculation unit 43. Switch 5
By setting 0 to the closed state, the receiving unit 60 operates in synchronization with the fast clock.

The frequency error detector 4 described above
1. The phase error detection unit 42 and the wake timing calculation unit 43 can be realized by an electronic device such as a counter or a CPU that operates according to a procedure stored in a ROM in advance. In addition, while calculating the frequency error in the wake state,
Since the phase error is obtained a predetermined time before the change from the wake state to the sleep state, the frequency error and the phase error can be accurately obtained, and further, the frequency error and the phase error can be obtained during a predetermined sleep period. Since the end timing of the sleep period is obtained by adding or subtracting each error, the end timing can be easily obtained only by operations such as addition, subtraction, multiplication, and division.

FIG. 5 shows an intermittent receiving apparatus 1 according to this embodiment.
FIG. 1 is an example of a block diagram of a mobile phone device including a OO. The mobile phone device includes an antenna 110, an RF unit 115 that processes an electromagnetic wave received by the antenna 110,
A modulation / demodulation circuit 120 for modulating / demodulating a high-frequency signal, a frame code decoding unit 125 for performing a frame data code / decoding operation, a compression / expansion unit 130 for compressing / expanding data, / A converter 135, speaker 140, microphone 150, and A for converting an audio signal from analog to digital.
/ D converter 135 and overall control unit 1 for controlling the entire apparatus
60, a display unit 170 for displaying necessary information, an operation unit 165 for performing operations such as dialing, and the intermittent receiving device 100.

In a normal communication state, a signal received by the antenna 110 is subjected to high-frequency processing by the RF unit 115, demodulated by the modulation / demodulation circuit 120, and output by the frame code decoding unit 1
The data decoded at 25 and further expanded at the compression / expansion unit 130 are subjected to digital / analog conversion at the D / A converter 135 and output via the speaker 140. On the other hand, the audio signal input to the microphone 150 is A /
The analog-digital converted by the D converter 135 and the data compressed by the compression / decompression unit 130 are further
The signal is modulated by the modulation / demodulation circuit 120, subjected to high-frequency processing by the RF unit 115, and output as an electromagnetic wave via the antenna 110.

When the intermittent receiving apparatus 100 is in the wake state, the intermittent receiving apparatus 100 obtains a frequency error, obtains a phase error by using a control signal sent from the overall control unit 160 as a trigger, and thereafter enters a sleep state. The driving of the RF unit 115 is controlled to be in a pause state.

Then, when the wake state is set, the intermittent receiving apparatus 100 ends the sleep state in consideration of the frequency error and the phase error, and controls the driving of the RF unit 115 to make it movable. As shown in this embodiment, by using the intermittent reception device 100 of the present invention, it is possible to realize a mobile phone device that ends a sleep state at an appropriate timing even when a frequency error and a phase error exist. .

According to the embodiment of the present invention described above, the frequency error between the slow clock and the fast clock is determined, and the phase error between the two clocks is also determined. Receiver 60
In the wake state, the sleep state can be ended at an appropriate timing even if there is a frequency error and a phase error.

[0031]

As described above, according to the first aspect of the present invention, the control means determines the frequency error between the slow clock and the fast clock and also determines the phase error between the two clocks, and reflects these. At the timing, the receiver in the sleep state is set to the wake state, so that the frequency error,
Even if a phase error exists, the effect that the sleep state can be ended at an appropriate timing is obtained.

According to the second aspect of the present invention, the frequency error is obtained during the wake state, and the phase error is obtained a predetermined time before the change from the wake state to the sleep state. The effect is obtained that the error can be obtained accurately.

According to the third aspect of the present invention, the end timing of the sleep period is obtained by adding or subtracting each of the frequency error and the phase error to the predetermined sleep period. Thus, the effect that the end timing is required can be obtained.

Further, according to the fourth aspect of the present invention, it is possible to provide a portable telephone device having an intermittent receiving function for terminating a sleep state at an appropriate timing in consideration of a frequency error and a phase error.

According to the fifth aspect of the present invention, the frequency error between the slow clock and the fast clock is determined, and the phase error between the two clocks is also determined. Since the wake state is set, the sleep state can be ended at an appropriate timing even when a frequency error and a phase error exist.

[Brief description of the drawings]

FIG. 1 is a block diagram of an intermittent receiver according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a principle of detecting a frequency error by a frequency error detection unit.

FIG. 3 is an explanatory diagram of a principle of detecting a phase error by a phase error detection unit.

FIG. 4 is a timing chart for explaining the operation of the apparatus.

FIG. 5 is a block diagram of a mobile phone device including an intermittent receiving device according to an embodiment of the present invention.

FIG. 6 is an explanatory diagram of a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Power supply control part 20 1st clock circuit 21 32 (kHz) clock circuit 30 2nd clock circuit 31 14.4 (MHZ) clock circuit 40 control part 41 Frequency error detection part 42 Phase error detection part 43 Wake timing calculation part 50 Switch 60 Receiver

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Takaaki Hita 1-24-10 Yoyogi, Shibuya-ku, Tokyo Asahi Kasei Microsystems Corporation F-term (reference) 5J004 BB05 CC09 DD20 5K061 BB12 CC45 EE01 EF11 FF15

Claims (5)

[Claims] 1. A device for performing reception at a receiving unit while sleeping at a predetermined interval, comprising: a first clock generation unit that operates even during sleep and supplies a slow clock; Second clock generating means for supplying the clock signal; and control means for receiving the supply of at least one of the two clocks and controlling the intermittent operation of the receiving unit. The control means comprises: Means for obtaining an error, means for obtaining a phase error between the two clocks, and means for obtaining a timing for putting the receiving unit in a sleep state into a wake state at a timing reflecting the frequency error and the phase error between the two clocks. An intermittent receiver characterized by the above-mentioned. 2. The device according to claim 1, wherein the means for obtaining the frequency error between the two clocks is means for obtaining the frequency error in a wake state, and the means for obtaining the phase error between the two clocks comprises: An intermittent receiving apparatus, which is means for obtaining a predetermined time before a change from a state to a sleep state. 3. The means according to claim 1, wherein the means for setting the receiver in a sleep state to a wake state at a timing reflecting a frequency error and a phase error of the two clocks is predetermined. An intermittent receiving apparatus, wherein the intermittent receiving apparatus is means for setting the receiving unit in a sleep state to a wake state at an end timing of a period obtained by adding or subtracting each of a frequency error and a phase error during a sleep period. 4. A mobile phone device comprising the intermittent receiving device according to claim 1, 2 or 3. 5. A method for performing reception at a receiving unit while sleeping at a predetermined interval, comprising: determining a frequency error between both a slow clock supplied during sleep and a fast clock stopped during sleep. An intermittent reception method comprising: a step of obtaining a phase error between both clocks; and a step of putting the receiving unit in a sleep state into a wake state at a timing reflecting the frequency error and the phase error of both clocks.