JP2008113173A - Reception controller and reception control method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a reception controller and a reception control method that can receive a notice information signal even when a low-frequency clock has a certain frequency deviation and more. <P>SOLUTION: During intermittent reception, an RF transmission/reception unit 12 and a base band unit 13 are driven on the basis of a high-precision high-frequency clock signal generated by a high-frequency clock oscillator 20 generates to receive a signal. Not during the intermittent reception, the high-frequency clock oscillator 20 is instructed to stop and controlled to operate on the basis of a low-precision low-frequency clock signal generated by a low-frequency clock oscillator 21. Further, the average number of clocks per cycle of the low-frequency clock oscillator 21 is counted during the intermittent reception on the basis of the high-frequency clock signal generated by the high-frequency clock oscillator 20 and reception timing of next intermittent reception is predicted and determined on the basis of the average number of clocks. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a reception control apparatus and a reception control method for controlling reception timing of intermittent reception.

In a mobile terminal device such as a mobile phone, in order to reduce power consumption, when receiving a broadcast information signal from a base station in a standby state, a high-frequency clock signal is used for reception operation and a low-frequency clock signal is used for time management. When the broadcast information signal is not received, the high frequency clock oscillator used for the reception operation is stopped and only the low frequency clock signal is used. Then, the number of clocks until the reception timing of the next broadcast information signal is counted using the low frequency clock signal, and when the clock number reaches the reception timing of the broadcast information signal, the high frequency clock oscillator is started and the reception operation is started. Transition is performed (for example, refer to Patent Document 1).
JP 2000-244351 A

  In the above-described portable terminal device, when the broadcast information signal is not received, the high-frequency clock oscillator is stopped and operated using the low-frequency clock oscillator. However, the low-frequency clock oscillator is more accurate than the high-frequency clock oscillator. Therefore, if a certain frequency deviation occurs in the low-frequency clock, the synchronization with the reception timing of the broadcast information signal may be lost. When synchronization is lost, a series of synchronization processing operations from initial processing to establishment of standby must be performed in order to re-synchronize, and wasteful power is consumed.

  By the way, in the mobile terminal device, the WINDOW width for receiving the broadcast information signal transmitted from the base station is determined in consideration of the frequency deviation due to the Doppler effect when the mobile terminal device moves at a speed of 100 km / h or the like. However, this WINDOW width does not take into account the frequency deviation inherent in the low-frequency clock oscillator, and is a range in which this frequency deviation cannot be absorbed.

  On the other hand, the interval to the reception timing of the broadcast information signal is measured using a low-frequency clock, but the frequency deviation of this low-frequency clock oscillator may be about ± 20 ppm at room temperature, taking temperature changes into account Then, the frequency deviation may be about ± 60 ppm. For low-frequency clocks, the frequency deviation due to the temperature is the largest, and if a frequency deviation occurs, it will be out of synchronization with the reception timing of the broadcast information signal, and will need to be synchronized again. It will consume wasteful power up to.

  The present invention has been made in view of such problems, and an object of the present invention is to provide a reception control apparatus and reception control capable of receiving a broadcast information signal even when a certain frequency deviation or more occurs in a low-frequency clock. It is to provide a method.

  To achieve the above object, a reception control apparatus according to the present invention includes a first oscillator that generates a first clock signal having a high frequency, and a clock that is generated by the first oscillator with lower power consumption than the first oscillator. A second oscillator for generating a second clock signal having a frequency lower than that of the signal, a receiving means for receiving the transmitted signal, and a first clock signal generated by the first oscillator during reception of intermittent reception. Based on this, the receiving means is driven to receive a signal, and when intermittent reception is not received, the first oscillator is instructed to stop and operates based on the second clock signal generated by the second oscillator. The control means for controlling the above and counting the average number of clocks per cycle of the second oscillator based on the first clock signal generated by the first oscillator at the time of intermittent reception. Based on Te, characterized in that it comprises a determining means for predicting determining the reception timing of the next intermittent receiving.

  The reception control apparatus of the present invention further includes a measurement unit that measures temperature, and a storage unit that stores information indicating a relationship between the temperature and the number of clocks per cycle of the second oscillator, and the determination unit includes: If the difference between the temperature measured by the measuring means when counting the average number of clocks per cycle of the second oscillator and the temperature at the time of reception of the next intermittent reception exceeds a threshold, the storage means It is preferable to predict and determine the reception timing of the next intermittent reception by adding the stored number of clocks per cycle of the second oscillator. In addition, when the predicted reception timing of intermittent reception determined based on the average number of clocks exceeds the allowable range of intermittent reception, a correction value for the number of clocks may be added to determine the reception timing of the next intermittent reception. preferable.

  The reception control method of the present invention receives a signal based on a first clock signal having a high frequency when receiving intermittent reception, and instructs to stop the first clock signal when not receiving intermittent reception. In the reception control method for controlling to operate based on a second clock signal having a frequency lower than that of the first clock signal, the second clock signal is based on the first clock signal when receiving intermittent reception. The average number of clocks per period is counted, and the reception timing of the next intermittent reception is predicted and determined based on the average number of clocks.

  According to the present invention, since it is predicted that the frequency deviation of the low frequency clock and the influence of temperature can be followed, the broadcast information signal can be received even if a certain frequency deviation or more occurs in the low frequency clock.

  Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a system configuration diagram of a reception control apparatus according to the present invention. In the present embodiment, a mobile phone will be described as an example of a reception control device. In FIG. 1, the reception control apparatus uses an iBurst system as an example, an RF transmission / reception unit 12 that transmits and receives signals to and from a base station via an antenna 11, a baseband unit 13 that modulates and demodulates signals, and a liquid crystal display unit ( LCD) 14, a memory unit 16 for storing programs and data, a codec unit 18 for performing AD and DA conversion of audio signals, a telephone speaker 22, a telephone microphone 23, and an analog of a temperature sensor 25. An AD converter 24 that converts a voltage value into a digital voltage value, a CPU (determination means) 15 that processes and controls signals, a key input unit 19 that supplies input information from the user to the CPU 15, and a high-precision high-frequency clock The high-frequency clock oscillator 20 that generates a signal and the generation of the high-frequency clock oscillator 20 with lower power consumption than the high-frequency clock oscillator 20 And a low frequency clock oscillator 21 which generates a lower-precision low-frequency clock signal that the clock signal.

  In the iBurst system that provides mobile broadband access, the reception control device needs to communicate with the base station while performing absolute synchronization. Therefore, in order to obtain synchronization timing and frequency information, the transmission control device transmits from the base station. Received FTB bursts (superframes) are intermittently received. The FTB burst includes a frequency synchronization burst, a timing synchronization burst, and eight information notification bursts. As shown in FIG. 2, the FTB burst has a frame length of 100 ms × 2 and 10 seconds (s ) Periodically transmitted.

  When receiving the intermittent reception, that is, when receiving the FTB burst signal, the reception control device drives the RF transmitting / receiving unit 12 and the baseband unit 13 based on the high frequency clock signal (24 MHz) generated by the high frequency clock oscillator 20. When the intermittent reception is not received, that is, when the FTB burst signal is not received, the stop of the high frequency clock oscillator 20 is instructed, and the low frequency clock signal (32.768 kHz generated by the low frequency clock transmitter 21) is instructed. Or control to operate based on 32 kHz).

  However, as described above, the low-frequency clock oscillator employs an inexpensive clock compared to the high-frequency clock oscillator, so the accuracy is low, and if a certain frequency deviation occurs in the low-frequency clock, the timing of the FTB burst signal There is a case that is out of sync with.

  Therefore, when receiving the FTB burst signal, the reception control device of the present invention is based on the high-frequency clock signal generated by the high-frequency clock oscillator 20 per cycle of the low-frequency clock signal generated by the low-frequency clock oscillator 21. The average clock number is counted, and the reception timing of the next intermittent reception is predicted and determined based on the average clock number.

  Specifically, when receiving the FTB burst signal, the rising edge of the low frequency clock signal of 32 kHz is detected, and the number of clocks of the high frequency clock signal of 24 MHz until the next rising edge of the low frequency clock signal of 32 kHz is counted. This is repeated M times (about 30 times) and the average is taken to obtain the average number of clocks (N) for one period of the low frequency clock signal of 32 kHz. Based on this average number of clocks (N), a correction value for the number of clocks that is expected to be shifted in 10 seconds (s) until the next FTB burst signal is received is predicted and obtained.

  FIG. 3 is a diagram showing a clock measurement circuit for obtaining the number of clocks in one cycle of the low-speed clock signal based on the high-frequency clock signal. The clock measurement circuit includes a rising edge detection circuit 31, a counter 32, an adder 33, a correction register 34, a previous correction value register 35, and a comparator 36. Note that these components are connected by a bus. The rising edge detection circuit 31 outputs a rising signal to the counter 32 when detecting the rising edge of the low speed clock signal of 32.768 kHz. Upon receiving the rising signal, the counter 32 clears the counter 32 and counts the number of clocks of the high-speed clock signal of 24 MHz until the next rising signal is received. The count value of the counter 32 is added to the value of the correction register 34 by the adder 33, and the added value is stored in the correction register 34. Similar processing is repeated M times (about 30 times), and the correction register 34 stores the counter value (the number of high-speed clocks) added M times. The CPU (determining means) 15 can determine the average number of clocks per cycle of the low-frequency clock signal by dividing the counter value added M times by M. The previous correction value register 35 stores the counter value added M times the previous time, and the comparator 36 adds the counter value added M times the previous time and the current M times. It is for comparing the counter value and determining the increase or decrease.

  FIG. 4 is a diagram illustrating a procedure for obtaining the reception timing of the FTB burst signal. First, the average clock number N for one cycle of the low frequency clock signal of 32 kHz is obtained (S10). Next, by dividing one period (10 s) of the FTB burst signal by one period (30.15 μs) of the low frequency clock signal of 32 kHz, the number of periods of the low frequency clock signal in one period (10 s) of the FTB burst signal X (10 s / 30.15 μs) is determined. By multiplying the number of periods X by the average number of clocks N, the number of clocks XN until the next reception of the FTB burst signal is obtained, and a clock that is likely to deviate from the timing of the next FTB burst signal using this number of clocks XN. A numerical correction value α is obtained (S20).

  Also, the temperature difference between the current FTB burst reception and the next FTB burst reception is predicted from the difference between the temperature measured at the previous FTB burst reception and the temperature measured at the current FTB burst reception. If the deviation from the reception timing of the FTB burst signal exceeds a predetermined threshold (64 μs), the correction value β of the number of clocks corresponding to the change in temperature is added to the correction value α of the clock number obtained in step S20. Add (S30). FIG. 5 is a diagram showing frequency temperature characteristics of a 32.768 kHz low frequency clock oscillator (tuning fork type crystal resonator). The vertical axis represents frequency deviation (unit: ppm), and the horizontal axis represents temperature (unit: ° C). Moreover, 25 degreeC shall be 0 ppm. From this figure, the temperature increases from −10 ° C. to 25 ° C. and the frequency increases, the temperature changes from 25 ° C. to −10 ° C. and the frequency decreases, and the temperature increases from 25 ° C. to 60 ° C. It can be seen that there are a state where the frequency is lowered due to the transition and a state where the temperature is increased from 60 ° C. to 25 ° C. and the frequency is increased. The correction value β of the clock number for each temperature difference in these four states is stored in the memory unit 16, and this correction value β is added to the correction value α of the clock number obtained in step S20.

  However, when the reception timing of the FTB burst signal obtained using the clock number XN exceeds the window width (± 32 μs), the correction value α and the correction value β of the clock number are used to determine the timing from the timing of the FTB burst signal. The deviation is corrected, but if it is within the window width (± 32 μs), since the FTB burst signal can be received, the deviation is not corrected (S40). FIG. 6 is a diagram for explaining the window width. In the iBurst system, even if a frequency deviation due to the Doppler effect or the like occurs due to the mobile phone moving at a speed of 100 km / h or the like, an FTB burst (F-BURST) is received in order to receive a broadcast information signal transmitted from the base station. ) Signal and a P burst (P-BURST) signal are provided with a window width allowing a frequency deviation.

  Next, a value obtained by adding the correction value α + β of the clock number to the clock number XN obtained at the time of receiving the next FTB burst signal obtained in step S20 is divided by the average clock number N for one cycle of the low frequency clock signal. Thus, the reception timing of the FTB burst signal with the low frequency clock signal is obtained and the FTB burst signal is received (S50).

  FIG. 7 is a view for explaining the flow of processing of FTB burst intermittent reception. When the power is turned on (S100), initial processing is performed (S110), the number of clocks per cycle of the low frequency clock is measured based on the high frequency clock (S120), the measured value and the temperature value are read, and the number of clocks is read. A correction value is obtained (S130). Next, the intermittent reception process of the FTB burst signal is executed at a cycle of 10 seconds (S140). First, the average number of clocks per cycle of the low-frequency clock is measured based on the high-frequency clock (S150), the measured value and the temperature value are read, and a correction value for the clock number is predicted and obtained (S160). Next, a correction value for the number of clocks is set (S170), the FTB burst signal can be received (S180), intermittent reception is performed, and the process returns to step S140.

  According to the present invention, the frequency deviation of the low-frequency clock and the influence of temperature can be predicted and followed, so that the broadcast information signal can be received even if a certain frequency deviation or more occurs in the low-frequency clock. In addition, since there is no re-synchronization due to loss of synchronization with the reception timing of the broadcast information signal, useless power consumption from initial processing to standby establishment can be eliminated.

It is a system block diagram of the reception control apparatus of this invention. It is a figure explaining the reception sequence of intermittent reception. It is a figure which shows the clock measurement circuit which calculates | requires the clock number of 1 period of a low-speed clock signal based on a high frequency clock signal. It is a figure explaining the procedure which calculates | requires the reception timing of a FTB burst signal. It is a figure which shows the frequency temperature characteristic of the low frequency clock oscillator of 32.768 kHz. It is a figure explaining a Window width. It is a figure explaining the flow of a process of FTB burst intermittent reception.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Antenna 12 RF transmission / reception part 13 Baseband part 14 Liquid crystal display part (LCD)
15 CPU
16 Memory Unit 18 Codec Unit 19 Key Input Unit 20 High Frequency Clock Oscillator 21 Low Frequency Clock Oscillator 22 Speaker 23 Microphone 24 AD Converter 25 Temperature Sensor 31 Rising Detection Circuit 32 Counter 33 Adder 34 Correction Register 35 Correction Before One Value register 36 comparator

Claims (4)

A first oscillator for generating a high frequency first clock signal;
A second oscillator that generates a second clock signal having a lower frequency than a clock signal generated by the first oscillator with lower power consumption than the first oscillator;
Receiving means for receiving the transmitted signal;
When receiving intermittent reception, the receiving means is driven to receive a signal based on the first clock signal generated by the first oscillator. When intermittent reception is not received, the first oscillator is stopped. Control means for instructing and controlling to operate based on a second clock signal generated by the second oscillator;
At the time of intermittent reception, the average number of clocks per cycle of the second oscillator is counted based on the first clock signal generated by the first oscillator, and the next intermittent reception is performed based on the average number of clocks. Determining means for predicting and determining the reception timing of
A reception control apparatus comprising: Measuring means for measuring temperature; and storage means for storing information indicating a relationship between the temperature and the number of clocks per cycle of the second oscillator,
In the case where the difference between the temperature measured by the measuring unit when counting the average number of clocks per cycle of the second oscillator and the temperature at the time of reception of the next intermittent reception exceeds the threshold The reception control apparatus according to claim 1, wherein the reception timing of the next intermittent reception is predicted and determined by adding the number of clocks per cycle of the second oscillator stored in the storage means.   When the predicted reception timing of intermittent reception determined based on the average number of clocks exceeds the allowable range of intermittent reception, a correction value for the number of clocks is added to determine the reception timing of the next intermittent reception. The reception control device according to claim 1 or 2. When receiving intermittent reception, a signal is received based on the first clock signal having a high frequency. When intermittent reception is not receiving, the stop of the first clock signal is instructed, and the frequency is lower than that of the first clock signal. In the reception control method of controlling to operate based on the second clock signal of
At the time of intermittent reception, the average number of clocks per cycle of the second clock signal is counted based on the first clock signal, and the reception timing of the next intermittent reception is determined based on the average number of clocks. A reception control method characterized by predictive determination.

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