JP2000031188A - Bump arrangement method of flip-chip integrated circuit and the flip-chip integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide, after manufacturing, a flip-chip integrated circuit capable of being freely separated in the position of a bump from the arrangement position of a memory cell. SOLUTION: An electrode 3 for connecting a bump 4 to a power supply and a bump 5 for signal is connected to an uppermost layer wiring layer 2 on side surface, where the bump is mounted in a flip-chip integrated circuit 1. Furthermore, a memory cell 11 and the like are located in an internal circuit region 10 of the flip-chip integrated circuit 1. An uppermost layer wiring layer 6 for supplying power is provided at a part, corresponding to the internal circuit region 10 including the memory cell 11, and electrodes 7 for connecting the bump 4 to power supply are scattered all over the uppermost layer wiring layer 6. Then, the number of the electrodes 7 which exceeds that of the bumps 4 for power supply being originally required is provided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for arranging power supply bumps in a flip-chip integrated circuit.

[0002]

2. Description of the Related Art A conventional flip-chip integrated circuit has a structure in which a necessary number of electrodes for connecting bumps are arranged at predetermined positions on a mounting surface with a substrate.

[0003]

In such a flip-chip integrated circuit, the composition of the bump material such as solder used for the bump changes after manufacturing, and the amount of radiation such as α rays contained in the bump increases. Sometimes. In this case, if the memory cells are arranged in the internal circuit area of the flip-chip integrated circuit so as to overlap the bumps, the memory cells of the manufactured flip-chip integrated circuit cause a soft error.

In the conventional configuration, only the location of the bump cannot be freely changed after the manufacturing. Therefore, if a soft error occurs in the memory cell due to α-rays or the like, the wiring layout of the integrated circuit and the The layout of the bump connection electrodes had to be modified, and the integrated circuit had to be remanufactured from the beginning.

The present invention has been made in view of the above-mentioned problems of the prior art, and has as its object to provide a flip-chip integrated circuit capable of freely separating a bump position from a memory cell arrangement position after manufacturing.

[0006]

According to the present invention, there is provided a flip-chip integrated circuit having an internal circuit area including a memory cell, wherein a bump is provided on a portion corresponding to the internal circuit area on a bump mounting side surface. It is characterized in that more electrodes for arranging are arranged than the originally required number of bumps.

[0007] According to this configuration, it is possible to freely change only the installation location of the bump without changing the wiring layout and the layout of the bump connection electrodes. As a result, even after a flip-chip integrated circuit is manufactured, even if the composition of the bump material changes and the amount of radiation such as α-rays contained in the bump increases, and the soft error of the memory cell occurs, the soft error of the bump position occurs. It is possible to avoid a soft error of the memory cell due to radiation such as α-rays instead of an electrode at a position where no occurrence occurs.

[0008] Further, the above-mentioned flip-chip integrated circuit includes:
It is preferable that the width of the uppermost wiring layer for arranging the electrodes at a portion corresponding to the internal circuit region on the side surface on which the bump is mounted is made uniform.

According to this structure, it is not necessary to change the layout of the uppermost wiring layer in accordance with the location of the electrodes, and it is possible to finely change the installation positions of the bumps only by changing the positions of the electrodes.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a view showing a bump mounting side surface of a flip chip integrated circuit according to an embodiment of the present invention.

An electrode 3 for connecting a power supply bump 4 and a signal bump 5 is connected to the uppermost wiring layer 2 on the bump mounting side surface of the flip-chip integrated circuit 1 of the embodiment shown in FIG. Further, a memory cell 11 and the like exist in the internal circuit area 10 of the flip-chip integrated circuit 1. A portion corresponding to the internal circuit region 10 including the memory cell 11 on the side surface on which the bump is mounted is provided with an uppermost wiring layer 6 for supplying power, and the power supply bump 4 is connected to the uppermost wiring layer 6. Electrodes 7 are laid. The number of the electrodes 7 and the arrangement positions of the electrodes 7 on the uppermost wiring layer 6 are equal to or greater than the originally required number of power supply bumps 4.

As described above, since the electrodes 7 are spread over the uppermost wiring layer 6 more than the originally required number of power supply bumps 4, the power supply bumps 4 connected to the uppermost wiring layer 6 can be located at any position. It can be installed on the electrode 7. Therefore, even if a soft error occurs in the memory cell 11 due to α rays emitted from the solder or the like used for the power supply bump 4 after manufacturing the flip-chip integrated circuit, the electrode 7 at a position distant from the memory cell 11 after manufacturing. The power supply bump 4 can be freely changed, and a soft error of the memory cell 11 due to α rays can be avoided even after manufacturing the flip-chip integrated circuit.

FIG. 2 is a view showing a bump mounting side surface of a flip chip integrated circuit according to another embodiment of the present invention.

In another embodiment of the present invention, as shown in FIG. 2, the uppermost wiring layer 8 on the side surface on which the bump is mounted, corresponding to the internal circuit region 10, is different from the above-described embodiment in that the electrode 7 is provided anywhere. The wiring width is uniform so that it can be arranged.
Other configurations are the same as above.

With such a configuration, the uppermost wiring layer 6
It is not necessary to change the layout according to the location of the electrode 7, and the position of the electrode 7 can be finely changed. Thereby, the installation position of the power supply bump 4 can be finely changed only by changing the position of the electrode 7. Therefore, in this embodiment, the effect is obtained that the position of the power supply bump can be freely changed more finely simply by changing the layout of the electrodes.

In each of the above embodiments, the configuration is shown in which only the power supply bumps are arranged in the portions corresponding to the internal circuit regions including the memory cells on the side surfaces on which the bumps are mounted. However, the present invention is not limited to this. The present invention can also be applied to a configuration in which one or both of the signal bump and the power supply bump are arranged in a portion corresponding to the internal circuit region including the memory cell on the side surface on which the bump is mounted.

[0018]

As described above, according to the present invention, the number of electrodes for arranging bumps is greater than the originally required number of bumps at the portion corresponding to the internal circuit area on the side surface of the flip-chip integrated circuit where bumps are mounted. With this configuration, even after the flip-chip integrated circuit is manufactured, even if the composition of the bump material changes and the amount of radiation such as α-rays contained in the bump increases, and a soft error occurs in the memory cell, the position of the bump after manufacturing is reduced. Can be freely changed to an electrode at a position away from the memory cell.

As a result, a soft error of a memory cell due to radiation such as α-rays can be avoided even after manufacturing a flip-chip integrated circuit without modifying the wiring layout of the integrated circuit or the layout of the bump connection electrodes.

[Brief description of the drawings]

FIG. 1 is a diagram showing a bump mounting side surface of a flip chip integrated circuit as one embodiment of the present invention.

FIG. 2 is a diagram showing a bump mounting side surface of a flip chip integrated circuit as another embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Flip chip integrated circuit 2, 6, 8 Top wiring layer 3, 7 Electrode 4 Power supply bump 5 Signal bump

Claims (5)

[Claims] 1. A method of arranging a bump in a flip-chip integrated circuit having an internal circuit area including a memory cell, the method comprising:
A method for arranging bumps, comprising arranging more electrodes for arranging bumps than the originally required number of bumps. 2. The bump arrangement according to claim 1, wherein the width of the uppermost wiring layer for arranging the electrodes is made uniform in a portion corresponding to the internal circuit region on the side surface on which the bump is mounted. Method. 3. A flip-chip integrated circuit having an internal circuit area including a memory cell, wherein a portion corresponding to the internal circuit area on a side surface on which bumps are mounted is provided.
A flip-chip integrated circuit, wherein the number of electrodes for arranging bumps is greater than the originally required number of bumps. 4. The flip-chip integrated circuit according to claim 3, wherein an uppermost wiring layer for arranging the electrodes is provided in a portion corresponding to the internal circuit region on a side surface on which bumps are mounted. circuit. 5. The flip-chip integrated circuit according to claim 4, wherein the width of the uppermost wiring layer is uniform.