JP2000012966A - Ridge wave guiding semiconductor laser and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce threshold current, to stabilize output and to improve reliability of a ridge wave guiding semiconductor laser device. SOLUTION: A first cladding layer 3, an active layer 5, a second cladding layer 7a and a third cladding layer in ridge form are formed in sequence to form a ridge wave guiding semiconductor laser device. A low-resistance region of high carrier density which is formed in a conductor type different from that of the first cladding layer 3 is formed in the second cladding layer 7a of low carrier density and under the third cladding layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ridge waveguide type semiconductor laser device and a method of manufacturing the same, and more particularly, to a ridge waveguide type semiconductor laser capable of reducing threshold current and improving temperature characteristics. The present invention relates to an element and a method for manufacturing the same.

[0002]

2. Description of the Related Art A ridge waveguide semiconductor laser (RWG-L)
D (ridge waveguide-laserdiode) can be manufactured by one or two crystal growths, and is suitable for cost reduction and mass production. Further, since the buried structure is not employed, it is not necessary to consider a problem such as a current leak and a reverse junction breakdown peculiar to the buried layer functioning as a current blocking layer. Therefore, it is suitable for high output operation. Furthermore, since the parasitic capacitance is small, it is excellent in high-speed operation.

FIG. 10 is a diagram showing a sectional structure of a conventional ridge waveguide type semiconductor laser device. The longitudinal structure of the ridge waveguide type semiconductor laser device is a Fabry-Perot structure. In FIG. 10, this semiconductor laser device will be described according to the manufacturing process. On the n-InP substrate 1, a thickness of 2 μm, a carrier concentration of 1 × 10 ¹⁸ cm ⁻³ ,
S-doped n-InP first cladding layer 3, 1.3 μm composition multiple quantum well structure active layer 5, thickness 0.2 μm, carrier concentration 5 × 10 ¹⁷ cm ⁻³ , Zn-doped p-InP second cladding layer 7, thickness 0.05 μm, carrier concentration 5 × 10 ¹⁷
cm ^-3 , Zn-doped p-InGaAsP etching stop layer 9, thickness 2 μm, carrier concentration 1 × 10 ¹⁸ c
m ⁻³ , Zn-doped p-InP third cladding layer 13, thickness 0.5 μm, carrier concentration 5 × 10 ¹⁸ cm ⁻³ , and Zn-doped p-InGaAs contact layer 15 are sequentially MOCVD-coated.
The crystal grows by the method. Next, a photoresist is applied to the entire surface of the substrate, and a stripe having a width of 5 μm is formed on the substrate by photolithography. Next, the p-InGaAs contact layer 15 is formed using a sulfuric acid-based etchant.
Is etched. Next, the p-InP third cladding layer 1
3 is etched with a hydrochloric acid-based etchant. At this time, the etching is performed on the p-InGaAsP etching stop layer 9.
Stop at The p-InP third cladding layer 13 is formed in a ridge shape, and the width of the ridge is 2.5 μm. Next, after depositing an SiO ₂ film 17 over the entire surface of the substrate by a CVD method, p-InGa
A 2 μm-wide striped window is formed on the As contact layer 15. Next, after depositing a p-type electrode AuZn19 on the entire surface of the substrate, AuZn is processed into a stripe shape at the window portion by a lift-off method. After removing the resist and sintering, a bonding pad 21 composed of a Ti / Pt / Au electrode is formed by a vapor deposition method and a lift-off method.
Next, the n-InP substrate 1 is polished to a thickness of 100 μm,
After n-electrode AuGe / Ni / Au25 is deposited on the back surface of the substrate, sintering is performed. The substrate is cut out to have a resonator length of 300 μm and a chip width of 300 μm, and is completed by mounting and wire bonding.

[0004]

However, the semiconductor laser device has the following problems.

FIG. 11 is a diagram showing an equivalent circuit in a cross-sectional view of the ridge waveguide type semiconductor device of FIG. As shown in FIG. 11, the injected current is applied to the p-InP second via the bulk resistance _Rb of the ridge-shaped p-InP third cladding layer 13.
The p-InP third cladding layer 1 is diffused in the cladding layer 7.
3 is injected into the active layer 5 near below. At this time, p-
A current also flows through the diffusion resistance R _d of the InP second cladding layer 7. However, the current flowing through the diffusion resistance R _d is reactive current does not contribute to laser oscillation. Therefore,
The presence of the reactive current causes an increase in the threshold current and, in turn, an increase in power consumption.

For this reason, a method of reducing the reactive current by increasing the diffusion resistance _Rd is considered. That is, p
-The carrier concentration of the InP second cladding layer 7 is reduced. However, when the carrier concentration of the p-InP second cladding layer 7 is lowered, the difference in the diffusion potential (built-in potential) between the active layer 5 and the p-InP second cladding layer 7 is reduced, and the carrier overflows. It will be easier. In particular, when the current density injected into the active layer 5 increases, the carrier overflow becomes remarkable. In addition, electrons having a small effective mass easily overflow from the beginning, and the active layer 5
Overflow from the p-InP second cladding layer 7 is remarkable. This carrier overflow becomes more remarkable as the temperature increases, and is a factor that deteriorates the temperature characteristics of the semiconductor laser device. FIG. 12 shows the p-InP second cladding layer 7.
Is 1 × 10 ¹⁷ cm ^-3 and 1 × 10 ¹⁸
4 shows the optical output-current characteristics of the ridge waveguide type semiconductor laser device in the case of cm ⁻³ . When the carrier concentration is low, the threshold current decreases, but the linearity of IL decreases. On the other hand, when the carrier concentration is high, the diffusion resistance 11
Is small, the current that does not contribute to laser oscillation increases, and the threshold current increases. In addition, when the carrier concentration increases, carrier overflow becomes remarkable. As a result, the linearity of IL is also reduced in this case.

As described above, in the conventional ridge waveguide type semiconductor laser device, since the diffusion in the lateral direction with respect to the injection current is large, the effective active layer width is widened. for that reason,
There is a problem that the threshold current is high.

In order to lower the threshold current, the diffusion resistance should be increased, that is, the carrier concentration of the cladding layer should be reduced. This, however, conversely promotes carrier overflow from the active layer to the cladding layer. Will do. Therefore, the carrier concentration could not be reduced without limitation.

The present invention has been made in view of the above circumstances, and has as its object to reduce the lateral spread of current by optimizing the carrier concentration in the current injection portion of the cladding layer. An object of the present invention is to provide a ridge waveguide semiconductor laser device capable of suppressing carrier overflow from an active layer to a cladding layer and a method for manufacturing the same.

[0010]

In order to solve the above problems, the present invention is characterized in that, as shown in FIG. 4, a first clad layer 3 and an active layer formed on the first clad layer 3 are formed. 5
And a second cladding layer 7a formed on the active layer 5
And at least a third cladding layer 13 formed in a ridge shape on at least a part of the second cladding layer 7a. The second cladding layer 7a has a first cladding layer under the third cladding layer 13. The ridge waveguide semiconductor laser device includes a low resistance region 23 formed of a different conductivity type from that of the layer 3.

The low resistance region 23 is formed below the ridge-shaped third cladding layer 13. The low resistance region 23 is formed by diffusing impurities into the second cladding layer 7a and increasing the carrier concentration in that region. Due to the presence of the low resistance region 23, the second cladding layer 7a lowers the resistance of the current injection portion under the third cladding layer 13 (increases the carrier concentration) and increases the resistance of the other portions (decreases the carrier concentration). To do). In the conventional structure, the second cladding layer 7 of FIG. 10 has a single resistance value (single carrier concentration).
Therefore, the reduction of the reactive current and the suppression of the carrier overflow are exactly in a trade-off relationship. In the present invention, the third material having a high resistance (low carrier concentration) is used.
Impurities are diffused in the cladding layer 7a at a high concentration, and the low-resistance (high carrier concentration) region 23 is formed only in the current injection portion under the third cladding layer 13, so that both the above-described reactive current reduction and carrier overflow suppression can be achieved. It is something that will be realized.

In the low resistance region 23, impurities may be introduced by thermal diffusion from the high-concentration impurity layer 11 formed on the second cladding layer 7a as shown in FIGS. 2 and 3, for example. Here, preferably, the carrier concentration of the high concentration impurity layer 11 is 1 × 10 ¹⁸ cm ⁻³ or more. Further, a layer of an impurity to be introduced on the second cladding layer may be directly formed by, for example, vapor deposition, and the impurity may be diffused.

The first cladding layer 3, the active layer 5, the second cladding layer 7, and the third cladding layer 13 are preferably made of III
-V group compound semiconductor. The first cladding layer 3 and the low-resistance region 23 sandwiching the active layer 5 may have different conductivity types, and the first cladding layer 3 and the second cladding layer 7a may have the same conductivity type, or may have different conductivity types. It may be. For example, if the first cladding layer 3 is n-type, the low-resistance region 23 must be p-type, and the introduced impurities are p-type impurities such as Zn, Cd, and Be. The active layer 5 may have a quantum well structure or a non-quantum well structure. In addition, the multi-quantum well structure
ll; MQW), single-quantum-well
l; SQW).

The ridge waveguide type semiconductor laser device thus configured has a low resistance (increases the carrier concentration) in only the current injection portion of the high resistance (low carrier concentration) second cladding layer. The region reduces reactive current flowing in the second cladding layer in the lateral direction, and also suppresses carrier overflow from the active layer to the second cladding layer. Therefore, the threshold current is reduced, and a stable output can be obtained even in a high-output operation or a high-temperature operation.

[0015]

Embodiments of the present invention will be described below with reference to the drawings.

First Embodiment FIGS. 1 to 4 are views showing a cross-sectional structure in each manufacturing process of a ridge waveguide type semiconductor laser device according to this embodiment.
In FIG. 1, an active layer 5 having a thickness of 2 μm, a carrier concentration of 1 × 10 ¹⁸ cm ⁻³ , an S-doped n-InP first cladding layer 3 and a 1.3 μm composition multiple quantum well structure 5 having a thickness of 0. 2 μm, carrier concentration 5 × 10 ¹⁵ cm ⁻³ ,
An InP second cladding layer 7a to which no impurity is intentionally added (hereinafter referred to as undoped), a thickness of 0.05 μm,
Carrier concentration 1 × 10 ¹⁵ cm ^-3 , undoped InGaAs
sP etching stop layer 9a, characteristic part of the present invention, thickness 0.1 μm, carrier concentration 3 × 10 ¹⁸ c
m ⁻³ , Zn-doped p-InP diffusion source layer 11, thickness 2 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ , Zn-doped p-InP third cladding layer 13, thickness 0.5 μm, carrier concentration 5 × 10 ¹⁸ cm ^-3 , Zn-doped p-InGa
Crystal growth of the As contact layer 15 is sequentially performed by MOCVD. Next, in FIG. 2, a photoresist is applied to the entire surface of the substrate, and a stripe having a width of 5 μm extending in a direction perpendicular to the paper is formed on the substrate by photolithography. Then, the p-InGaAs contact layer 15, the p-InP third cladding layer 13, and the p-In are formed with a sulfuric acid-based etchant and a hydrochloric acid-based etchant.
The P diffusion source layers 11 are respectively etched. At this time, the etching stops at the InGaAsP etching stop layer 9a. The p-InP third cladding layer 13 is formed in a ridge shape, and the width of the ridge is 2.5 μm.

Next, as shown in FIG.
After depositing the O ₂ film 17 by the CVD method, the substrate is annealed in a hydrogen atmosphere at 550 ° C. for 5 minutes. By this annealing, Zn is removed from the p-InP diffusion source layer 11 by the InP second.
Diffusion to the cladding layer 7a. As a result, a Zn diffusion region 23 is formed. Due to the Zn diffusion region 23, the InP second region near the bottom of the p-InP third cladding layer 13 is formed.
The carrier concentration of the cladding layer 7a is 1 × 10 ¹⁸ cm ⁻³ .

Next, as shown in FIG. 4, the p-InGaAs contact layer 1 is formed by photolithography.
5, a stripe window having a width of 2 μm is formed. Next, after depositing a p-type electrode AuZn19 on the entire surface of the substrate, AuZn is processed into a stripe shape at the window portion by a lift-off method. After removing the resist and sintering, Ti / P
A bonding pad 21 composed of a t / Au electrode is formed by a vapor deposition method and a lift-off method. And n-InP
The substrate 1 is polished to a thickness of 100 μm, and an n-electrode AuGe / Ni / Au25 is deposited on the back surface of the substrate, followed by sintering. The substrate is cut out to have a cavity length of 300 μm and a chip width of 300 μm, and is completed by mounting and wire bonding.

FIG. 5 is a diagram showing an equivalent circuit in a cross-sectional view of the ridge waveguide type semiconductor laser device of FIG. As shown in FIG. 5, the equivalent circuit is a p-InGaAs contact layer 15.
Contact resistance Rc between p-type electrode AuZn19 and p-type electrode AuZn19
InGaAs contact layer 15, p-InP third cladding layer 13, p-InP diffusion source layer 11, InGaAs
The bulk resistance R _{b1 of} the P etching stop layer 9a and the InP second cladding layer 7a, the diffusion resistance R _{d1 of the} InP second cladding layer 7a, and the portion of the active layer 5 under the ridge (region where the Zn diffusion region 23 exists). The resistance R _a is composed of a resistance R _b2 of a portion of the active layer 5 other than below the ridge (a region where the Zn diffusion region 23 does not exist) and a diffusion resistance R _d2 of the n-InP first cladding layer 3. The injection current is at node n11
And flows through R _a through R _c and R _b1 . on the other hand,
A current also _flows through R _d1 . The current flowing through R _d1 is the leak current, and the sum of the currents flowing through the ladder circuit is the sum of the leak currents. FIG. 6 is a diagram showing the relationship between the forward voltage applied to the equivalent circuit of FIG. 5 and the current (leakage current) flowing from node n2 to node n5. As can be seen from FIG. 6, the leak current decreases as R _d1 increases.

Next, leakage currents other than the node n2 to the node n5 were analyzed. FIG. 7 shows the result. In Figure 7, "carrier concentration" indicates a carrier concentration of the p-InP second cladding layer 7 and the InP second cladding layer 7a, when the carrier concentration = 1 × 10 ¹⁵ cm ^-3 is present invention, the carrier concentration = 1 × 10 ¹⁷ cm ^-3 to 1 × 10 ¹⁸ cm
^-3 is the case of the conventional example. "Resistance value" is p-InP second
The resistance value per unit length (1 μm) of the cladding layer 7 and the undoped InP second cladding layer 7a (the resistance value in the case where the Zn diffusion region 23 does not exist in the case of the present invention) is shown. The “leak current” indicates a value of a leak current flowing between each node and a total current value thereof. As shown in FIG. 7, the sum of the leak currents is 8.2 to 22.6 mA in the conventional example, whereas the sum of the leak currents is 1.7 mA in the present invention.

Finally, the current-light output characteristics (IL characteristics) of the ridge waveguide semiconductor laser according to the present embodiment are shown in FIG.
Shown in The threshold current at 25 ° C. was 8 mA, and the slope efficiency was 0.29 W / A (threshold current + 10 mA). The threshold current is 1/3 or less as compared with the conventional ridge waveguide type semiconductor laser. In addition, the saturation of the IL light output was small, and the slope efficiency at a high temperature was significantly improved.

Second Embodiment FIG. 9 is a diagram showing a sectional structure of a ridge waveguide type semiconductor laser device according to the present embodiment. The same parts as those in FIGS. 1 to 4 are denoted by the same reference numerals. This structure has a thickness of 2 μm, a carrier concentration of 1 × 10 ¹⁸ cm ⁻³ , and an S-doped n− layer on the n-InP substrate 1 as in the first embodiment.
InP first cladding layer 3, 1.3 μm composition multiple quantum well structure active layer 5, thickness 0.2 μm, carrier concentration 1 × 10
¹⁵ cm ^-3, an undoped InP second cladding layer 7a, a thickness 0.05 .mu.m, carrier concentration 5 × 10 ¹⁵ cm ^-3, an undoped InGaAsP etching stop layer 9a sequentially M
The crystal is grown by the OCVD method. Next, a photoresist is applied to the entire surface of the substrate, and stripes having a width of 2.5 μm are formed on the substrate by photolithography. Zn is deposited on the entire surface of the substrate, and a striped Zn layer (not shown) is formed by a lift-off method. Next, EC
After forming the SiO ₂ film at a low temperature by R-CVD, the substrate is annealed in a hydrogen atmosphere at 550 ° C. for 5 minutes. By this annealing, a Zn diffusion region 23 is formed. After removing the remaining Zn layer and SiO ₂ film, the thickness is 2 μm, the carrier concentration is 1 × 10 ¹⁸ cm ⁻³ , the Zn-doped p-InP third cladding layer 13 is 0.5 μm, and the carrier concentration is 5 × 10 ¹⁸ cm ^-3 , Zn-doped p-InGaAs
Crystal growth of the s-contact layer 15 is sequentially performed by MOCVD. Next, a photoresist is applied to the entire surface of the substrate, and a stripe having a width of 5 μm is formed above the Zn diffusion region 23 on the substrate by photolithography. next,
With a sulfuric acid-based etchant and a hydrochloric acid-based etchant,
The p-InGaAs contact layer 15 and the p-InP third cladding layer 13 are respectively etched. At this time,
Etching is performed using an InGaAsP etching stop layer 9a.
Stop at The p-InP third cladding layer 13 is formed in a ridge shape, and the width of the ridge is 2.5 μm. Next, after depositing an SiO ₂ film 17 over the entire surface of the substrate by a CVD method, p-InGa is deposited by photolithography.
A 2 μm-wide striped window is formed on the As contact layer 15. Next, after depositing a p-type electrode AuZn19 on the entire surface of the substrate, AuZn is processed in a stripe shape at the window portion by a lift-off method. After removing the resist and sintering, a bonding pad 21 composed of a Ti / Pt / Au electrode is formed by a vapor deposition method and a lift-off method.
Next, the n-InP substrate 1 is polished to a thickness of 100 μm,
After n-electrode AuGe / Ni / Au25 is deposited on the back surface of the substrate, sintering is performed. The wafer is cut into a resonator having a length of 300 μm and a chip width of 300 μm, and mounted and wire-bonded to complete.

In the ridge waveguide type semiconductor laser device according to this embodiment, the same light output characteristics as in the first embodiment can be obtained.

In the second embodiment, pI
The nP third cladding layer 13 is formed in a ridge shape by a hydrochloric acid-based etchant, but may be formed in a ridge shape by crystal-growing the p-InP third cladding layer 13 by selective growth above the Zn diffusion region 23. .

In the first and second embodiments, the active layer has a multiple quantum well structure.
It may have a single quantum well structure or an active layer that is a non-quantum well layer.

Further, the first embodiment and the second embodiment
In the above embodiment, the description has been made using the Zn diffusion region in which Zn is diffused. However, a Cd diffusion region in which Cd and Be are diffused, or a Be diffusion region may be used.

[0027]

As described above, according to the present invention,
The low resistance region that increases the carrier concentration in the current injection portion of the low carrier concentration cladding layer can reduce the reactive current flowing in the cladding layer in the lateral direction and also suppress the carrier overflow from the active layer to the cladding layer. Therefore,
The threshold current is small, the output is stable even in high-power operation and high-temperature operation, and a highly reliable ridge waveguide semiconductor laser device can be realized.

[Brief description of the drawings]

FIG. 1 is a diagram showing a cross-sectional structure in each manufacturing process of a ridge waveguide type semiconductor laser device according to a first embodiment of the present invention (part 1).

FIG. 2 is a diagram showing a cross-sectional structure in each manufacturing process of the ridge waveguide type semiconductor laser device according to the first embodiment of the present invention (part 2).

FIG. 3 is a view showing a cross-sectional structure in each manufacturing process of the ridge waveguide type semiconductor laser device according to the first embodiment of the present invention (part 3).

FIG. 4 is a view showing a cross-sectional structure in each manufacturing process of the ridge waveguide type semiconductor laser device according to the first embodiment of the present invention (part 4).

FIG. 5 is a diagram showing an equivalent circuit in a cross-sectional view of the ridge waveguide type semiconductor laser device of FIG. 4;

6 is a diagram showing a relationship between a forward voltage applied to the equivalent circuit of FIG. 5 and a current (leakage current) flowing from a node n2 to a node n5.

7 is a diagram showing the relationship between the carrier concentration and the resistance value of the InP second cladding layer 7a in FIG. 4 and the leakage current between each node of the equivalent circuit in FIG. 5;

FIG. 8 is a diagram showing optical output characteristics of the ridge waveguide type semiconductor laser device of FIG. 4;

FIG. 9 is a diagram showing a cross-sectional structure of a ridge waveguide type semiconductor laser device according to a second embodiment of the present invention.

FIG. 10 is a diagram showing a cross-sectional structure of a conventional ridge waveguide semiconductor laser device.

FIG. 11 is a diagram showing an equivalent circuit in a cross-sectional view of the ridge waveguide type semiconductor laser device of FIG. 10;

FIG. 12 is a diagram showing light output-current characteristics of the ridge waveguide type semiconductor laser device of FIG.

[Explanation of symbols]

Reference Signs List 1 n-InP substrate 3 n-InP first cladding layer 5 1.3 μm composition multiple quantum well structure active layer 7 p-InP second cladding layer 7a undoped InP second cladding layer 9 p-InGaAsP etching stop layer 9a undoped InGaAsP etching Stop layer 11 p-InP diffusion source layer (high concentration impurity layer) 13 p-InP second cladding layer 15 p-InGaAs contact layer 17 SiO ₂ film 19 p-type electrode 21 bonding pad 23 Zn diffusion region (low resistance region) 25 n electrode

Claims (8)

[Claims] A first cladding layer; an active layer formed on the first cladding layer; a second cladding layer formed on the active layer; and at least a part of the second cladding layer. A ridge waveguide type semiconductor laser device having at least a third cladding layer formed in a ridge shape on an upper portion of the ridge waveguide type semiconductor laser device, wherein the second cladding layer has a conductivity different from that of the first cladding layer below the third cladding layer. A ridge waveguide type semiconductor laser device comprising a low resistance region formed in a mold. 2. The ridge waveguide semiconductor laser device according to claim 1, wherein the low resistance region is formed with a higher carrier concentration than other regions of the second cladding layer. 3. The first clad layer, the active layer, the second clad layer, and the third clad layer,
2. The ridge waveguide type semiconductor laser device according to claim 1, comprising a group III compound semiconductor. 4. The ridge waveguide semiconductor laser device according to claim 3, wherein the low resistance region is formed by doping impurities at a high concentration. 5. The ridge waveguide semiconductor laser device according to claim 4, wherein the impurity is any one of Zn, Cd, and Be. 6. A first clad layer, an active layer formed on the first clad layer, a second clad layer formed on the active layer, and at least a part of the second clad layer. A method of manufacturing a ridge waveguide type semiconductor laser device having at least a third cladding layer formed in a ridge shape on top of a step of forming a high concentration impurity layer on at least a part of the second cladding layer; Diffusing the impurity from the high-concentration impurity layer into the second cladding layer to form a low-resistance region having a conductivity type different from that of the first cladding layer; A method of manufacturing a ridge waveguide type semiconductor laser device, comprising at least a step of forming a cladding layer. 7. A first cladding layer, an active layer formed on the first cladding layer, a second cladding layer formed on the active layer, and at least a part of the second cladding layer. A method of manufacturing a ridge waveguide type semiconductor laser device having at least a third cladding layer formed in a ridge shape on an upper part of the semiconductor device, wherein a step of forming an impurity layer on at least a part of the second cladding layer; Diffusing the impurity from the layer into the second cladding layer to form a low-resistance region having a conductivity type different from that of the first cladding layer; and forming the third cladding layer on the low-resistance region. And a method for manufacturing a ridge waveguide semiconductor laser device. 8. The carrier concentration of the high concentration impurity layer is:
7. The method for manufacturing a ridge waveguide type semiconductor laser device according to claim 6, wherein the thickness is 1 * 10 < ¹⁸ > cm < ^-3 > or more.