ITVA20020012A1 - Dispositivo di memoria e metodo di lettura sequenziale di gruppi di bit da un dispositivo di memoria - Google Patents
Dispositivo di memoria e metodo di lettura sequenziale di gruppi di bit da un dispositivo di memoriaInfo
- Publication number
- ITVA20020012A1 ITVA20020012A1 IT2002VA000012A ITVA20020012A ITVA20020012A1 IT VA20020012 A1 ITVA20020012 A1 IT VA20020012A1 IT 2002VA000012 A IT2002VA000012 A IT 2002VA000012A IT VA20020012 A ITVA20020012 A IT VA20020012A IT VA20020012 A1 ITVA20020012 A1 IT VA20020012A1
- Authority
- IT
- Italy
- Prior art keywords
- memory device
- bit groups
- sequential reading
- sequential
- reading
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/103—Read-write modes for single port memories, i.e. having either a random port or a serial port using serially addressed read-write data registers
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT2002VA000012A ITVA20020012A1 (it) | 2002-02-08 | 2002-02-08 | Dispositivo di memoria e metodo di lettura sequenziale di gruppi di bit da un dispositivo di memoria |
US10/360,515 US20040004886A1 (en) | 2002-02-08 | 2003-02-07 | Memory device and method for reading sequentially groups of bits from a memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT2002VA000012A ITVA20020012A1 (it) | 2002-02-08 | 2002-02-08 | Dispositivo di memoria e metodo di lettura sequenziale di gruppi di bit da un dispositivo di memoria |
Publications (2)
Publication Number | Publication Date |
---|---|
ITVA20020012A0 ITVA20020012A0 (it) | 2002-02-08 |
ITVA20020012A1 true ITVA20020012A1 (it) | 2003-08-08 |
Family
ID=11460902
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT2002VA000012A ITVA20020012A1 (it) | 2002-02-08 | 2002-02-08 | Dispositivo di memoria e metodo di lettura sequenziale di gruppi di bit da un dispositivo di memoria |
Country Status (2)
Country | Link |
---|---|
US (1) | US20040004886A1 (it) |
IT (1) | ITVA20020012A1 (it) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5890193A (en) * | 1995-07-28 | 1999-03-30 | Micron Technology, Inc. | Architecture for state machine for controlling internal operations of flash memory |
US5687114A (en) * | 1995-10-06 | 1997-11-11 | Agate Semiconductor, Inc. | Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell |
US6233665B1 (en) * | 1997-05-27 | 2001-05-15 | Unisys Corporation | Mapping shared DRAM address bits by accessing data memory in page mode cache status memory in word mode |
US6157970A (en) * | 1997-09-24 | 2000-12-05 | Intel Corporation | Direct memory access system using time-multiplexing for transferring address, data, and control and a separate control line for serially transmitting encoded DMA channel number |
-
2002
- 2002-02-08 IT IT2002VA000012A patent/ITVA20020012A1/it unknown
-
2003
- 2003-02-07 US US10/360,515 patent/US20040004886A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US20040004886A1 (en) | 2004-01-08 |
ITVA20020012A0 (it) | 2002-02-08 |
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