IT950802B - Metodo per la formazione di un contatto intermetallico in un dispositivo semiconduttore - Google Patents

Metodo per la formazione di un contatto intermetallico in un dispositivo semiconduttore

Info

Publication number
IT950802B
IT950802B IT22442/72A IT2244272A IT950802B IT 950802 B IT950802 B IT 950802B IT 22442/72 A IT22442/72 A IT 22442/72A IT 2244272 A IT2244272 A IT 2244272A IT 950802 B IT950802 B IT 950802B
Authority
IT
Italy
Prior art keywords
formation
semiconductor device
intermetallic contact
intermetallic
contact
Prior art date
Application number
IT22442/72A
Other languages
English (en)
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Application granted granted Critical
Publication of IT950802B publication Critical patent/IT950802B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/003—Anneal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/139—Schottky barrier
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/147—Silicides
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49204—Contact or terminal manufacturing

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
IT22442/72A 1971-04-05 1972-03-27 Metodo per la formazione di un contatto intermetallico in un dispositivo semiconduttore IT950802B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13134071A 1971-04-05 1971-04-05

Publications (1)

Publication Number Publication Date
IT950802B true IT950802B (it) 1973-06-20

Family

ID=22449017

Family Applications (1)

Application Number Title Priority Date Filing Date
IT22442/72A IT950802B (it) 1971-04-05 1972-03-27 Metodo per la formazione di un contatto intermetallico in un dispositivo semiconduttore

Country Status (9)

Country Link
US (1) US3753774A (it)
AU (1) AU465779B2 (it)
BE (1) BE781643A (it)
CA (1) CA968676A (it)
DE (1) DE2215357A1 (it)
FR (1) FR2132167B1 (it)
GB (1) GB1321034A (it)
IT (1) IT950802B (it)
NL (1) NL7204469A (it)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3900344A (en) * 1973-03-23 1975-08-19 Ibm Novel integratable schottky barrier structure and method for the fabrication thereof
US3956527A (en) * 1973-04-16 1976-05-11 Ibm Corporation Dielectrically isolated Schottky Barrier structure and method of forming the same
US4000502A (en) * 1973-11-05 1976-12-28 General Dynamics Corporation Solid state radiation detector and process
FR2280203A1 (fr) * 1974-07-26 1976-02-20 Thomson Csf Procede d'ajustement de tension de seuil de transistors a effet de champ
US4042950A (en) * 1976-03-01 1977-08-16 Advanced Micro Devices, Inc. Platinum silicide fuse links for integrated circuit devices
IT1110843B (it) * 1978-02-27 1986-01-06 Rca Corp Contatto affondato per dispositivi mos di tipo complementare
US4276688A (en) * 1980-01-21 1981-07-07 Rca Corporation Method for forming buried contact complementary MOS devices
US5202574A (en) * 1980-05-02 1993-04-13 Texas Instruments Incorporated Semiconductor having improved interlevel conductor insulation
JPS5846193B2 (ja) * 1980-07-15 1983-10-14 株式会社東芝 半導体装置
US4339869A (en) * 1980-09-15 1982-07-20 General Electric Company Method of making low resistance contacts in semiconductor devices by ion induced silicides
JPS584924A (ja) * 1981-07-01 1983-01-12 Hitachi Ltd 半導体装置の電極形成方法
JPS59110179A (ja) * 1982-12-16 1984-06-26 Hitachi Ltd 半導体装置およびその製造法
DE3304642A1 (de) * 1983-02-10 1984-08-16 Siemens AG, 1000 Berlin und 8000 München Integrierte halbleiterschaltung mit bipolartransistor-strukturen und verfahren zu ihrer herstellung
JPS61208869A (ja) * 1985-03-14 1986-09-17 Nec Corp 半導体装置及びその製造方法
US4635347A (en) * 1985-03-29 1987-01-13 Advanced Micro Devices, Inc. Method of fabricating titanium silicide gate electrodes and interconnections
US4818723A (en) * 1985-11-27 1989-04-04 Advanced Micro Devices, Inc. Silicide contact plug formation technique
US4873205A (en) * 1987-12-21 1989-10-10 International Business Machines Corporation Method for providing silicide bridge contact between silicon regions separated by a thin dielectric
US4966868A (en) * 1988-05-16 1990-10-30 Intel Corporation Process for selective contact hole filling including a silicide plug
US5196360A (en) * 1990-10-02 1993-03-23 Micron Technologies, Inc. Methods for inhibiting outgrowth of silicide in self-aligned silicide process
US5100838A (en) * 1990-10-04 1992-03-31 Micron Technology, Inc. Method for forming self-aligned conducting pillars in an (IC) fabrication process
US5074941A (en) * 1990-12-10 1991-12-24 Cornell Research Foundation, Inc. Enhancing bonding at metal-ceramic interfaces
US5173354A (en) * 1990-12-13 1992-12-22 Cornell Research Foundation, Inc. Non-beading, thin-film, metal-coated ceramic substrate
JP2611726B2 (ja) * 1993-10-07 1997-05-21 日本電気株式会社 半導体装置の製造方法
US5670417A (en) * 1996-03-25 1997-09-23 Motorola, Inc. Method for fabricating self-aligned semiconductor component
DE19828846C2 (de) * 1998-06-27 2001-01-18 Micronas Gmbh Verfahren zum Beschichten eines Substrats
US7226835B2 (en) * 2001-12-28 2007-06-05 Texas Instruments Incorporated Versatile system for optimizing current gain in bipolar transistor structures
CN101826472A (zh) * 2010-03-04 2010-09-08 江阴新顺微电子有限公司 芯片背面复合材料多层金属化方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3274670A (en) * 1965-03-18 1966-09-27 Bell Telephone Labor Inc Semiconductor contact
US3615929A (en) * 1965-07-08 1971-10-26 Texas Instruments Inc Method of forming epitaxial region of predetermined thickness and article of manufacture
US3410250A (en) * 1965-10-19 1968-11-12 Western Electric Co Spray nozzle assembly
DE1806980A1 (de) * 1967-11-15 1969-06-19 Fairchild Camera Instr Co Halbleiter-Bauelement
US3574008A (en) * 1968-08-19 1971-04-06 Trw Semiconductors Inc Mushroom epitaxial growth in tier-type shaped holes
US3558366A (en) * 1968-09-17 1971-01-26 Bell Telephone Labor Inc Metal shielding for ion implanted semiconductor device
US3632436A (en) * 1969-07-11 1972-01-04 Rca Corp Contact system for semiconductor devices
BE755371A (fr) * 1969-08-27 1971-02-01 Ibm Contacts ohmiques pour dispositifs semi-conducteurs
US3604986A (en) * 1970-03-17 1971-09-14 Bell Telephone Labor Inc High frequency transistors with shallow emitters

Also Published As

Publication number Publication date
NL7204469A (it) 1972-10-09
AU465779B2 (en) 1973-10-11
GB1321034A (en) 1973-06-20
FR2132167B1 (it) 1977-08-19
US3753774A (en) 1973-08-21
DE2215357A1 (de) 1972-10-12
FR2132167A1 (it) 1972-11-17
CA968676A (en) 1975-06-03
BE781643A (fr) 1972-07-31
AU4078072A (en) 1973-10-11

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