IT8822652A0 - Sistema multiprocessore di elaborazione dati con replicazione di dati globali. - Google Patents

Sistema multiprocessore di elaborazione dati con replicazione di dati globali.

Info

Publication number
IT8822652A0
IT8822652A0 IT8822652A IT2265288A IT8822652A0 IT 8822652 A0 IT8822652 A0 IT 8822652A0 IT 8822652 A IT8822652 A IT 8822652A IT 2265288 A IT2265288 A IT 2265288A IT 8822652 A0 IT8822652 A0 IT 8822652A0
Authority
IT
Italy
Prior art keywords
processing system
data processing
multiprocessor
replication
global
Prior art date
Application number
IT8822652A
Other languages
English (en)
Other versions
IT1227360B (it
Inventor
Carlo Bagnoli
Angelo Casamatta
Angelo Lazzari
Original Assignee
Honeywell Bull Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Bull Spa filed Critical Honeywell Bull Spa
Priority to IT8822652A priority Critical patent/IT1227360B/it
Publication of IT8822652A0 publication Critical patent/IT8822652A0/it
Priority to US07/423,820 priority patent/US5214776A/en
Priority to EP89120433A priority patent/EP0369265B1/en
Priority to DE68913914T priority patent/DE68913914T2/de
Application granted granted Critical
Publication of IT1227360B publication Critical patent/IT1227360B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161—Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Multi Processors (AREA)
IT8822652A 1988-11-18 1988-11-18 Sistema multiprocessore di elaborazione dati con replicazione di dati globali. IT1227360B (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
IT8822652A IT1227360B (it) 1988-11-18 1988-11-18 Sistema multiprocessore di elaborazione dati con replicazione di dati globali.
US07/423,820 US5214776A (en) 1988-11-18 1989-10-18 Multiprocessor system having global data replication
EP89120433A EP0369265B1 (en) 1988-11-18 1989-11-04 Multiprocessor system having global data replication
DE68913914T DE68913914T2 (de) 1988-11-18 1989-11-04 Multiprozessorsystem mit Vervielfältigung von globalen Daten.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8822652A IT1227360B (it) 1988-11-18 1988-11-18 Sistema multiprocessore di elaborazione dati con replicazione di dati globali.

Publications (2)

Publication Number Publication Date
IT8822652A0 true IT8822652A0 (it) 1988-11-18
IT1227360B IT1227360B (it) 1991-04-08

Family

ID=11198885

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8822652A IT1227360B (it) 1988-11-18 1988-11-18 Sistema multiprocessore di elaborazione dati con replicazione di dati globali.

Country Status (4)

Country Link
US (1) US5214776A (it)
EP (1) EP0369265B1 (it)
DE (1) DE68913914T2 (it)
IT (1) IT1227360B (it)

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US7457822B1 (en) 2002-11-01 2008-11-25 Bluearc Uk Limited Apparatus and method for hardware-based file system
US7849452B2 (en) * 2004-04-23 2010-12-07 Waratek Pty Ltd. Modification of computer applications at load time for distributed execution
US20050262513A1 (en) * 2004-04-23 2005-11-24 Waratek Pty Limited Modified computer architecture with initialization of objects
US7707179B2 (en) * 2004-04-23 2010-04-27 Waratek Pty Limited Multiple computer architecture with synchronization
US20060253844A1 (en) * 2005-04-21 2006-11-09 Holt John M Computer architecture and method of operation for multi-computer distributed processing with initialization of objects
US20060095483A1 (en) * 2004-04-23 2006-05-04 Waratek Pty Limited Modified computer architecture with finalization of objects
US20050257219A1 (en) * 2004-04-23 2005-11-17 Holt John M Multiple computer architecture with replicated memory fields
US7844665B2 (en) * 2004-04-23 2010-11-30 Waratek Pty Ltd. Modified computer architecture having coordinated deletion of corresponding replicated memory locations among plural computers
US20070100828A1 (en) * 2005-10-25 2007-05-03 Holt John M Modified machine architecture with machine redundancy
US7958322B2 (en) * 2005-10-25 2011-06-07 Waratek Pty Ltd Multiple machine architecture with overhead reduction
US7581069B2 (en) * 2005-10-25 2009-08-25 Waratek Pty Ltd. Multiple computer system with enhanced memory clean up
US7660960B2 (en) * 2005-10-25 2010-02-09 Waratek Pty, Ltd. Modified machine architecture with partial memory updating
US7849369B2 (en) * 2005-10-25 2010-12-07 Waratek Pty Ltd. Failure resistant multiple computer system and method
US7761670B2 (en) * 2005-10-25 2010-07-20 Waratek Pty Limited Modified machine architecture with advanced synchronization
US8015236B2 (en) * 2005-10-25 2011-09-06 Waratek Pty. Ltd. Replication of objects having non-primitive fields, especially addresses
JP4419943B2 (ja) 2005-11-11 2010-02-24 株式会社デンソー Ｃｐｕ間データ転送装置
WO2008040083A1 (en) * 2006-10-05 2008-04-10 Waratek Pty Limited Adding one or more computers to a multiple computer system
WO2008040064A1 (en) * 2006-10-05 2008-04-10 Waratek Pty Limited Switch protocol for network communications
US7739349B2 (en) * 2006-10-05 2010-06-15 Waratek Pty Limited Synchronization with partial memory replication
WO2008040081A1 (en) * 2006-10-05 2008-04-10 Waratek Pty Limited Job scheduling amongst multiple computers
US20100121935A1 (en) * 2006-10-05 2010-05-13 Holt John M Hybrid replicated shared memory
WO2008040063A1 (en) * 2006-10-05 2008-04-10 Waratek Pty Limited Multi-path switching networks
US20080120478A1 (en) * 2006-10-05 2008-05-22 Holt John M Advanced synchronization and contention resolution
US8090926B2 (en) * 2006-10-05 2012-01-03 Waratek Pty Ltd. Hybrid replicated shared memory
US20080126372A1 (en) * 2006-10-05 2008-05-29 Holt John M Cyclic redundant multiple computer architecture
WO2008040066A1 (en) * 2006-10-05 2008-04-10 Waratek Pty Limited Redundant multiple computer architecture
WO2008040085A1 (en) * 2006-10-05 2008-04-10 Waratek Pty Limited Network protocol for network communications
WO2008040065A1 (en) * 2006-10-05 2008-04-10 Waratek Pty Limited Contention detection and resolution
US20100054254A1 (en) * 2006-10-05 2010-03-04 Holt John M Asynchronous data transmission
JP5318768B2 (ja) * 2006-10-05 2013-10-16 ワラテック プロプライエタリー リミテッド 高度な競合検出
US20080126503A1 (en) * 2006-10-05 2008-05-29 Holt John M Contention resolution with echo cancellation
WO2008040079A1 (en) * 2006-10-05 2008-04-10 Waratek Pty Limited Multiple network connections for multiple computers
WO2008040082A1 (en) * 2006-10-05 2008-04-10 Waratek Pty Limited Multiple computer system with dual mode redundancy architecture
US20080133859A1 (en) * 2006-10-05 2008-06-05 Holt John M Advanced synchronization and contention resolution
US20080126506A1 (en) * 2006-10-05 2008-05-29 Holt John M Multiple computer system with redundancy architecture
US7962697B2 (en) * 2006-10-05 2011-06-14 Waratek Pty Limited Contention detection
US20080140975A1 (en) * 2006-10-05 2008-06-12 Holt John M Contention detection with data consolidation
US20080133689A1 (en) * 2006-10-05 2008-06-05 Holt John M Silent memory reclamation
US20080120477A1 (en) * 2006-10-05 2008-05-22 Holt John M Contention detection with modified message format
US20080140863A1 (en) * 2006-10-05 2008-06-12 Holt John M Multiple communication networks for multiple computers
US20080250221A1 (en) * 2006-10-09 2008-10-09 Holt John M Contention detection with data consolidation
US8316190B2 (en) * 2007-04-06 2012-11-20 Waratek Pty. Ltd. Computer architecture and method of operation for multi-computer distributed processing having redundant array of independent systems with replicated memory and code striping

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Also Published As

Publication number Publication date
DE68913914D1 (de) 1994-04-21
IT1227360B (it) 1991-04-08
DE68913914T2 (de) 1994-06-23
EP0369265A3 (en) 1990-07-18
US5214776A (en) 1993-05-25
EP0369265A2 (en) 1990-05-23
EP0369265B1 (en) 1994-03-16

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Effective date: 19971129