IT8468199A1 - Circuito per la precarica di bus, per componenti integrati in tecnologia mos. - Google Patents
Circuito per la precarica di bus, per componenti integrati in tecnologia mos.Info
- Publication number
- IT8468199A1 IT8468199A1 IT1984A68199A IT6819984A IT8468199A1 IT 8468199 A1 IT8468199 A1 IT 8468199A1 IT 1984A68199 A IT1984A68199 A IT 1984A68199A IT 6819984 A IT6819984 A IT 6819984A IT 8468199 A1 IT8468199 A1 IT 8468199A1
- Authority
- IT
- Italy
- Prior art keywords
- preloading
- bus
- circuit
- integrated components
- mos technology
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
- H03K19/09441—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
- H03K19/09443—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
- H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT68199/84A IT1180149B (it) | 1984-12-04 | 1984-12-04 | Circuito per la precarica di bus per componenti integrati in tecnologia mos |
JP60268410A JPS61136318A (ja) | 1984-12-04 | 1985-11-30 | Mos集積部品用バス予備充電回路 |
EP85115264A EP0188709A1 (en) | 1984-12-04 | 1985-12-02 | Bus-precharge circuit for MOS integrated components |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT68199/84A IT1180149B (it) | 1984-12-04 | 1984-12-04 | Circuito per la precarica di bus per componenti integrati in tecnologia mos |
Publications (3)
Publication Number | Publication Date |
---|---|
IT8468199A0 IT8468199A0 (it) | 1984-12-04 |
IT8468199A1 true IT8468199A1 (it) | 1986-06-04 |
IT1180149B IT1180149B (it) | 1987-09-23 |
Family
ID=11308449
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT68199/84A IT1180149B (it) | 1984-12-04 | 1984-12-04 | Circuito per la precarica di bus per componenti integrati in tecnologia mos |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0188709A1 (it) |
JP (1) | JPS61136318A (it) |
IT (1) | IT1180149B (it) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003100974A2 (en) * | 2002-05-28 | 2003-12-04 | Igor Anatolievich Abrosimov | Pull up for high speed structures |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS522156A (en) * | 1975-06-24 | 1977-01-08 | Hitachi Ltd | Push-pull buffer circuit |
JPS53102660A (en) * | 1977-02-21 | 1978-09-07 | Hitachi Ltd | Push pull buffer circuit |
US4489246A (en) * | 1980-12-24 | 1984-12-18 | Fujitsu Limited | Field effect transistor logic circuit having high operating speed and low power consumption |
JPS5970022A (ja) * | 1982-10-13 | 1984-04-20 | Mitsubishi Electric Corp | ダイナミツク型半導体装置 |
-
1984
- 1984-12-04 IT IT68199/84A patent/IT1180149B/it active
-
1985
- 1985-11-30 JP JP60268410A patent/JPS61136318A/ja active Pending
- 1985-12-02 EP EP85115264A patent/EP0188709A1/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
IT1180149B (it) | 1987-09-23 |
JPS61136318A (ja) | 1986-06-24 |
EP0188709A1 (en) | 1986-07-30 |
IT8468199A0 (it) | 1984-12-04 |
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