IT1401091B1 - Circuito di lettura di celle di memoria non volatili e sistema di memoria comprendente il circuito - Google Patents

Circuito di lettura di celle di memoria non volatili e sistema di memoria comprendente il circuito

Info

Publication number
IT1401091B1
IT1401091B1 ITMI2010A001080A ITMI20101080A IT1401091B1 IT 1401091 B1 IT1401091 B1 IT 1401091B1 IT MI2010A001080 A ITMI2010A001080 A IT MI2010A001080A IT MI20101080 A ITMI20101080 A IT MI20101080A IT 1401091 B1 IT1401091 B1 IT 1401091B1
Authority
IT
Italy
Prior art keywords
circuit
system including
volatile memory
memory cells
memory system
Prior art date
Application number
ITMI2010A001080A
Other languages
English (en)
Inventor
Maurizio Francesco Perroni
Castagnagiuseppe
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to ITMI2010A001080A priority Critical patent/IT1401091B1/it
Priority to US13/161,248 priority patent/US8750047B2/en
Publication of ITMI20101080A1 publication Critical patent/ITMI20101080A1/it
Application granted granted Critical
Publication of IT1401091B1 publication Critical patent/IT1401091B1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/08—Control thereof
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22—Control and timing of internal memory operations
    • G11C2207/2281—Timing of a read operation
ITMI2010A001080A 2010-06-15 2010-06-15 Circuito di lettura di celle di memoria non volatili e sistema di memoria comprendente il circuito IT1401091B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
ITMI2010A001080A IT1401091B1 (it) 2010-06-15 2010-06-15 Circuito di lettura di celle di memoria non volatili e sistema di memoria comprendente il circuito
US13/161,248 US8750047B2 (en) 2010-06-15 2011-06-15 Circuit for reading non-volatile memory cells having a precharging circuit activated after the activation of a sense circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITMI2010A001080A IT1401091B1 (it) 2010-06-15 2010-06-15 Circuito di lettura di celle di memoria non volatili e sistema di memoria comprendente il circuito

Publications (2)

Publication Number Publication Date
ITMI20101080A1 ITMI20101080A1 (it) 2011-12-16
IT1401091B1 true IT1401091B1 (it) 2013-07-12

Family

ID=43413729

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI2010A001080A IT1401091B1 (it) 2010-06-15 2010-06-15 Circuito di lettura di celle di memoria non volatili e sistema di memoria comprendente il circuito

Country Status (2)

Country Link
US (1) US8750047B2 (it)
IT (1) IT1401091B1 (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI588830B (zh) * 2014-07-25 2017-06-21 華邦電子股份有限公司 電流檢測電路及半導體記憶裝置
FR3044460B1 (fr) 2015-12-01 2018-03-30 Stmicroelectronics (Rousset) Sas Amplificateur de lecture pour memoire, en particulier une memoire eeprom
IT201600084790A1 (it) 2016-08-11 2018-02-11 St Microelectronics Srl Dispositivo di memoria a cambiamento di fase, sistema includente il dispositivo di memoria e metodo di funzionamento del dispositivo di memoria a cambiamento di fase
US10269413B1 (en) * 2017-10-17 2019-04-23 R&D 3 Llc Memory device having variable impedance memory cells and time-to-transition sensing of data stored therein

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3471251B2 (ja) * 1999-04-26 2003-12-02 Ｎｅｃエレクトロニクス株式会社 不揮発性半導体記憶装置
FR2801419B1 (fr) * 1999-11-18 2003-07-25 St Microelectronics Sa Procede et dispositif de lecture pour memoire en circuit integre
EP1505605A1 (en) 2003-08-06 2005-02-09 STMicroelectronics S.r.l. Improved sensing circuit for a semiconductor memory including bit line precharging and discharging functions
KR100623618B1 (ko) * 2005-03-31 2006-09-14 주식회사 하이닉스반도체 저전압용 반도체 메모리 장치
US7466614B2 (en) * 2006-10-10 2008-12-16 Taiwan Semiconductor Manufacturing Co. Sense amplifier for non-volatile memory

Also Published As

Publication number Publication date
US8750047B2 (en) 2014-06-10
ITMI20101080A1 (it) 2011-12-16
US20110305096A1 (en) 2011-12-15

Similar Documents

Publication Publication Date Title
ZA201300619B (en) Non-volatile memory with split write and read bitlines
BR112012022445A2 (pt) "sistema e mídia de aemazenagem
FR2963152B1 (fr) Element de memoire magnetique
HK1183741A1 (zh) 量化存儲器位單元的讀取和寫入裕量
BRPI0909717A2 (pt) seleção de sistema de célula femto
BR112012009787A2 (pt) meio lido por computador e sistema
BR112013002748A2 (pt) cartucho de material de impressão e sistema de fornecimento de material de impressão
DK2608953T3 (da) Hjørnestolpeanbringelsessystem
BRPI1015256A2 (pt) sistema rfid usável
BR112015002837A2 (pt) sistema de armazenamento de dados de arquivamento
EP2901292A4 (en) METHODS RELATED TO CRITICAL PROTECTION SYSTEM DATA WRITTEN TO NON-VOLATILE MEMORY
FR2957186B1 (fr) Cellule memoire de type sram
IT1400794B1 (it) Sistema di iniezione
IT1399916B1 (it) Dispositivo di memoria ad accesso di registro indicizzato
IT1400160B1 (it) "sistema di fitodepurazione biotecnologica"
IT1394493B1 (it) Sistema di ritenzione per visiere
IT1401091B1 (it) Circuito di lettura di celle di memoria non volatili e sistema di memoria comprendente il circuito
IT1401267B1 (it) Sistema automatico di stoccaggio per farmacie
BRPI1006691A2 (pt) sistema
BRPI1006688A2 (pt) sistema
HK1166877A1 (en) Memory element and memory structure
IT1397216B1 (it) Dispositivo di memoria sram
IT1402850B1 (it) Mutande con elemento assorbente integrato e lavabile
BR112012000785A2 (pt) sistema flutuante
FI20105743A0 (fi) Muistista lukeminen tai muistiin kirjoittaminen