IT1306963B1 - Circuito a compensazione capacitativa per la regolazione dellatensione di lettura di riga in memorie non-volatili - Google Patents
Circuito a compensazione capacitativa per la regolazione dellatensione di lettura di riga in memorie non-volatiliInfo
- Publication number
- IT1306963B1 IT1306963B1 IT1999MI000080A ITMI990080A IT1306963B1 IT 1306963 B1 IT1306963 B1 IT 1306963B1 IT 1999MI000080 A IT1999MI000080 A IT 1999MI000080A IT MI990080 A ITMI990080 A IT MI990080A IT 1306963 B1 IT1306963 B1 IT 1306963B1
- Authority
- IT
- Italy
- Prior art keywords
- capacitative
- compensation circuit
- volatile memories
- reading voltage
- line reading
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/14—Word line organisation; Word line lay-out
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT1999MI000080A IT1306963B1 (it) | 1999-01-19 | 1999-01-19 | Circuito a compensazione capacitativa per la regolazione dellatensione di lettura di riga in memorie non-volatili |
US09/491,475 US6259632B1 (en) | 1999-01-19 | 2000-01-19 | Capacitive compensation circuit for the regulation of the word line reading voltage in non-volatile memories |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT1999MI000080A IT1306963B1 (it) | 1999-01-19 | 1999-01-19 | Circuito a compensazione capacitativa per la regolazione dellatensione di lettura di riga in memorie non-volatili |
Publications (2)
Publication Number | Publication Date |
---|---|
ITMI990080A1 ITMI990080A1 (it) | 2000-07-19 |
IT1306963B1 true IT1306963B1 (it) | 2001-10-11 |
Family
ID=11381521
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT1999MI000080A IT1306963B1 (it) | 1999-01-19 | 1999-01-19 | Circuito a compensazione capacitativa per la regolazione dellatensione di lettura di riga in memorie non-volatili |
Country Status (2)
Country | Link |
---|---|
US (1) | US6259632B1 (it) |
IT (1) | IT1306963B1 (it) |
Families Citing this family (40)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6430093B1 (en) * | 2001-05-24 | 2002-08-06 | Ramtron International Corporation | CMOS boosting circuit utilizing ferroelectric capacitors |
US20030122173A1 (en) * | 2001-12-28 | 2003-07-03 | Rabadam Eleanor P. | Package for a non-volatile memory device including integrated passive devices and method for making the same |
KR100495854B1 (ko) * | 2002-07-11 | 2005-06-16 | 주식회사 하이닉스반도체 | 부스팅 회로 |
US7031219B2 (en) * | 2004-06-04 | 2006-04-18 | Etron Technology, Inc. | Internal power management scheme for a memory chip in deep power down mode |
US7196946B2 (en) * | 2005-04-05 | 2007-03-27 | Sandisk Corporation | Compensating for coupling in non-volatile storage |
US7187585B2 (en) * | 2005-04-05 | 2007-03-06 | Sandisk Corporation | Read operation for non-volatile storage that includes compensation for coupling |
US7196928B2 (en) * | 2005-04-05 | 2007-03-27 | Sandisk Corporation | Compensating for coupling during read operations of non-volatile memory |
US7443726B2 (en) * | 2005-12-29 | 2008-10-28 | Sandisk Corporation | Systems for alternate row-based reading and writing for non-volatile memory |
US7349260B2 (en) * | 2005-12-29 | 2008-03-25 | Sandisk Corporation | Alternate row-based reading and writing for non-volatile memory |
US7436733B2 (en) * | 2006-03-03 | 2008-10-14 | Sandisk Corporation | System for performing read operation on non-volatile storage with compensation for coupling |
US7499319B2 (en) * | 2006-03-03 | 2009-03-03 | Sandisk Corporation | Read operation for non-volatile storage with compensation for coupling |
US7440331B2 (en) * | 2006-06-01 | 2008-10-21 | Sandisk Corporation | Verify operation for non-volatile storage using different voltages |
US7457163B2 (en) * | 2006-06-01 | 2008-11-25 | Sandisk Corporation | System for verifying non-volatile storage using different voltages |
US7310272B1 (en) * | 2006-06-02 | 2007-12-18 | Sandisk Corporation | System for performing data pattern sensitivity compensation using different voltage |
US7450421B2 (en) * | 2006-06-02 | 2008-11-11 | Sandisk Corporation | Data pattern sensitivity compensation using different voltage |
US7626865B2 (en) | 2006-06-13 | 2009-12-01 | Micron Technology, Inc. | Charge pump operation in a non-volatile memory device |
US7606084B2 (en) * | 2006-06-19 | 2009-10-20 | Sandisk Corporation | Programming differently sized margins and sensing with compensations at select states for improved read operations in non-volatile memory |
US7352628B2 (en) * | 2006-06-19 | 2008-04-01 | Sandisk Corporation | Systems for programming differently sized margins and sensing with compensations at select states for improved read operations in a non-volatile memory |
US7506113B2 (en) * | 2006-07-20 | 2009-03-17 | Sandisk Corporation | Method for configuring compensation |
US7400535B2 (en) * | 2006-07-20 | 2008-07-15 | Sandisk Corporation | System that compensates for coupling during programming |
US7885119B2 (en) * | 2006-07-20 | 2011-02-08 | Sandisk Corporation | Compensating for coupling during programming |
US7495953B2 (en) * | 2006-07-20 | 2009-02-24 | Sandisk Corporation | System for configuring compensation |
US7443729B2 (en) * | 2006-07-20 | 2008-10-28 | Sandisk Corporation | System that compensates for coupling based on sensing a neighbor using coupling |
US7522454B2 (en) * | 2006-07-20 | 2009-04-21 | Sandisk Corporation | Compensating for coupling based on sensing a neighbor using coupling |
US7447076B2 (en) * | 2006-09-29 | 2008-11-04 | Sandisk Corporation | Systems for reverse reading in non-volatile memory with compensation for coupling |
US7684247B2 (en) * | 2006-09-29 | 2010-03-23 | Sandisk Corporation | Reverse reading in non-volatile memory with compensation for coupling |
US7599231B2 (en) * | 2006-10-11 | 2009-10-06 | Atmel Corporation | Adaptive regulator for idle state in a charge pump circuit of a memory device |
US7495992B2 (en) * | 2006-12-22 | 2009-02-24 | Sandisk Corporation | System for reducing wordline recovery time |
US7616505B2 (en) * | 2006-12-28 | 2009-11-10 | Sandisk Corporation | Complete word line look ahead with efficient data latch assignment in non-volatile memory read operations |
US7616506B2 (en) * | 2006-12-28 | 2009-11-10 | Sandisk Corporation | Systems for complete word line look ahead with efficient data latch assignment in non-volatile memory read operations |
US7440324B2 (en) * | 2006-12-29 | 2008-10-21 | Sandisk Corporation | Apparatus with alternating read mode |
US7606070B2 (en) * | 2006-12-29 | 2009-10-20 | Sandisk Corporation | Systems for margined neighbor reading for non-volatile memory read operations including coupling compensation |
US7518923B2 (en) * | 2006-12-29 | 2009-04-14 | Sandisk Corporation | Margined neighbor reading for non-volatile memory read operations including coupling compensation |
US7616498B2 (en) * | 2006-12-29 | 2009-11-10 | Sandisk Corporation | Non-volatile storage system with resistance sensing and compensation |
US7495962B2 (en) * | 2006-12-29 | 2009-02-24 | Sandisk Corporation | Alternating read mode |
US7590002B2 (en) * | 2006-12-29 | 2009-09-15 | Sandisk Corporation | Resistance sensing and compensation for non-volatile storage |
US7535764B2 (en) * | 2007-03-21 | 2009-05-19 | Sandisk Corporation | Adjusting resistance of non-volatile memory using dummy memory cells |
US7848144B2 (en) * | 2008-06-16 | 2010-12-07 | Sandisk Corporation | Reverse order page writing in flash memories |
CN104091615B (zh) * | 2014-07-23 | 2018-04-27 | 上海华虹宏力半导体制造有限公司 | 电荷泵系统及存储器 |
KR20220046065A (ko) * | 2020-10-06 | 2022-04-14 | 삼성전자주식회사 | 레귤레이터 회로, 레귤레이터 회로를 포함하는 전자 장치, 및 레귤레이터 회로를 포함하는 프로세서 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5222040A (en) * | 1990-12-11 | 1993-06-22 | Nexcom Technology, Inc. | Single transistor eeprom memory cell |
US5253202A (en) * | 1991-02-05 | 1993-10-12 | International Business Machines Corporation | Word line driver circuit for dynamic random access memories |
US5291446A (en) * | 1992-10-22 | 1994-03-01 | Advanced Micro Devices, Inc. | VPP power supply having a regulator circuit for controlling a regulated positive potential |
US5511026A (en) * | 1993-12-01 | 1996-04-23 | Advanced Micro Devices, Inc. | Boosted and regulated gate power supply with reference tracking for multi-density and low voltage supply memories |
US5497119A (en) * | 1994-06-01 | 1996-03-05 | Intel Corporation | High precision voltage regulation circuit for programming multilevel flash memory |
US5994948A (en) * | 1997-08-27 | 1999-11-30 | Sgs-Thomson Microelectronics S.R.L. | CMOS twin-tub negative voltage switching architecture |
US6002630A (en) * | 1997-11-21 | 1999-12-14 | Macronix International Co., Ltd. | On chip voltage generation for low power integrated circuits |
-
1999
- 1999-01-19 IT IT1999MI000080A patent/IT1306963B1/it active
-
2000
- 2000-01-19 US US09/491,475 patent/US6259632B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6259632B1 (en) | 2001-07-10 |
ITMI990080A1 (it) | 2000-07-19 |
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