AU2001253141A1 - Page mode erase in a flash memory array - Google Patents

Page mode erase in a flash memory array

Info

Publication number
AU2001253141A1
AU2001253141A1 AU2001253141A AU5314101A AU2001253141A1 AU 2001253141 A1 AU2001253141 A1 AU 2001253141A1 AU 2001253141 A AU2001253141 A AU 2001253141A AU 5314101 A AU5314101 A AU 5314101A AU 2001253141 A1 AU2001253141 A1 AU 2001253141A1
Authority
AU
Australia
Prior art keywords
flash memory
memory array
page mode
mode erase
erase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001253141A
Inventor
Anil Gupta
Steve Schumann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Atmel Corp
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of AU2001253141A1 publication Critical patent/AU2001253141A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
AU2001253141A 2000-04-04 2001-04-03 Page mode erase in a flash memory array Abandoned AU2001253141A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/542,434 US6359810B1 (en) 1998-03-13 2000-04-04 Page mode erase in a flash memory array
US09542434 2000-04-04
PCT/US2001/010948 WO2001075899A2 (en) 2000-04-04 2001-04-03 Page mode erase in a flash memory array

Publications (1)

Publication Number Publication Date
AU2001253141A1 true AU2001253141A1 (en) 2001-10-15

Family

ID=24163815

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001253141A Abandoned AU2001253141A1 (en) 2000-04-04 2001-04-03 Page mode erase in a flash memory array

Country Status (10)

Country Link
US (1) US6359810B1 (en)
EP (1) EP1269478A2 (en)
JP (1) JP2003529886A (en)
KR (1) KR20030014383A (en)
CN (1) CN1432181A (en)
AU (1) AU2001253141A1 (en)
CA (1) CA2408402A1 (en)
NO (1) NO20024781L (en)
RU (1) RU2002129292A (en)
WO (1) WO2001075899A2 (en)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITMI20022240A1 (en) * 2002-10-22 2004-04-23 Atmel Corp FLASH MEMORY ARCHITECTURE WITH MODE CANCELLATION
KR100705221B1 (en) 2004-09-03 2007-04-06 에스티마이크로일렉트로닉스 엔.브이. Flash memory device and method of erasing the flash memory cell using the same
US7257033B2 (en) * 2005-03-17 2007-08-14 Impinj, Inc. Inverter non-volatile memory cell and array system
US7679957B2 (en) 2005-03-31 2010-03-16 Virage Logic Corporation Redundant non-volatile memory cell
KR100749736B1 (en) * 2005-06-13 2007-08-16 삼성전자주식회사 Flash memory device and erase method thereof
KR100739256B1 (en) * 2006-05-12 2007-07-12 주식회사 하이닉스반도체 Flash memory device with a function for changing selectively size of memory cell block in erase operation and erase operation method of the same
JP2007317247A (en) * 2006-05-23 2007-12-06 Nec Electronics Corp Nonvolatile semiconductor memory device and operating method of nonvolatile semiconductor memory device
US7593259B2 (en) 2006-09-13 2009-09-22 Mosaid Technologies Incorporated Flash multi-level threshold distribution scheme
US7646636B2 (en) 2007-02-16 2010-01-12 Mosaid Technologies Incorporated Non-volatile memory with dynamic multi-mode operation
US7577059B2 (en) * 2007-02-27 2009-08-18 Mosaid Technologies Incorporated Decoding control with address transition detection in page erase function
US7804718B2 (en) * 2007-03-07 2010-09-28 Mosaid Technologies Incorporated Partial block erase architecture for flash memory
US7719896B1 (en) 2007-04-24 2010-05-18 Virage Logic Corporation Configurable single bit/dual bits memory
US7577029B2 (en) * 2007-05-04 2009-08-18 Mosaid Technologies Incorporated Multi-level cell access buffer with dual function
JP4712769B2 (en) * 2007-07-09 2011-06-29 ルネサスエレクトロニクス株式会社 Nonvolatile semiconductor memory device
US7826262B2 (en) * 2008-01-10 2010-11-02 Macronix International Co., Ltd Operation method of nitride-based flash memory and method of reducing coupling interference
KR101468098B1 (en) * 2008-06-23 2014-12-04 삼성전자주식회사 Flash memory device and memory system including the same
US9588883B2 (en) 2011-09-23 2017-03-07 Conversant Intellectual Property Management Inc. Flash memory system
CN105575427B (en) * 2014-10-11 2020-02-04 北京兆易创新科技股份有限公司 Erasing method of nonvolatile memory
CN105575430B (en) * 2014-10-11 2020-02-07 北京兆易创新科技股份有限公司 Erasing method of nonvolatile memory
CN105489244A (en) * 2014-10-11 2016-04-13 北京兆易创新科技股份有限公司 Erasing method of nonvolatile storage

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5099297A (en) 1988-02-05 1992-03-24 Emanuel Hazani EEPROM cell structure and architecture with programming and erase terminals shared between several cells
US5384742A (en) * 1990-09-25 1995-01-24 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory
US5270980A (en) 1991-10-28 1993-12-14 Eastman Kodak Company Sector erasable flash EEPROM
JP3376594B2 (en) * 1991-11-20 2003-02-10 日本電気株式会社 Row decoder
JP3152762B2 (en) * 1992-10-06 2001-04-03 富士通株式会社 Nonvolatile semiconductor memory device
JP2541087B2 (en) 1992-10-30 1996-10-09 日本電気株式会社 Data erasing method for nonvolatile semiconductor memory device
JP3199882B2 (en) * 1993-01-13 2001-08-20 株式会社東芝 Nonvolatile semiconductor memory device
US5365484A (en) 1993-08-23 1994-11-15 Advanced Micro Devices, Inc. Independent array grounds for flash EEPROM array with paged erase architechture
US5416738A (en) * 1994-05-27 1995-05-16 Alliance Semiconductor Corporation Single transistor flash EPROM cell and method of operation
JP3544743B2 (en) * 1995-04-17 2004-07-21 株式会社東芝 Semiconductor storage device
US5673224A (en) * 1996-02-23 1997-09-30 Micron Quantum Devices, Inc. Segmented non-volatile memory array with multiple sources with improved word line control circuitry
US6118705A (en) * 1998-03-13 2000-09-12 Atmel Corporation Page mode erase in a flash memory array

Also Published As

Publication number Publication date
RU2002129292A (en) 2004-03-10
NO20024781D0 (en) 2002-10-03
WO2001075899A3 (en) 2002-02-21
CN1432181A (en) 2003-07-23
WO2001075899A2 (en) 2001-10-11
KR20030014383A (en) 2003-02-17
US6359810B1 (en) 2002-03-19
CA2408402A1 (en) 2001-10-11
NO20024781L (en) 2002-11-29
JP2003529886A (en) 2003-10-07
EP1269478A2 (en) 2003-01-02

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