AU2002214585A1 - Self-aligned non-volatile memory cell - Google Patents

Self-aligned non-volatile memory cell

Info

Publication number
AU2002214585A1
AU2002214585A1 AU2002214585A AU1458502A AU2002214585A1 AU 2002214585 A1 AU2002214585 A1 AU 2002214585A1 AU 2002214585 A AU2002214585 A AU 2002214585A AU 1458502 A AU1458502 A AU 1458502A AU 2002214585 A1 AU2002214585 A1 AU 2002214585A1
Authority
AU
Australia
Prior art keywords
self
memory cell
volatile memory
aligned non
aligned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002214585A
Inventor
Bohumil Lojek
Alan L. Renninger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Atmel Corp
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of AU2002214585A1 publication Critical patent/AU2002214585A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H01L29/42328—Gate electrodes for transistors with a floating gate with at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
AU2002214585A 2000-11-30 2001-10-15 Self-aligned non-volatile memory cell Abandoned AU2002214585A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/727,571 US6479351B1 (en) 2000-11-30 2000-11-30 Method of fabricating a self-aligned non-volatile memory cell
US09/727,571 2000-11-30
PCT/US2001/032157 WO2002045176A1 (en) 2000-11-30 2001-10-15 Self-aligned non-volatile memory cell

Publications (1)

Publication Number Publication Date
AU2002214585A1 true AU2002214585A1 (en) 2002-06-11

Family

ID=24923175

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002214585A Abandoned AU2002214585A1 (en) 2000-11-30 2001-10-15 Self-aligned non-volatile memory cell

Country Status (11)

Country Link
US (3) US6479351B1 (en)
EP (1) EP1340264A1 (en)
JP (1) JP2004519094A (en)
KR (1) KR20030057560A (en)
CN (1) CN1220274C (en)
AU (1) AU2002214585A1 (en)
CA (1) CA2427232A1 (en)
HK (1) HK1059683A1 (en)
NO (1) NO20032188L (en)
TW (1) TW515051B (en)
WO (1) WO2002045176A1 (en)

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US6624029B2 (en) * 2000-11-30 2003-09-23 Atmel Corporation Method of fabricating a self-aligned non-volatile memory cell
DE10209784A1 (en) * 2001-09-01 2003-12-04 Univ Stuttgart Inst Fuer Chemi Oligomers and polymers containing sulfinate groups and process for their preparation
US6831325B2 (en) * 2002-12-20 2004-12-14 Atmel Corporation Multi-level memory cell with lateral floating spacers
US6767791B1 (en) * 2003-02-10 2004-07-27 Advanced Micro Devices, Inc. Structure and method for suppressing oxide encroachment in a floating gate memory cell
US6919242B2 (en) * 2003-04-25 2005-07-19 Atmel Corporation Mirror image memory cell transistor pairs featuring poly floating spacers
US6998670B2 (en) * 2003-04-25 2006-02-14 Atmel Corporation Twin EEPROM memory transistors with subsurface stepped floating gates
US6888192B2 (en) * 2003-04-25 2005-05-03 Atmel Corporation Mirror image non-volatile memory cell transistor pairs with single poly layer
US6822285B1 (en) 2003-07-31 2004-11-23 Atmel Corporation EEPROM with multi-member floating gate
US20050239250A1 (en) * 2003-08-11 2005-10-27 Bohumil Lojek Ultra dense non-volatile memory array
JP4521597B2 (en) * 2004-02-10 2010-08-11 ルネサスエレクトロニクス株式会社 Semiconductor memory device and manufacturing method thereof
US7098106B2 (en) * 2004-07-01 2006-08-29 Atmel Corporation Method of making mirror image memory cell transistor pairs featuring poly floating spacers
US20060046402A1 (en) * 2004-08-31 2006-03-02 Micron Technology, Inc. Flash cell structures and methods of formation
US8099783B2 (en) * 2005-05-06 2012-01-17 Atmel Corporation Security method for data protection
US20080119022A1 (en) * 2006-11-22 2008-05-22 Atmel Corporation Method of making eeprom transistors
KR101334844B1 (en) * 2011-12-29 2013-12-05 주식회사 동부하이텍 Single poly eeprom and method for fabricating the same
CN104465353B (en) * 2014-11-28 2018-01-26 上海华力微电子有限公司 The preparation method of ono dielectric layer

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US4833096A (en) 1988-01-19 1989-05-23 Atmel Corporation EEPROM fabrication process
US5021848A (en) 1990-03-13 1991-06-04 Chiu Te Long Electrically-erasable and electrically-programmable memory storage devices with self aligned tunnel dielectric area and the method of fabricating thereof
US5087584A (en) * 1990-04-30 1992-02-11 Intel Corporation Process for fabricating a contactless floating gate memory array utilizing wordline trench vias
US5108939A (en) * 1990-10-16 1992-04-28 National Semiconductor Corp. Method of making a non-volatile memory cell utilizing polycrystalline silicon spacer tunnel region
US5338952A (en) * 1991-06-07 1994-08-16 Sharp Kabushiki Kaisha Non-volatile memory
US5268585A (en) * 1991-07-01 1993-12-07 Sharp Kabushiki Kaisha Non-volatile memory and method of manufacturing the same
US5618742A (en) 1992-01-22 1997-04-08 Macronix Internatioal, Ltd. Method of making flash EPROM with conductive sidewall spacer contacting floating gate
US5544103A (en) * 1992-03-03 1996-08-06 Xicor, Inc. Compact page-erasable eeprom non-volatile memory
US5477068A (en) 1992-03-18 1995-12-19 Rohm Co., Ltd. Nonvolatile semiconductor memory device
JP3317459B2 (en) * 1993-04-30 2002-08-26 ローム株式会社 Nonvolatile storage element, nonvolatile storage device using the same, method of driving this storage device, and method of manufacturing this storage element
US5640031A (en) 1993-09-30 1997-06-17 Keshtbod; Parviz Spacer flash cell process
US5479368A (en) 1993-09-30 1995-12-26 Cirrus Logic, Inc. Spacer flash cell device with vertically oriented floating gate
GB2292008A (en) * 1994-07-28 1996-02-07 Hyundai Electronics Ind A split gate type flash eeprom cell
US5543339A (en) * 1994-08-29 1996-08-06 Motorola, Inc. Process for forming an electrically programmable read-only memory cell
JP3403877B2 (en) 1995-10-25 2003-05-06 三菱電機株式会社 Semiconductor memory device and manufacturing method thereof
KR100192546B1 (en) * 1996-04-12 1999-06-15 구본준 Flash memory and fabrication method thereof
US5703388A (en) * 1996-07-19 1997-12-30 Mosel Vitelic Inc. Double-poly monos flash EEPROM cell
US5793079A (en) * 1996-07-22 1998-08-11 Catalyst Semiconductor, Inc. Single transistor non-volatile electrically alterable semiconductor memory device
DE19638969C2 (en) 1996-09-23 2002-05-16 Mosel Vitelic Inc EEPROM with a polydistance floating gate and process for its production
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US6392267B1 (en) * 1997-04-25 2002-05-21 Alliance Semiconductor Corporation Flash EPROM array with self-aligned source contacts and programmable sector erase architecture
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US5972752A (en) 1997-12-29 1999-10-26 United Semiconductor Corp. Method of manufacturing a flash memory cell having a tunnel oxide with a long narrow top profile
US6091101A (en) * 1998-03-30 2000-07-18 Worldwide Semiconductor Manufacturing Corporation Multi-level flash memory using triple well
US6043530A (en) 1998-04-15 2000-03-28 Chang; Ming-Bing Flash EEPROM device employing polysilicon sidewall spacer as an erase gate
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US5879992A (en) * 1998-07-15 1999-03-09 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabricating step poly to improve program speed in split gate flash
US6074914A (en) 1998-10-30 2000-06-13 Halo Lsi Design & Device Technology, Inc. Integration method for sidewall split gate flash transistor
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US20020000605A1 (en) * 2000-06-28 2002-01-03 Chun-Mai Liu Method of fabricating high-coupling ratio split gate flash memory cell array

Also Published As

Publication number Publication date
HK1059683A1 (en) 2004-07-09
NO20032188D0 (en) 2003-05-14
NO20032188L (en) 2003-07-17
KR20030057560A (en) 2003-07-04
WO2002045176B1 (en) 2002-08-22
CN1220274C (en) 2005-09-21
USRE40486E1 (en) 2008-09-09
US6479351B1 (en) 2002-11-12
US20020063278A1 (en) 2002-05-30
WO2002045176A1 (en) 2002-06-06
CN1478303A (en) 2004-02-25
EP1340264A1 (en) 2003-09-03
US6841823B2 (en) 2005-01-11
CA2427232A1 (en) 2002-06-06
JP2004519094A (en) 2004-06-24
TW515051B (en) 2002-12-21

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