AU2001257485A1 - Uniform bitline strapping of a non-volatile memory cell - Google Patents

Uniform bitline strapping of a non-volatile memory cell

Info

Publication number
AU2001257485A1
AU2001257485A1 AU2001257485A AU5748501A AU2001257485A1 AU 2001257485 A1 AU2001257485 A1 AU 2001257485A1 AU 2001257485 A AU2001257485 A AU 2001257485A AU 5748501 A AU5748501 A AU 5748501A AU 2001257485 A1 AU2001257485 A1 AU 2001257485A1
Authority
AU
Australia
Prior art keywords
uniform
memory cell
volatile memory
bitline
strapping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001257485A
Inventor
Pau-Ling Chen
Richard M. Fastow
Shane Charles Hollmer
Mark W. Randolph
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of AU2001257485A1 publication Critical patent/AU2001257485A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
AU2001257485A 2000-05-16 2001-05-01 Uniform bitline strapping of a non-volatile memory cell Abandoned AU2001257485A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US20462100P 2000-05-16 2000-05-16
US60204621 2000-05-16
US09721035 2000-11-22
US09/721,035 US6275414B1 (en) 2000-05-16 2000-11-22 Uniform bitline strapping of a non-volatile memory cell
PCT/US2001/014122 WO2001088985A2 (en) 2000-05-16 2001-05-01 Uniform bitline strapping of a non-volatile memory cell

Publications (1)

Publication Number Publication Date
AU2001257485A1 true AU2001257485A1 (en) 2001-11-26

Family

ID=26899634

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001257485A Abandoned AU2001257485A1 (en) 2000-05-16 2001-05-01 Uniform bitline strapping of a non-volatile memory cell

Country Status (9)

Country Link
US (1) US6275414B1 (en)
EP (1) EP1282915B1 (en)
JP (1) JP5016769B2 (en)
KR (1) KR100771679B1 (en)
CN (1) CN100447986C (en)
AU (1) AU2001257485A1 (en)
BR (1) BR0110812A (en)
TW (1) TW512351B (en)
WO (1) WO2001088985A2 (en)

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US6538270B1 (en) * 2000-05-16 2003-03-25 Advanced Micro Devices, Inc. Staggered bitline strapping of a non-volatile memory cell
US6828199B2 (en) * 2001-12-20 2004-12-07 Advanced Micro Devices, Ltd. Monos device having buried metal silicide bit line
US6642148B1 (en) 2002-04-19 2003-11-04 Advanced Micro Devices, Inc. RELACS shrink method applied for single print resist mask for LDD or buried bitline implants using chemically amplified DUV type photoresist
US6853587B2 (en) * 2002-06-21 2005-02-08 Micron Technology, Inc. Vertical NROM having a storage density of 1 bit per 1F2
EP1530803A2 (en) * 2002-06-21 2005-05-18 Micron Technology, Inc. Nrom memory cell, memory array, related devices an methods
US7750389B2 (en) * 2003-12-16 2010-07-06 Micron Technology, Inc. NROM memory cell, memory array, related devices and methods
US6917544B2 (en) * 2002-07-10 2005-07-12 Saifun Semiconductors Ltd. Multiple use memory chip
US7136304B2 (en) 2002-10-29 2006-11-14 Saifun Semiconductor Ltd Method, system and circuit for programming a non-volatile memory array
US7178004B2 (en) 2003-01-31 2007-02-13 Yan Polansky Memory array programming circuit and a method for using the circuit
US6794764B1 (en) * 2003-03-05 2004-09-21 Advanced Micro Devices, Inc. Charge-trapping memory arrays resistant to damage from contact hole information
US7095075B2 (en) * 2003-07-01 2006-08-22 Micron Technology, Inc. Apparatus and method for split transistor memory having improved endurance
US6979857B2 (en) 2003-07-01 2005-12-27 Micron Technology, Inc. Apparatus and method for split gate NROM memory
US6873550B2 (en) * 2003-08-07 2005-03-29 Micron Technology, Inc. Method for programming and erasing an NROM cell
US7085170B2 (en) 2003-08-07 2006-08-01 Micron Technology, Ind. Method for erasing an NROM cell
US6977412B2 (en) 2003-09-05 2005-12-20 Micron Technology, Inc. Trench corner effect bidirectional flash memory cell
US6830963B1 (en) 2003-10-09 2004-12-14 Micron Technology, Inc. Fully depleted silicon-on-insulator CMOS logic
US7184315B2 (en) * 2003-11-04 2007-02-27 Micron Technology, Inc. NROM flash memory with self-aligned structural charge separation
US7202523B2 (en) * 2003-11-17 2007-04-10 Micron Technology, Inc. NROM flash memory devices on ultrathin silicon
US7050330B2 (en) * 2003-12-16 2006-05-23 Micron Technology, Inc. Multi-state NROM device
US7241654B2 (en) * 2003-12-17 2007-07-10 Micron Technology, Inc. Vertical NROM NAND flash memory array
US7157769B2 (en) * 2003-12-18 2007-01-02 Micron Technology, Inc. Flash memory having a high-permittivity tunnel dielectric
US6958272B2 (en) * 2004-01-12 2005-10-25 Advanced Micro Devices, Inc. Pocket implant for complementary bit disturb improvement and charging improvement of SONOS memory cell
US6878991B1 (en) * 2004-01-30 2005-04-12 Micron Technology, Inc. Vertical device 4F2 EEPROM memory
KR100645040B1 (en) * 2004-02-09 2006-11-10 삼성전자주식회사 Cell array of flash memory device having source strappings
US7221018B2 (en) * 2004-02-10 2007-05-22 Micron Technology, Inc. NROM flash memory with a high-permittivity gate dielectric
US6952366B2 (en) * 2004-02-10 2005-10-04 Micron Technology, Inc. NROM flash memory cell with integrated DRAM
US7075146B2 (en) * 2004-02-24 2006-07-11 Micron Technology, Inc. 4F2 EEPROM NROM memory arrays with vertical devices
US7072217B2 (en) * 2004-02-24 2006-07-04 Micron Technology, Inc. Multi-state memory cell with asymmetric charge trapping
US7102191B2 (en) * 2004-03-24 2006-09-05 Micron Technologies, Inc. Memory device with high dielectric constant gate dielectrics and metal floating gates
US7274068B2 (en) * 2004-05-06 2007-09-25 Micron Technology, Inc. Ballistic direct injection NROM cell on strained silicon structures
KR100604875B1 (en) 2004-06-29 2006-07-31 삼성전자주식회사 Non-volatile semiconductor memory device having strap region and fabricating method thereof
US7638850B2 (en) 2004-10-14 2009-12-29 Saifun Semiconductors Ltd. Non-volatile memory structure and method of fabrication
US8053812B2 (en) 2005-03-17 2011-11-08 Spansion Israel Ltd Contact in planar NROM technology
US20060281255A1 (en) * 2005-06-14 2006-12-14 Chun-Jen Chiu Method for forming a sealed storage non-volative multiple-bit memory cell
US7804126B2 (en) 2005-07-18 2010-09-28 Saifun Semiconductors Ltd. Dense non-volatile memory array and method of fabrication
US7668017B2 (en) 2005-08-17 2010-02-23 Saifun Semiconductors Ltd. Method of erasing non-volatile memory cells
US7808818B2 (en) 2006-01-12 2010-10-05 Saifun Semiconductors Ltd. Secondary injection for NROM
US7760554B2 (en) 2006-02-21 2010-07-20 Saifun Semiconductors Ltd. NROM non-volatile memory and mode of operation
US7692961B2 (en) 2006-02-21 2010-04-06 Saifun Semiconductors Ltd. Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection
US8253452B2 (en) 2006-02-21 2012-08-28 Spansion Israel Ltd Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same
US7701779B2 (en) 2006-04-27 2010-04-20 Sajfun Semiconductors Ltd. Method for programming a reference cell
US7652923B2 (en) * 2007-02-02 2010-01-26 Macronix International Co., Ltd. Semiconductor device and memory and method of operating thereof
US8415721B2 (en) * 2011-05-23 2013-04-09 Flashsilicon Incorporation Field side sub-bitline nor flash array and method of fabricating the same
KR20160001152A (en) 2014-06-26 2016-01-06 삼성전자주식회사 Nonvolatile memory device

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4698900A (en) * 1986-03-27 1987-10-13 Texas Instruments Incorporated Method of making a non-volatile memory having dielectric filled trenches
US5168334A (en) * 1987-07-31 1992-12-01 Texas Instruments, Incorporated Non-volatile semiconductor memory
US5319593A (en) * 1992-12-21 1994-06-07 National Semiconductor Corp. Memory array with field oxide islands eliminated and method
JP3584494B2 (en) * 1994-07-25 2004-11-04 ソニー株式会社 Semiconductor nonvolatile storage device
US5635415A (en) * 1994-11-30 1997-06-03 United Microelectronics Corporation Method of manufacturing buried bit line flash EEPROM memory cell
DE69636178T2 (en) * 1995-08-11 2007-03-29 Interuniversitair Microelektronica Centrum Vzw Method for erasing a Flash EEPROM memory cell
JP3075211B2 (en) * 1996-07-30 2000-08-14 日本電気株式会社 Semiconductor device and manufacturing method thereof
JP3225916B2 (en) 1998-03-16 2001-11-05 日本電気株式会社 Nonvolatile semiconductor memory device and method of manufacturing the same
US6215148B1 (en) * 1998-05-20 2001-04-10 Saifun Semiconductors Ltd. NROM cell with improved programming, erasing and cycling
US6107133A (en) * 1998-05-28 2000-08-22 International Business Machines Corporation Method for making a five square vertical DRAM cell

Also Published As

Publication number Publication date
US6275414B1 (en) 2001-08-14
CN100447986C (en) 2008-12-31
JP5016769B2 (en) 2012-09-05
TW512351B (en) 2002-12-01
CN1429406A (en) 2003-07-09
WO2001088985A3 (en) 2002-05-23
EP1282915B1 (en) 2014-11-05
KR20020097284A (en) 2002-12-31
WO2001088985A2 (en) 2001-11-22
BR0110812A (en) 2003-02-11
JP2003533884A (en) 2003-11-11
EP1282915A2 (en) 2003-02-12
KR100771679B1 (en) 2007-11-01

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