IT1282617B1 - Metodo e dispositivo per l'eliminazione dell'errore di centraggio nella fase di test elettrico di circuiti stampati - Google Patents

Metodo e dispositivo per l'eliminazione dell'errore di centraggio nella fase di test elettrico di circuiti stampati

Info

Publication number
IT1282617B1
IT1282617B1 IT96MI000273A ITMI960273A IT1282617B1 IT 1282617 B1 IT1282617 B1 IT 1282617B1 IT 96MI000273 A IT96MI000273 A IT 96MI000273A IT MI960273 A ITMI960273 A IT MI960273A IT 1282617 B1 IT1282617 B1 IT 1282617B1
Authority
IT
Italy
Prior art keywords
elimination
printed circuits
electrical test
test phase
centering error
Prior art date
Application number
IT96MI000273A
Other languages
English (en)
Inventor
Gianpaolo Antonello
Graziano Bagioni
Original Assignee
Circuit Line Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Circuit Line Spa filed Critical Circuit Line Spa
Priority to IT96MI000273A priority Critical patent/IT1282617B1/it
Publication of ITMI960273A0 publication Critical patent/ITMI960273A0/it
Priority to PCT/EP1997/000354 priority patent/WO1997030358A1/en
Priority to AU15456/97A priority patent/AU1545697A/en
Publication of ITMI960273A1 publication Critical patent/ITMI960273A1/it
Application granted granted Critical
Publication of IT1282617B1 publication Critical patent/IT1282617B1/it

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Containers And Packaging Bodies Having A Special Means To Remove Contents (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
IT96MI000273A 1996-02-13 1996-02-13 Metodo e dispositivo per l'eliminazione dell'errore di centraggio nella fase di test elettrico di circuiti stampati IT1282617B1 (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT96MI000273A IT1282617B1 (it) 1996-02-13 1996-02-13 Metodo e dispositivo per l'eliminazione dell'errore di centraggio nella fase di test elettrico di circuiti stampati
PCT/EP1997/000354 WO1997030358A1 (en) 1996-02-13 1997-01-27 Method and device for eliminating the centring error during electrical testing of printed circuit boards
AU15456/97A AU1545697A (en) 1996-02-13 1997-01-27 Method and device for eliminating the centring error during electrical testing of printed circuit boards

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT96MI000273A IT1282617B1 (it) 1996-02-13 1996-02-13 Metodo e dispositivo per l'eliminazione dell'errore di centraggio nella fase di test elettrico di circuiti stampati

Publications (3)

Publication Number Publication Date
ITMI960273A0 ITMI960273A0 (it) 1996-02-13
ITMI960273A1 ITMI960273A1 (it) 1997-08-13
IT1282617B1 true IT1282617B1 (it) 1998-03-31

Family

ID=11373257

Family Applications (1)

Application Number Title Priority Date Filing Date
IT96MI000273A IT1282617B1 (it) 1996-02-13 1996-02-13 Metodo e dispositivo per l'eliminazione dell'errore di centraggio nella fase di test elettrico di circuiti stampati

Country Status (3)

Country Link
AU (1) AU1545697A (it)
IT (1) IT1282617B1 (it)
WO (1) WO1997030358A1 (it)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19961791C2 (de) * 1999-12-21 2002-11-28 Infineon Technologies Ag Anordnung zum Testen von Chips mittels einer gedruckten Schaltungsplatte
CN102435798B (zh) * 2011-10-14 2015-05-20 日月光半导体制造股份有限公司 探针卡与测试方法
TWI490502B (zh) * 2011-11-25 2015-07-01 Chipmos Technologies Inc 探針卡

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4208675A (en) * 1978-03-20 1980-06-17 Agence Nationale De Valorization De La Recherche (Anvar) Method and apparatus for positioning an object
FR2505127A1 (fr) * 1981-04-30 1982-11-05 Moskovic Jacques Procede de reperage de trous de centrage dans la fabrication des circuits imprimes et machine mettant en oeuvre ce procede
FR2583899B1 (fr) * 1985-06-25 1987-09-11 Primat Didier Procede et dispositif automatiques de correction de programmes d'usinage pour machines a commande numerique, en reference avec un plan de reference metrologique
DE4406538A1 (de) * 1994-02-28 1995-08-31 Mania Gmbh Leiterplatten-Prüfeinrichtung mit Prüfadapter und Verfahren zum Einstellen desselben
IT1272853B (it) * 1994-11-30 1997-06-30 Circuit Line Spa Metodo e apparecchiatura per il carico e lo scarico automatico di circuiti stampati su macchine per l'esecuzione del test elettrico

Also Published As

Publication number Publication date
ITMI960273A1 (it) 1997-08-13
WO1997030358A1 (en) 1997-08-21
ITMI960273A0 (it) 1996-02-13
AU1545697A (en) 1997-09-02

Similar Documents

Publication Publication Date Title
GB2278689B (en) Method and apparatus for testing integrated circuits
FI973081A0 (fi) Menetelmä vaihevirtojen mittaamiseksi vaihtosuuntaajassa
SG78283A1 (en) Method and apparatus for performing operative testing on an integrated circuit
EP0484141A3 (en) Method and apparatus for testing integrated circuits
DE69411438T2 (de) Schaltungsanordnungen und Verfahren zu deren Herstellung
DE69717219D1 (de) Arbeitseinheit, elektrophotographisches Bilderzeugungsgerät und Verfahren zum elekrtischen Anschluss der Arbeitseinheit
SG49963A1 (en) Method and apparatus for locating electrical circuit members
SG71845A1 (en) Method and apparatus for galvanically isolating two integrated circuits form each other
DE69717971D1 (de) Verfahren und schaltung zum testen von elektrischen antrieben
GB9812518D0 (en) Method and apparatus for testing frequency dependent electrical circuits
DE69717216D1 (de) Schaltplatinenprüfvorrichtung und Verfahren dafür
DE59108343D1 (de) Elektrische Schaltungsanordnung und Verfahren zu deren Herstellung
GB2328287B (en) Voltage testing apparatus and method
GB2318876B (en) Method for testing electronic circuits
GB9712051D0 (en) Method and apparatus for testing frequency-dependent electrical circuits
DE69223786D1 (de) Strommessanordnung zum Testen von integrierten Schaltungen
KR960008335A (ko) 반도체 집적회로의 정지시 전류측정법 및 그에 적합한 반도체 회로
DE69312263T2 (de) Testverfahren und -anordnung für integrierte Leistungsschaltungen
IT1282617B1 (it) Metodo e dispositivo per l'eliminazione dell'errore di centraggio nella fase di test elettrico di circuiti stampati
EP0472938A3 (en) Method and device for testing and repairing an integrated circuit
IT1291643B1 (it) Metodo di regolazione automatica per l'eliminazione dell'errore di centraggio in fase di test elettrico di circuiti stampati
EP0631145A3 (de) Verfahren und Vorrichtung zur Strommessung in Brückenschaltungen.
EP0715175A3 (en) Method and apparatus for testing an integrated circuit
GB9316273D0 (en) Method and apparatus for testing frquency-dependent electrical circuits
GB9417297D0 (en) Method and apparatus for testing an integrated circuit device

Legal Events

Date Code Title Description
0001 Granted