IT1251565B - Procedimento di verifica delle memorie di un microcalcolatore programmato, mediante un microprogramma incorporato nello stesso microcalcolatore. - Google Patents
Procedimento di verifica delle memorie di un microcalcolatore programmato, mediante un microprogramma incorporato nello stesso microcalcolatore.Info
- Publication number
- IT1251565B IT1251565B ITMI912385A ITMI912385A IT1251565B IT 1251565 B IT1251565 B IT 1251565B IT MI912385 A ITMI912385 A IT MI912385A IT MI912385 A ITMI912385 A IT MI912385A IT 1251565 B IT1251565 B IT 1251565B
- Authority
- IT
- Italy
- Prior art keywords
- microcalculator
- memories
- microprogram
- programmed
- procedure
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/20—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits using counters or linear-feedback shift registers [LFSR]
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/14—Implementation of control logic, e.g. test mode decoders
- G11C29/16—Implementation of control logic, e.g. test mode decoders using microprogrammed units, e.g. state machines
Landscapes
- Debugging And Monitoring (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Microcomputers (AREA)
- Executing Machine-Instructions (AREA)
- Read Only Memory (AREA)
Abstract
L'invenzione riguarda un procedimento di verifica, lettura o scrittura, di memorie (12-15) di un microcalcolatore programmato (10), comprendente sostanzialmente i passi di:selezionare un prescelto spazio logico di una memoria da verificare,attivare l'indirizzamento di microistruzioni di un adatto microprogramma relativo ad una prescelta procedura di verifica, per comandarne l'esecuzione mediante un prestabilito numero di colpi di clock,ripetere iterattivamente, secondo una sequenza incrementale, l'esecuzione delle suddette microistruzioni del microprogramma.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ITMI912385A IT1251565B (it) | 1991-09-10 | 1991-09-10 | Procedimento di verifica delle memorie di un microcalcolatore programmato, mediante un microprogramma incorporato nello stesso microcalcolatore. |
JP22385192A JP3184998B2 (ja) | 1991-09-10 | 1992-08-24 | マイクロコンピュータ自体に組込まれたマイクロプログラムによってプログラム化マイクロコンピュータのメモリをチェックするプロセス |
EP92202654A EP0532087B1 (en) | 1991-09-10 | 1992-09-02 | Process for checking the memories of a programmed micro-computer, by means of a micro-programme incorporated in the micro-computer itself |
DE69220740T DE69220740T2 (de) | 1991-09-10 | 1992-09-02 | Verfahren zum Prüfen von Speichern eines programmierten Mikrorechners mittels eines im besagten Mikrorechner eingebauten Mikroprogramms |
US07/943,186 US5467358A (en) | 1991-09-10 | 1992-09-10 | Process for checking the memories of a programmed microcomputer by means of a micro-program incorporated in the microcomputer itself |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ITMI912385A IT1251565B (it) | 1991-09-10 | 1991-09-10 | Procedimento di verifica delle memorie di un microcalcolatore programmato, mediante un microprogramma incorporato nello stesso microcalcolatore. |
Publications (3)
Publication Number | Publication Date |
---|---|
ITMI912385A0 ITMI912385A0 (it) | 1991-09-10 |
ITMI912385A1 ITMI912385A1 (it) | 1993-03-10 |
IT1251565B true IT1251565B (it) | 1995-05-17 |
Family
ID=11360634
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ITMI912385A IT1251565B (it) | 1991-09-10 | 1991-09-10 | Procedimento di verifica delle memorie di un microcalcolatore programmato, mediante un microprogramma incorporato nello stesso microcalcolatore. |
Country Status (5)
Country | Link |
---|---|
US (1) | US5467358A (it) |
EP (1) | EP0532087B1 (it) |
JP (1) | JP3184998B2 (it) |
DE (1) | DE69220740T2 (it) |
IT (1) | IT1251565B (it) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5883844A (en) * | 1997-05-23 | 1999-03-16 | Stmicroelectronics, Inc. | Method of stress testing integrated circuit having memory and integrated circuit having stress tester for memory thereof |
CA2345605A1 (en) * | 2001-04-30 | 2002-10-30 | Robert A. Abbott | Method of testing embedded memory array and embedded memory controller for use therewith |
US7367016B2 (en) * | 2003-07-14 | 2008-04-29 | Sun Microsystems, Inc. | Method and system for expressing the algorithms for the manipulation of hardware state using an abstract language |
US7389455B2 (en) * | 2005-05-16 | 2008-06-17 | Texas Instruments Incorporated | Register file initialization to prevent unknown outputs during test |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57176600A (en) * | 1981-04-23 | 1982-10-29 | Mitsubishi Electric Corp | One chip microcomputer |
JPS59119595A (ja) * | 1982-12-27 | 1984-07-10 | Hitachi Ltd | Ram内蔵論理lsi |
US4744049A (en) * | 1984-10-15 | 1988-05-10 | Motorola, Inc. | Microcode testing of a cache in a data processor |
US4878174A (en) * | 1987-11-03 | 1989-10-31 | Lsi Logic Corporation | Flexible ASIC microcomputer permitting the modular modification of dedicated functions and macroinstructions |
JPH0719215B2 (ja) * | 1989-06-01 | 1995-03-06 | 三菱電機株式会社 | マイクロプロセッサ |
US5153882A (en) * | 1990-03-29 | 1992-10-06 | National Semiconductor Corporation | Serial scan diagnostics apparatus and method for a memory device |
US5224101A (en) * | 1990-05-16 | 1993-06-29 | The United States Of America As Represented By The Secretary Of The Air Force | Micro-coded built-in self-test apparatus for a memory array |
US5130568A (en) * | 1990-11-05 | 1992-07-14 | Vertex Semiconductor Corporation | Scannable latch system and method |
-
1991
- 1991-09-10 IT ITMI912385A patent/IT1251565B/it active IP Right Grant
-
1992
- 1992-08-24 JP JP22385192A patent/JP3184998B2/ja not_active Expired - Fee Related
- 1992-09-02 DE DE69220740T patent/DE69220740T2/de not_active Expired - Fee Related
- 1992-09-02 EP EP92202654A patent/EP0532087B1/en not_active Expired - Lifetime
- 1992-09-10 US US07/943,186 patent/US5467358A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0532087B1 (en) | 1997-07-09 |
JPH05324383A (ja) | 1993-12-07 |
US5467358A (en) | 1995-11-14 |
DE69220740T2 (de) | 1998-01-02 |
DE69220740D1 (de) | 1997-08-14 |
ITMI912385A0 (it) | 1991-09-10 |
EP0532087A3 (en) | 1993-10-20 |
ITMI912385A1 (it) | 1993-03-10 |
JP3184998B2 (ja) | 2001-07-09 |
EP0532087A2 (en) | 1993-03-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
0001 | Granted | ||
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19970929 |