IT1245794B - VERY RELIABLE SEMICONDUCTOR DEVICE - Google Patents

VERY RELIABLE SEMICONDUCTOR DEVICE

Info

Publication number
IT1245794B
IT1245794B ITMI910091A ITMI910091A IT1245794B IT 1245794 B IT1245794 B IT 1245794B IT MI910091 A ITMI910091 A IT MI910091A IT MI910091 A ITMI910091 A IT MI910091A IT 1245794 B IT1245794 B IT 1245794B
Authority
IT
Italy
Prior art keywords
semiconductor device
junction
region
doping
reliable semiconductor
Prior art date
Application number
ITMI910091A
Other languages
Italian (it)
Inventor
Sin Yun-Seung
Kang Jun
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI910091A0 publication Critical patent/ITMI910091A0/en
Publication of ITMI910091A1 publication Critical patent/ITMI910091A1/en
Application granted granted Critical
Publication of IT1245794B publication Critical patent/IT1245794B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Un dispositivo semiconduttore molto affidabile comprende un substrato semiconduttore presentante un drogaggio di primo tipo, una regione con giunzione poco profonda presentante un drogaggio di secondo tipo, uno strato di cablaggio a bassa resistenza realizzato sul substrato semiconduttore ed una regione con giunzione profonda presentante un drogaggio di secondo tipo. La regione con giunzione profonda è realizzata sotto i contatti di "source" e di "drain" per proteggere adeguatamente il canale di un transistore contro una perforazione localizzata di giunzione (junction spiking), cosicché la caratteristica ESD (capacità di sopportare danni di origine elettrostatica) viene migliorata con una semplice modifica della struttura (layout) del dispositivo a semiconduttore.(fig. 3).A very reliable semiconductor device comprises a semiconductor substrate having a first type doping, a region with a shallow junction having a second type doping, a low resistance wiring layer made on the semiconductor substrate and a deep junction region having a doping of second type. The deep junction region is made under the "source" and "drain" contacts to adequately protect the channel of a transistor against a localized junction spiking (junction spiking), so that the ESD characteristic (ability to withstand electrostatic damage) ) is improved with a simple modification of the structure (layout) of the semiconductor device (fig. 3).

ITMI910091A 1990-09-05 1991-01-16 VERY RELIABLE SEMICONDUCTOR DEVICE IT1245794B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900014002A KR920007171A (en) 1990-09-05 1990-09-05 High Reliability Semiconductor Device

Publications (3)

Publication Number Publication Date
ITMI910091A0 ITMI910091A0 (en) 1991-01-16
ITMI910091A1 ITMI910091A1 (en) 1992-07-16
IT1245794B true IT1245794B (en) 1994-10-18

Family

ID=19303260

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI910091A IT1245794B (en) 1990-09-05 1991-01-16 VERY RELIABLE SEMICONDUCTOR DEVICE

Country Status (6)

Country Link
JP (1) JPH04234162A (en)
KR (1) KR920007171A (en)
DE (1) DE4101274A1 (en)
FR (1) FR2666454A1 (en)
GB (1) GB2247779A (en)
IT (1) IT1245794B (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3456242B2 (en) * 1993-01-07 2003-10-14 セイコーエプソン株式会社 Semiconductor device and manufacturing method thereof
DE69409274T2 (en) * 1993-01-12 1998-11-05 Sony Corp Output circuit for charge transfer element
KR0166101B1 (en) * 1993-10-21 1999-01-15 김주용 A transistor for esd protection circuit and its fabricating method
FR2713398B1 (en) * 1993-11-30 1996-01-19 Sgs Thomson Microelectronics Fuse for integrated circuit.
US5932917A (en) * 1996-04-19 1999-08-03 Nippon Steel Corporation Input protective circuit having a diffusion resistance layer
JPH1070266A (en) * 1996-08-26 1998-03-10 Nec Corp Semiconductor device and fabrication thereof
DE19840239A1 (en) * 1998-09-03 2000-03-09 Siemens Ag Electrostatic discharge damage protected power semiconductor device, especially IGBT, MOSFET or diode, comprising an ohmic contact metallization of high melting metal
DE102004012819B4 (en) 2004-03-16 2006-02-23 Infineon Technologies Ag Power semiconductor component with increased robustness

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1073560A (en) * 1964-12-28 1967-06-28 Gen Electric Improvements in semiconductor devices
DE1803392A1 (en) * 1968-10-16 1970-06-18 Siemens Ag Protection device for a field effect transistor
JPS57211272A (en) * 1981-06-23 1982-12-25 Toshiba Corp Semiconductor device
JPS5825264A (en) * 1981-08-07 1983-02-15 Hitachi Ltd Insulated gate type semiconductor device and manufacture thereof
CA1242532A (en) * 1984-05-03 1988-09-27 Chong M. Lin Input protection arrangement for vlsi intergrated circuit devices
US4734752A (en) * 1985-09-27 1988-03-29 Advanced Micro Devices, Inc. Electrostatic discharge protection device for CMOS integrated circuit outputs

Also Published As

Publication number Publication date
DE4101274A1 (en) 1992-03-19
GB9100619D0 (en) 1991-02-27
GB2247779A (en) 1992-03-11
ITMI910091A1 (en) 1992-07-16
ITMI910091A0 (en) 1991-01-16
JPH04234162A (en) 1992-08-21
FR2666454A1 (en) 1992-03-06
KR920007171A (en) 1992-04-28

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19971028