IT1215131B - Protezione dei circuiti integrati contro scariche elettrostatiche - Google Patents

Protezione dei circuiti integrati contro scariche elettrostatiche

Info

Publication number
IT1215131B
IT1215131B IT8683666A IT8366686A IT1215131B IT 1215131 B IT1215131 B IT 1215131B IT 8683666 A IT8683666 A IT 8683666A IT 8366686 A IT8366686 A IT 8366686A IT 1215131 B IT1215131 B IT 1215131B
Authority
IT
Italy
Prior art keywords
protection
integrated circuits
against electrostatic
electrostatic discharges
circuits against
Prior art date
Application number
IT8683666A
Other languages
English (en)
Other versions
IT8683666A0 (it
Inventor
Daniele Vincenzo
Benedetti Mirella
Original Assignee
Sgs Microelettronica Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=11323733&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=IT1215131(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Sgs Microelettronica Spa filed Critical Sgs Microelettronica Spa
Priority to IT8683666A priority Critical patent/IT1215131B/it
Publication of IT8683666A0 publication Critical patent/IT8683666A0/it
Priority to US07/113,113 priority patent/US4839768A/en
Priority to JP62305506A priority patent/JPS63151063A/ja
Priority to NL8702918A priority patent/NL8702918A/nl
Priority to DE3741014A priority patent/DE3741014C2/de
Application granted granted Critical
Publication of IT1215131B publication Critical patent/IT1215131B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0255Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/927Different doping levels in different parts of PN junction to produce shaped depletion layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Elimination Of Static Electricity (AREA)
  • Bipolar Transistors (AREA)
IT8683666A 1986-12-03 1986-12-03 Protezione dei circuiti integrati contro scariche elettrostatiche IT1215131B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT8683666A IT1215131B (it) 1986-12-03 1986-12-03 Protezione dei circuiti integrati contro scariche elettrostatiche
US07/113,113 US4839768A (en) 1986-12-03 1987-10-27 Protection of integrated circuits from electrostatic discharges
JP62305506A JPS63151063A (ja) 1986-12-03 1987-12-02 静電的放電からの集積回路の保護方法及び保護構造
NL8702918A NL8702918A (nl) 1986-12-03 1987-12-03 Beveiliging van geintegreerde schakelingen tegen elektrostatische ontladingen.
DE3741014A DE3741014C2 (de) 1986-12-03 1987-12-03 Schutz integrierter Schaltkreise vor elektrostatischen Entladungen

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8683666A IT1215131B (it) 1986-12-03 1986-12-03 Protezione dei circuiti integrati contro scariche elettrostatiche

Publications (2)

Publication Number Publication Date
IT8683666A0 IT8683666A0 (it) 1986-12-03
IT1215131B true IT1215131B (it) 1990-01-31

Family

ID=11323733

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8683666A IT1215131B (it) 1986-12-03 1986-12-03 Protezione dei circuiti integrati contro scariche elettrostatiche

Country Status (5)

Country Link
US (1) US4839768A (it)
JP (1) JPS63151063A (it)
DE (1) DE3741014C2 (it)
IT (1) IT1215131B (it)
NL (1) NL8702918A (it)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR900001398B1 (ko) * 1987-11-30 1990-03-09 삼성전자 주식회사 양방성 입출력 셀
US5189638A (en) * 1990-04-26 1993-02-23 Mitsubishi Denki Kabushiki Kaisha Portable semiconductor memory device
US5561373A (en) * 1990-10-09 1996-10-01 Fujitsu Limited Method and device for detecting electrostatic stress applied to a product semiconductor device during each production process
US5130882A (en) * 1991-04-12 1992-07-14 The United States Of America As Represented By The Secretary Of The Air Force Multilayer circuit board transient protection device
US5731940A (en) * 1995-06-23 1998-03-24 Analog Devices, Inc. ESD protection scheme
US5745323A (en) * 1995-06-30 1998-04-28 Analog Devices, Inc. Electrostatic discharge protection circuit for protecting CMOS transistors on integrated circuit processes
US5751525A (en) * 1996-01-05 1998-05-12 Analog Devices, Inc. EOS/ESD Protection circuit for an integrated circuit with operating/test voltages exceeding power supply rail voltages
JP3144308B2 (ja) 1996-08-01 2001-03-12 日本電気株式会社 半導体装置
US5917689A (en) * 1996-09-12 1999-06-29 Analog Devices, Inc. General purpose EOS/ESD protection circuit for bipolar-CMOS and CMOS integrated circuits
US5838146A (en) * 1996-11-12 1998-11-17 Analog Devices, Inc. Method and apparatus for providing ESD/EOS protection for IC power supply pins
TW200305272A (en) * 2002-03-29 2003-10-16 Sanyo Electric Co Semiconductor integrated circuit device
JP2004050637A (ja) * 2002-07-19 2004-02-19 Canon Inc インクジェットヘッド用基板、インクジェットヘッド及び該インクジェットヘッドを備えたインクジェット記録装置
US7333310B2 (en) * 2003-12-18 2008-02-19 Stmicroelectronics, Inc. ESD bonding pad
US7566914B2 (en) 2005-07-07 2009-07-28 Intersil Americas Inc. Devices with adjustable dual-polarity trigger- and holding-voltage/current for high level of electrostatic discharge protection in sub-micron mixed signal CMOS/BiCMOS integrated circuits
JP5728171B2 (ja) * 2009-06-29 2015-06-03 株式会社半導体エネルギー研究所 半導体装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58119670A (ja) * 1982-01-11 1983-07-16 Nissan Motor Co Ltd 半導体装置
US4745450A (en) * 1984-03-02 1988-05-17 Zilog, Inc. Integrated circuit high voltage protection
JPS60246665A (ja) * 1984-05-22 1985-12-06 Nec Corp 入力保護装置
US4736271A (en) * 1987-06-23 1988-04-05 Signetics Corporation Protection device utilizing one or more subsurface diodes and associated method of manufacture

Also Published As

Publication number Publication date
DE3741014A1 (de) 1988-06-16
NL8702918A (nl) 1988-07-01
JPS63151063A (ja) 1988-06-23
US4839768A (en) 1989-06-13
DE3741014C2 (de) 1997-07-17
IT8683666A0 (it) 1986-12-03

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961227