IT1179418B - Procedimento per la realizzazione di resistori integrati a film sottile con doppio strato resistivo, mediante erosione ionica - Google Patents

Procedimento per la realizzazione di resistori integrati a film sottile con doppio strato resistivo, mediante erosione ionica

Info

Publication number
IT1179418B
IT1179418B IT48600/84A IT4860084A IT1179418B IT 1179418 B IT1179418 B IT 1179418B IT 48600/84 A IT48600/84 A IT 48600/84A IT 4860084 A IT4860084 A IT 4860084A IT 1179418 B IT1179418 B IT 1179418B
Authority
IT
Italy
Prior art keywords
procedure
construction
thin film
resistive layer
film resistors
Prior art date
Application number
IT48600/84A
Other languages
English (en)
Other versions
IT8448600A0 (it
Inventor
Carlo Misiano
Enrico Simonetti
Original Assignee
Selenia Ind Elettroniche
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Selenia Ind Elettroniche filed Critical Selenia Ind Elettroniche
Priority to IT48600/84A priority Critical patent/IT1179418B/it
Publication of IT8448600A0 publication Critical patent/IT8448600A0/it
Priority to EP85830185A priority patent/EP0175654B1/en
Priority to DE8585830185T priority patent/DE3579987D1/de
Application granted granted Critical
Publication of IT1179418B publication Critical patent/IT1179418B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/702—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof
    • H01L21/707—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof of thin-film circuits or parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/003—Apparatus or processes specially adapted for manufacturing resistors using lithography, e.g. photolithography

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
IT48600/84A 1984-07-20 1984-07-20 Procedimento per la realizzazione di resistori integrati a film sottile con doppio strato resistivo, mediante erosione ionica IT1179418B (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT48600/84A IT1179418B (it) 1984-07-20 1984-07-20 Procedimento per la realizzazione di resistori integrati a film sottile con doppio strato resistivo, mediante erosione ionica
EP85830185A EP0175654B1 (en) 1984-07-20 1985-07-17 Procedure for the manufacturing of double layer resistive thin film integrated resistors through ion erosion
DE8585830185T DE3579987D1 (de) 1984-07-20 1985-07-17 Verfahren zum herstellen integrierter duennfilmwiderstaende aus einer widerstands-doppelschicht mittels ionenerosion.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT48600/84A IT1179418B (it) 1984-07-20 1984-07-20 Procedimento per la realizzazione di resistori integrati a film sottile con doppio strato resistivo, mediante erosione ionica

Publications (2)

Publication Number Publication Date
IT8448600A0 IT8448600A0 (it) 1984-07-20
IT1179418B true IT1179418B (it) 1987-09-16

Family

ID=11267560

Family Applications (1)

Application Number Title Priority Date Filing Date
IT48600/84A IT1179418B (it) 1984-07-20 1984-07-20 Procedimento per la realizzazione di resistori integrati a film sottile con doppio strato resistivo, mediante erosione ionica

Country Status (3)

Country Link
EP (1) EP0175654B1 (it)
DE (1) DE3579987D1 (it)
IT (1) IT1179418B (it)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4136198A1 (de) * 1991-11-02 1993-05-06 Deutsche Aerospace Ag, 8000 Muenchen, De Verfahren zur herstellung eines strukturierten duennfilm-widerstandsschichtsystems sowie schaltungsanordnung mit einem insbesondere nach diesem verfahren hergestellten duennfilm-widerstandsschichtsystem
WO1996004668A1 (en) * 1994-08-05 1996-02-15 Philips Electronics N.V. Electrically resistive structure
AU2003901730A0 (en) 2003-04-11 2003-05-01 Cochlear Limited Power management system
AU2003903532A0 (en) 2003-07-09 2003-07-24 Cochlear Limited Conductive elements
US8782884B2 (en) 2009-12-01 2014-07-22 Cochlear Limited Manufacturing an electrode assembly having contoured electrode contact surfaces
US8461042B2 (en) 2009-12-01 2013-06-11 Cochlear Limited Electrode contact contaminate removal
KR102228454B1 (ko) 2014-02-24 2021-03-16 삼성전자주식회사 보안 디버깅 회로를 갖는 디바이스 및 그것에 대한 디버깅 방법

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1074235B (it) * 1976-12-28 1985-04-17 Selenia Ind Elettroniche Procedimento per la realizzazione degli elementi conduttivi e resististivi in microcircuiti per microonde
JPS606546B2 (ja) * 1980-01-19 1985-02-19 富士通株式会社 ハイブリッドｉｃの製造方法
DE3200983A1 (de) * 1982-01-14 1983-07-21 Siemens AG, 1000 Berlin und 8000 München Elektrisches netzwerk
FR2532472B1 (fr) * 1982-08-31 1985-12-20 Lignes Telegraph Telephon Procede de fabrication de connexions electriques pour circuit hybride et circuit hybride comportant de telles connexions

Also Published As

Publication number Publication date
DE3579987D1 (de) 1990-11-08
EP0175654A2 (en) 1986-03-26
EP0175654A3 (en) 1987-08-26
EP0175654B1 (en) 1990-10-03
IT8448600A0 (it) 1984-07-20

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