DE3585928D1 - Multiplizierer mit doppelter genauigkeit. - Google Patents

Multiplizierer mit doppelter genauigkeit.

Info

Publication number
DE3585928D1
DE3585928D1 DE8585302908T DE3585928T DE3585928D1 DE 3585928 D1 DE3585928 D1 DE 3585928D1 DE 8585302908 T DE8585302908 T DE 8585302908T DE 3585928 T DE3585928 T DE 3585928T DE 3585928 D1 DE3585928 D1 DE 3585928D1
Authority
DE
Germany
Prior art keywords
multiplier
double accuracy
accuracy
double
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585302908T
Other languages
English (en)
Inventor
Ichiro C O Nec Corporat Kuroda
Takao C O Nec Corpor Nishitani
Hideo C O Nec Corporati Tanaka
Yuichi C O Nec Corpor Kawakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3585928D1 publication Critical patent/DE3585928D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G06F7/5324—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel partitioned, i.e. using repetitively a smaller parallel parallel multiplier or using an array of such smaller multipliers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3812—Devices capable of handling different types of numbers
    • G06F2207/382—Reconfigurable for different fixed word lengths

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
DE8585302908T 1984-04-26 1985-04-25 Multiplizierer mit doppelter genauigkeit. Expired - Lifetime DE3585928D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59084578A JPH061438B2 (ja) 1984-04-26 1984-04-26 倍精度乗算器

Publications (1)

Publication Number Publication Date
DE3585928D1 true DE3585928D1 (de) 1992-06-04

Family

ID=13834554

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585302908T Expired - Lifetime DE3585928D1 (de) 1984-04-26 1985-04-25 Multiplizierer mit doppelter genauigkeit.

Country Status (4)

Country Link
US (1) US4722068A (de)
EP (1) EP0161089B1 (de)
JP (1) JPH061438B2 (de)
DE (1) DE3585928D1 (de)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6115233A (ja) * 1984-06-30 1986-01-23 Sony Corp 乗算器
JPS6211933A (ja) * 1985-07-09 1987-01-20 Nec Corp 演算回路
JPS62256129A (ja) * 1986-04-30 1987-11-07 Sony Corp 演算処理装置
GB8808569D0 (en) * 1988-04-12 1988-05-11 Texas Instruments Ltd Improvements in/relating to digital signal processors
US4893268A (en) * 1988-04-15 1990-01-09 Motorola, Inc. Circuit and method for accumulating partial products of a single, double or mixed precision multiplication
US4901268A (en) * 1988-08-19 1990-02-13 General Electric Company Multiple function data processor
JP2583599B2 (ja) * 1989-02-14 1997-02-19 富士通株式会社 ２進整数乗算処理方法
US5031135A (en) * 1989-05-19 1991-07-09 Hitachi Micro Systems, Inc. Device for multi-precision and block arithmetic support in digital processors
US5625713A (en) * 1991-08-09 1997-04-29 Ricoh Corporation Apparatus and method for increasing the throughput of an acoustic or image compression system
US5136537A (en) * 1991-11-19 1992-08-04 Advanced Micro Devices, Inc. Method and apparatus for determining the product of two numbers
US5631859A (en) * 1994-10-27 1997-05-20 Hewlett-Packard Company Floating point arithmetic unit having logic for quad precision arithmetic
US5805475A (en) * 1995-02-10 1998-09-08 International Business Machines Corporation Load-store unit and method of loading and storing single-precision floating-point registers in a double-precision architecture
US5678016A (en) * 1995-08-08 1997-10-14 International Business Machines Corporation Processor and method for managing execution of an instruction which determine subsequent to dispatch if an instruction is subject to serialization
US5751622A (en) * 1995-10-10 1998-05-12 Chromatic Research, Inc. Structure and method for signed multiplication using large multiplier having two embedded signed multipliers
US5787025A (en) * 1996-02-28 1998-07-28 Atmel Corporation Method and system for performing arithmetic operations with single or double precision
DE19637369C2 (de) * 1996-09-13 2001-11-15 Micronas Gmbh Digitaler Signalprozessor mit Multipliziereinrichtung und -Verfahren
KR100222032B1 (ko) * 1996-12-24 1999-10-01 윤종용 디지탈 신호 처리기에서의 2배 정밀도 곱셈연산 수행방법
US6055619A (en) * 1997-02-07 2000-04-25 Cirrus Logic, Inc. Circuits, system, and methods for processing multiple data streams
US6259957B1 (en) 1997-04-04 2001-07-10 Cirrus Logic, Inc. Circuits and methods for implementing audio Codecs and systems using the same
US6233597B1 (en) 1997-07-09 2001-05-15 Matsushita Electric Industrial Co., Ltd. Computing apparatus for double-precision multiplication
US6347326B1 (en) * 1999-03-02 2002-02-12 Philips Electronics North America Corporation N bit by M bit multiplication of twos complement numbers using N/2+1 X M/2+1 bit multipliers
US6912557B1 (en) * 2000-06-09 2005-06-28 Cirrus Logic, Inc. Math coprocessor
US7124237B2 (en) * 2002-10-03 2006-10-17 Seagate Technology Llc Virtual machine emulation in the memory space of a programmable processor
FR2853425B1 (fr) 2003-04-07 2006-01-13 Atmel Corp Sequence de multiplication efficace pour operandes a grands nombres entiers plus larges que le materiel multiplicateur
US7650374B1 (en) * 2004-03-02 2010-01-19 Sun Microsystems, Inc. Hybrid multi-precision multiplication
JP2006154979A (ja) * 2004-11-25 2006-06-15 Sony Corp 浮動小数点数演算回路
US7672989B2 (en) * 2005-05-09 2010-03-02 Sandisk Il Ltd. Large number multiplication method and device
WO2008022307A2 (en) * 2006-08-18 2008-02-21 Conexant Systems, Inc. Systems and methods for implementing a double precision arithmetic memory architecture
US10037189B2 (en) 2016-09-20 2018-07-31 Altera Corporation Distributed double-precision floating-point multiplication
US11599334B2 (en) * 2020-06-09 2023-03-07 VeriSilicon Microelectronics Enhanced multiply accumulate device for neural networks
WO2023100372A1 (ja) * 2021-12-03 2023-06-08 日本電信電話株式会社 データ処理装置、データ処理方法、及びデータ処理プログラム

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3871578A (en) * 1972-10-10 1975-03-18 Digital Equipment Corp Data processing system for multiplying and intergerizing floating point numbers
US3814924A (en) * 1973-03-12 1974-06-04 Control Data Corp Pipeline binary multiplier
JPS5534455B2 (de) * 1974-05-31 1980-09-06
US4086657A (en) * 1976-08-18 1978-04-25 The United States Of America As Represented By The Secretary Of The Air Force Five-stage four-bit complex multiplier
JPS5759245A (en) * 1980-09-26 1982-04-09 Fujitsu Ltd Double-length multiplier
JPS5899839A (ja) * 1981-12-10 1983-06-14 Toshiba Corp 符号付き乗算補正回路
JPH0621983B2 (ja) * 1983-10-14 1994-03-23 株式会社日立製作所 乗算器

Also Published As

Publication number Publication date
JPS60229140A (ja) 1985-11-14
JPH061438B2 (ja) 1994-01-05
EP0161089B1 (de) 1992-04-29
EP0161089A3 (en) 1988-02-03
US4722068A (en) 1988-01-26
EP0161089A2 (de) 1985-11-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition