IT1031555B - Metodo di fabbricazione di un disegno da uno o riu strati su un substrato mediante rimozione localedi detto stratto di detti strati per mezzo di un attacco per bombardamento ionico e articoli in particolare dispositivi semicon duttori fabbricati con l ausiliodi tale metodo - Google Patents

Metodo di fabbricazione di un disegno da uno o riu strati su un substrato mediante rimozione localedi detto stratto di detti strati per mezzo di un attacco per bombardamento ionico e articoli in particolare dispositivi semicon duttori fabbricati con l ausiliodi tale metodo

Info

Publication number
IT1031555B
IT1031555B IT20050/75A IT2005075A IT1031555B IT 1031555 B IT1031555 B IT 1031555B IT 20050/75 A IT20050/75 A IT 20050/75A IT 2005075 A IT2005075 A IT 2005075A IT 1031555 B IT1031555 B IT 1031555B
Authority
IT
Italy
Prior art keywords
layers
riu
items
attachment
substrate
Prior art date
Application number
IT20050/75A
Other languages
English (en)
Italian (it)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Application granted granted Critical
Publication of IT1031555B publication Critical patent/IT1031555B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32131Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by physical means only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
IT20050/75A 1974-02-12 1975-02-07 Metodo di fabbricazione di un disegno da uno o riu strati su un substrato mediante rimozione localedi detto stratto di detti strati per mezzo di un attacco per bombardamento ionico e articoli in particolare dispositivi semicon duttori fabbricati con l ausiliodi tale metodo IT1031555B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7401859A NL7401859A (nl) 1974-02-12 1974-02-12 Werkwijze voor het vervaardigen van een patroon en of meer lagen op een ondergrond door selijk verwijderen van deze laag of lagen sputteretsen en voorwerpen, in het bijzon- alfgeleiderinrichtingen, vervaardigd met ssing van deze werkwijze.

Publications (1)

Publication Number Publication Date
IT1031555B true IT1031555B (it) 1979-05-10

Family

ID=19820730

Family Applications (1)

Application Number Title Priority Date Filing Date
IT20050/75A IT1031555B (it) 1974-02-12 1975-02-07 Metodo di fabbricazione di un disegno da uno o riu strati su un substrato mediante rimozione localedi detto stratto di detti strati per mezzo di un attacco per bombardamento ionico e articoli in particolare dispositivi semicon duttori fabbricati con l ausiliodi tale metodo

Country Status (7)

Country Link
US (1) US3984300A (de)
JP (1) JPS5530289B2 (de)
DE (1) DE2504500A1 (de)
FR (1) FR2260451B1 (de)
GB (1) GB1491746A (de)
IT (1) IT1031555B (de)
NL (1) NL7401859A (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4057831A (en) * 1972-09-05 1977-11-08 U.S. Philips Corporation Video record disc manufactured by a process involving chemical or sputter etching
DE2536718C3 (de) * 1975-08-18 1978-04-27 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung geätzter Strukturen in Festkörperoberflächen durch Ionenätzung und Bestrahlungsmaske zur Verwendung in diesem Verfahren
US4057460A (en) * 1976-11-22 1977-11-08 Data General Corporation Plasma etching process
DE2754526C2 (de) * 1977-12-07 1985-09-26 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Herstellung des Kathodensystems eines Röntgen- oder Gammastrahlenkonverters
JPS5496775A (en) * 1978-01-17 1979-07-31 Hitachi Ltd Method of forming circuit
US4340276A (en) 1978-11-01 1982-07-20 Minnesota Mining And Manufacturing Company Method of producing a microstructured surface and the article produced thereby
JPS57157523A (en) * 1981-03-25 1982-09-29 Hitachi Ltd Forming method for pattern
US4375390A (en) * 1982-03-15 1983-03-01 Anderson Nathaniel C Thin film techniques for fabricating narrow track ferrite heads
GB2148769A (en) * 1983-10-22 1985-06-05 Standard Telephones Cables Ltd Topographic feature formation by ion beam milling of a substrate
DE3534418A1 (de) * 1985-09-27 1987-04-02 Telefunken Electronic Gmbh Verfahren zum herstellen von vertiefungen in einem halbleiterbauelemente enthaltenden halbleiterkoerper
US4767418A (en) * 1986-02-13 1988-08-30 California Institute Of Technology Luminal surface fabrication for cardiovascular prostheses
US5139974A (en) * 1991-01-25 1992-08-18 Micron Technology, Inc. Semiconductor manufacturing process for decreasing the optical refelctivity of a metal layer

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3400066A (en) * 1965-11-15 1968-09-03 Ibm Sputtering processes for depositing thin films of controlled thickness
US3436327A (en) * 1966-07-18 1969-04-01 Collins Radio Co Selective sputtering rate circuit forming process
US3649503A (en) * 1969-12-03 1972-03-14 Motorola Inc Sputter etch mask
US3676317A (en) * 1970-10-23 1972-07-11 Stromberg Datagraphix Inc Sputter etching process
US3791952A (en) * 1972-07-24 1974-02-12 Bell Telephone Labor Inc Method for neutralizing charge in semiconductor bodies and dielectric coatings induced by cathodic etching

Also Published As

Publication number Publication date
NL7401859A (nl) 1975-08-14
JPS50110073A (de) 1975-08-29
US3984300A (en) 1976-10-05
GB1491746A (en) 1977-11-16
FR2260451B1 (de) 1980-03-21
DE2504500A1 (de) 1975-08-14
JPS5530289B2 (de) 1980-08-09
FR2260451A1 (de) 1975-09-05

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