IN188645B - - Google Patents

Info

Publication number
IN188645B
IN188645B IN692CA1996A IN188645B IN 188645 B IN188645 B IN 188645B IN 692CA1996 A IN692CA1996 A IN 692CA1996A IN 188645 B IN188645 B IN 188645B
Authority
IN
India
Application number
Other languages
English (en)
Inventor
Christl Niederle
Josef Kirschbauer
Peter Stampka
Detlef Dr Houdeau
Hans-Hinnerk Steckhan
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of IN188645B publication Critical patent/IN188645B/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/40Arrangements for protection of devices protecting against tampering, e.g. unauthorised inspection or reverse engineering
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073Special arrangements for circuits, e.g. for protecting identification code in memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07372Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745Mounting details of integrated circuit chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Storage Device Security (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
IN692CA1996 1995-04-25 1996-04-16 IN188645B (2)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19515188A DE19515188C2 (de) 1995-04-25 1995-04-25 Chip-Abdeckung

Publications (1)

Publication Number Publication Date
IN188645B true IN188645B (2) 2002-10-26

Family

ID=7760323

Family Applications (1)

Application Number Title Priority Date Filing Date
IN692CA1996 IN188645B (2) 1995-04-25 1996-04-16

Country Status (9)

Country Link
EP (1) EP0823129A1 (2)
JP (1) JPH11504164A (2)
KR (1) KR100407042B1 (2)
CN (1) CN1135616C (2)
DE (1) DE19515188C2 (2)
IN (1) IN188645B (2)
RU (1) RU2164720C2 (2)
UA (1) UA57704C2 (2)
WO (1) WO1996034409A1 (2)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19841498C2 (de) 1998-09-10 2002-02-21 Beru Ag Verfahren zum Herstellen eines Elektronikbauelementes, insbesondere eines Hallsensors
EP1041482A1 (de) * 1999-03-26 2000-10-04 Siemens Aktiengesellschaft Manipulationssichere integrierte Schaltung
DE19957120A1 (de) * 1999-11-26 2001-05-31 Infineon Technologies Ag Vertikal integrierte Schaltungsanordnung und Verfahren zum Betreiben einer vertikal integrierten Schaltungsanordnung
DE10105987A1 (de) 2001-02-09 2002-08-29 Infineon Technologies Ag Datenverarbeitungsvorrichtung
DE10131014C1 (de) * 2001-06-27 2002-09-05 Infineon Technologies Ag Gegen Analyse geschütztes Halbleiterbauelement und zugehöriges Herstellungsverfahren
FR2872610B1 (fr) * 2004-07-02 2007-06-08 Commissariat Energie Atomique Dispositif de securisation de composants
JP5194932B2 (ja) * 2008-03-26 2013-05-08 富士通セミコンダクター株式会社 半導体装置および半導体装置の製造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3725671A (en) * 1970-11-02 1973-04-03 Us Navy Pyrotechnic eradication of microcircuits
DE3602960C1 (de) * 1986-01-31 1987-02-19 Philips Patentverwaltung Dickschicht-Schaltungsanordnung mit einer keramischen Substratplatte
IL95903A (en) * 1989-10-03 1995-08-31 Univ Technology Electro-active cradle circuits for the detection of access or penetration
JPH0521655A (ja) * 1990-11-28 1993-01-29 Mitsubishi Electric Corp 半導体装置および半導体装置用パツケージ
RU2024110C1 (ru) * 1991-04-10 1994-11-30 Научно-исследовательский институт точной технологии Интегральная микросхема
US5072331A (en) * 1991-04-26 1991-12-10 Hughes Aircraft Company Secure circuit structure
US5233563A (en) * 1992-01-13 1993-08-03 Ncr Corporation Memory security device
US5389738A (en) * 1992-05-04 1995-02-14 Motorola, Inc. Tamperproof arrangement for an integrated circuit device
US5399441A (en) * 1994-04-12 1995-03-21 Dow Corning Corporation Method of applying opaque coatings

Also Published As

Publication number Publication date
KR100407042B1 (ko) 2004-02-18
EP0823129A1 (de) 1998-02-11
DE19515188C2 (de) 1998-02-19
UA57704C2 (uk) 2003-07-15
CN1182499A (zh) 1998-05-20
DE19515188A1 (de) 1996-11-07
WO1996034409A1 (de) 1996-10-31
RU2164720C2 (ru) 2001-03-27
CN1135616C (zh) 2004-01-21
JPH11504164A (ja) 1999-04-06
KR19990008167A (ko) 1999-01-25

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