IN170088B - - Google Patents

Info

Publication number
IN170088B
IN170088B IN313/CAL/88A IN313CA1988A IN170088B IN 170088 B IN170088 B IN 170088B IN 313CA1988 A IN313CA1988 A IN 313CA1988A IN 170088 B IN170088 B IN 170088B
Authority
IN
India
Application number
IN313/CAL/88A
Other languages
English (en)
Inventor
Douglas Lea Peltzer
Richard Lawrence Bechtel
Wen Chuang Ko
William Thomas Liggett
Original Assignee
Tactical Fabs Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tactical Fabs Inc filed Critical Tactical Fabs Inc
Publication of IN170088B publication Critical patent/IN170088B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31922—Timing generation or clock distribution
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Theoretical Computer Science (AREA)
  • Pulse Circuits (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
IN313/CAL/88A 1987-01-28 1988-04-19 IN170088B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/008,212 US4779221A (en) 1987-01-28 1987-01-28 Timing signal generator

Publications (1)

Publication Number Publication Date
IN170088B true IN170088B (zh) 1992-02-08

Family

ID=21730380

Family Applications (1)

Application Number Title Priority Date Filing Date
IN313/CAL/88A IN170088B (zh) 1987-01-28 1988-04-19

Country Status (6)

Country Link
US (1) US4779221A (zh)
JP (1) JPS63271625A (zh)
KR (1) KR940001682B1 (zh)
DE (1) DE3801993C2 (zh)
FR (1) FR2610154B1 (zh)
IN (1) IN170088B (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE36063E (en) * 1987-02-09 1999-01-26 Teradyne, Inc. Timing generator with edge generators, utilizing programmable delays, providing synchronized timing signals at non-integer multiples of a clock signal
US5274796A (en) * 1987-02-09 1993-12-28 Teradyne, Inc. Timing generator with edge generators, utilizing programmable delays, providing synchronized timing signals at non-integer multiples of a clock signal
US5185880A (en) * 1989-06-05 1993-02-09 Matsushita Electric Industrial Co., Ltd. Stored instructions executing type timing signal generating system
US5212443A (en) * 1990-09-05 1993-05-18 Schlumberger Technologies, Inc. Event sequencer for automatic test equipment
US5225772A (en) * 1990-09-05 1993-07-06 Schlumberger Technologies, Inc. Automatic test equipment system using pin slice architecture
FR2684208B1 (fr) * 1990-10-30 1995-01-27 Teradyne Inc Circuit destine a fournir une information de periode.
CA2127192C (en) * 1993-07-01 1999-09-07 Alan Brent Hussey Shaping ate bursts, particularly in gallium arsenide
EP0815461B1 (en) * 1995-03-16 2000-06-21 Teradyne, Inc. Timing generator with multiple coherent synchronized clocks
US5566188A (en) * 1995-03-29 1996-10-15 Teradyne, Inc. Low cost timing generator for automatic test equipment operating at high data rates
US7366966B2 (en) * 2005-10-11 2008-04-29 Micron Technology, Inc. System and method for varying test signal durations and assert times for testing memory devices
US8295182B2 (en) * 2007-07-03 2012-10-23 Credence Systems Corporation Routed event test system and method

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3478325A (en) * 1967-01-16 1969-11-11 Ibm Delay line data transfer apparatus
US3633113A (en) * 1969-12-22 1972-01-04 Ibm Timed pulse train generating system
US4063308A (en) * 1975-06-27 1977-12-13 International Business Machines Corporation Automatic clock tuning and measuring system for LSI computers
US4231104A (en) * 1978-04-26 1980-10-28 Teradyne, Inc. Generating timing signals
US4482983A (en) * 1980-06-23 1984-11-13 Sperry Corporation Variable speed cycle time for synchronous machines
JPS6089774A (ja) * 1983-08-01 1985-05-20 フエアチアイルド　カメラ　アンド　インストルメント　コ−ポレ−シヨン 最小メモリを使用した自動テスト方式における信号タイミング装置の制御
JP2539600B2 (ja) * 1985-07-10 1996-10-02 株式会社アドバンテスト タイミング発生装置

Also Published As

Publication number Publication date
DE3801993A1 (de) 1988-08-11
JPS63271625A (ja) 1988-11-09
US4779221A (en) 1988-10-18
KR940001682B1 (ko) 1994-03-05
DE3801993C2 (de) 1994-03-17
KR880011640A (ko) 1988-10-29
FR2610154A1 (fr) 1988-07-29
FR2610154B1 (fr) 1990-08-17

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