IL95445A - פיקוח על העברת זיכרון ישיר בהתפוצצות נתונים בסיס/יעד במהירות גבוהה ובגמישות - Google Patents

פיקוח על העברת זיכרון ישיר בהתפוצצות נתונים בסיס/יעד במהירות גבוהה ובגמישות

Info

Publication number
IL95445A
IL95445A IL9544590A IL9544590A IL95445A IL 95445 A IL95445 A IL 95445A IL 9544590 A IL9544590 A IL 9544590A IL 9544590 A IL9544590 A IL 9544590A IL 95445 A IL95445 A IL 95445A
Authority
IL
Israel
Prior art keywords
data
transfer
address
channel
signal
Prior art date
Application number
IL9544590A
Other languages
English (en)
Other versions
IL95445A0 (en
Original Assignee
Auspex Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Auspex Systems Inc filed Critical Auspex Systems Inc
Publication of IL95445A0 publication Critical patent/IL95445A0/xx
Publication of IL95445A publication Critical patent/IL95445A/he

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
  • Vehicle Body Suspensions (AREA)
  • Steering Control In Accordance With Driving Conditions (AREA)
  • Control Of Eletrric Generators (AREA)
IL9544590A 1990-02-02 1990-08-21 פיקוח על העברת זיכרון ישיר בהתפוצצות נתונים בסיס/יעד במהירות גבוהה ובגמישות IL95445A (he)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/474,534 US5175825A (en) 1990-02-02 1990-02-02 High speed, flexible source/destination data burst direct memory access controller

Publications (2)

Publication Number Publication Date
IL95445A0 IL95445A0 (en) 1991-06-30
IL95445A true IL95445A (he) 1995-10-31

Family

ID=23883934

Family Applications (1)

Application Number Title Priority Date Filing Date
IL9544590A IL95445A (he) 1990-02-02 1990-08-21 פיקוח על העברת זיכרון ישיר בהתפוצצות נתונים בסיס/יעד במהירות גבוהה ובגמישות

Country Status (7)

Country Link
US (1) US5175825A (he)
EP (1) EP0512991A4 (he)
JP (1) JPH05509423A (he)
KR (1) KR920704222A (he)
CA (1) CA2074506A1 (he)
IL (1) IL95445A (he)
WO (1) WO1991011767A1 (he)

Families Citing this family (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6108755A (en) * 1990-09-18 2000-08-22 Fujitsu Limited Asynchronous access system to a shared storage
WO1992006435A1 (fr) * 1990-09-28 1992-04-16 Fujitsu Limited Systeme de commande de messages utilise dans un systeme de transmission de donnees
US5182800A (en) * 1990-11-16 1993-01-26 International Business Machines Corporation Direct memory access controller with adaptive pipelining and bus control features
US5321844A (en) * 1990-12-20 1994-06-14 Siemens Aktiengesellschaft Method for error correction of software errors in a communication system
CA2065989C (en) * 1991-06-07 1998-03-31 Don Steven Keener Personal computer data flow control
US5381538A (en) * 1991-10-15 1995-01-10 International Business Machines Corp. DMA controller including a FIFO register and a residual register for data buffering and having different operating modes
US5388237A (en) * 1991-12-30 1995-02-07 Sun Microsystems, Inc. Method of and apparatus for interleaving multiple-channel DMA operations
US5386532A (en) * 1991-12-30 1995-01-31 Sun Microsystems, Inc. Method and apparatus for transferring data between a memory and a plurality of peripheral units through a plurality of data channels
US5446866A (en) * 1992-01-30 1995-08-29 Apple Computer, Inc. Architecture for transferring pixel streams, without control information, in a plurality of formats utilizing addressable source and destination channels associated with the source and destination components
JPH07504527A (ja) * 1992-03-09 1995-05-18 オースペックス　システムズ　インコーポレイテッド 高性能の不揮発性ｒａｍ保護式の書き込みキャッシュアクセラレータシステム
US5721954A (en) * 1992-04-13 1998-02-24 At&T Global Information Solutions Company Intelligent SCSI-2/DMA processor
WO1993023810A1 (en) * 1992-05-12 1993-11-25 Seiko Epson Corporation Scalable coprocessor
US5321818A (en) * 1992-05-12 1994-06-14 Hughes Aircraft Company System for arbitrating for access on VME bus structures
US5377337A (en) * 1993-06-08 1994-12-27 International Business Machines Corporation Method and means for enabling virtual addressing control by software users over a hardware page transfer control entity
JP3358254B2 (ja) * 1993-10-28 2002-12-16 株式会社日立製作所 通信制御装置および通信制御用回路装置
US5708849A (en) * 1994-01-26 1998-01-13 Intel Corporation Implementing scatter/gather operations in a direct memory access device on a personal computer
US5805927A (en) * 1994-01-28 1998-09-08 Apple Computer, Inc. Direct memory access channel architecture and method for reception of network information
US5655151A (en) * 1994-01-28 1997-08-05 Apple Computer, Inc. DMA controller having a plurality of DMA channels each having multiple register sets storing different information controlling respective data transfer
US5828856A (en) * 1994-01-28 1998-10-27 Apple Computer, Inc. Dual bus concurrent multi-channel direct memory access controller and method
AU2192295A (en) * 1994-03-30 1995-10-23 Apple Computer, Inc. Streaming storage system and streaming data buffer
US5548788A (en) * 1994-10-27 1996-08-20 Emc Corporation Disk controller having host processor controls the time for transferring data to disk drive by modifying contents of the memory to indicate data is stored in the memory
US5628026A (en) * 1994-12-05 1997-05-06 Motorola, Inc. Multi-dimensional data transfer in a data processing system and method therefor
US5634138A (en) * 1995-06-07 1997-05-27 Emulex Corporation Burst broadcasting on a peripheral component interconnect bus
US6122699A (en) * 1996-06-03 2000-09-19 Canon Kabushiki Kaisha Data processing apparatus with bus intervention means for controlling interconnection of plural busses
US6148326A (en) * 1996-09-30 2000-11-14 Lsi Logic Corporation Method and structure for independent disk and host transfer in a storage subsystem target device
US6247040B1 (en) 1996-09-30 2001-06-12 Lsi Logic Corporation Method and structure for automated switching between multiple contexts in a storage subsystem target device
US6081849A (en) * 1996-10-01 2000-06-27 Lsi Logic Corporation Method and structure for switching multiple contexts in storage subsystem target device
DE69727465T2 (de) 1997-01-09 2004-12-23 Hewlett-Packard Co. (N.D.Ges.D.Staates Delaware), Palo Alto Rechnersystem mit Speichersteuerung für Stossbetrieb-Übertragung
EP0853283A1 (en) * 1997-01-09 1998-07-15 Hewlett-Packard Company Computer system with memory controller for burst transfer
EP0862118B1 (en) * 1997-01-09 2004-02-04 Hewlett-Packard Company, A Delaware Corporation Computer system comprising a memory controller for burst transfer
KR100229897B1 (ko) * 1997-01-10 1999-11-15 윤종용 직접 메모리 억세스 전송방법에 따른 타이밍 모드선택장치
US6108724A (en) * 1997-05-29 2000-08-22 Gateway 2000, Inc. Fast IDE drive to drive transfers
US6170031B1 (en) * 1997-07-08 2001-01-02 Seagate Technology Llc Read/write state machines for transferring data to/from host interface in a digital data storage system
US6081851A (en) * 1997-12-15 2000-06-27 Intel Corporation Method and apparatus for programming a remote DMA engine residing on a first bus from a destination residing on a second bus
US6298409B1 (en) * 1998-03-26 2001-10-02 Micron Technology, Inc. System for data and interrupt posting for computer devices
US6826571B1 (en) 1998-05-22 2004-11-30 International Business Machines Corporation Method and apparatus for dynamically customizing and extending functions of a server program to enable and restrict functions of the server
US6912561B1 (en) 1998-05-22 2005-06-28 International Business Machines Corporation Method and apparatus for using classes, encapsulating data with its behaviors, for transferring between databases and client applications and for enabling applications to adapt to specific constraints of the data
US6366916B1 (en) 1998-05-22 2002-04-02 International Business Machines Corporation Configurable and extensible system for deploying asset management functions to client applications
US6917939B1 (en) 1998-05-22 2005-07-12 International Business Machines Corporation Method and apparatus for configurable mapping between data stores and data structures and a generalized client data model using heterogeneous, specialized storage
US6668271B1 (en) * 1999-05-19 2003-12-23 Richo Company, Ltd. System for distributing, installing and running web applications (agents)
JP5220974B2 (ja) 1999-10-14 2013-06-26 ブルアーク ユーケー リミテッド ハードウェア実行又はオペレーティングシステム機能の加速のための装置及び方法
US7383424B1 (en) 2000-06-15 2008-06-03 Hewlett-Packard Development Company, L.P. Computer architecture containing processor and decoupled coprocessor
US7519779B2 (en) * 2002-08-26 2009-04-14 International Business Machines Corporation Dumping using limited system address space
US8041735B1 (en) 2002-11-01 2011-10-18 Bluearc Uk Limited Distributed file system and method
US7457822B1 (en) 2002-11-01 2008-11-25 Bluearc Uk Limited Apparatus and method for hardware-based file system
KR20040074868A (ko) * 2003-02-19 2004-08-26 삼성전자주식회사 차세대 에이 디 에스 엘 가입자 보드의 음성 데이터 전송장치 및 그 방법
US20110004732A1 (en) * 2007-06-06 2011-01-06 3Leaf Networks, Inc. DMA in Distributed Shared Memory System
US8621154B1 (en) 2008-04-18 2013-12-31 Netapp, Inc. Flow based reply cache
US8161236B1 (en) 2008-04-23 2012-04-17 Netapp, Inc. Persistent reply cache integrated with file system
US8171227B1 (en) 2009-03-11 2012-05-01 Netapp, Inc. System and method for managing a flow based reply cache
CN102207919A (zh) * 2010-03-30 2011-10-05 国际商业机器公司 加速数据传输的处理单元、芯片、计算设备和方法
US8688799B2 (en) * 2011-06-30 2014-04-01 Nokia Corporation Methods, apparatuses and computer program products for reducing memory copy overhead by indicating a location of requested data for direct access
CN103034598B (zh) * 2011-09-28 2015-09-09 安凯(广州)微电子技术有限公司 保存dma下行数据时写使能信号的处理方法及系统

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57191703A (en) * 1981-05-20 1982-11-25 Fanuc Ltd Sequence controller
EP0112912A4 (en) * 1982-06-30 1987-04-28 Elxsi INPUT / OUTPUT CHANNEL BUS.
US4500985A (en) * 1982-12-08 1985-02-19 At&T Bell Laboratories Communication path continuity verification arrangement
US4577273A (en) * 1983-06-06 1986-03-18 Sperry Corporation Multiple microcomputer system for digital computers
US4620279A (en) * 1983-07-29 1986-10-28 Standard Oil Company, Now Amoco Corporation Data transfer system
JPS60146350A (ja) * 1984-01-11 1985-08-02 Hitachi Ltd 通信制御装置
US4688166A (en) * 1984-08-03 1987-08-18 Motorola Computer Systems, Inc. Direct memory access controller supporting multiple input/output controllers and memory units
US4837677A (en) * 1985-06-14 1989-06-06 International Business Machines Corporation Multiple port service expansion adapter for a communications controller
US4722051A (en) * 1985-07-26 1988-01-26 Ncr Corporation Combined read/write cycle for a direct memory access controller
DE3751609T2 (de) * 1986-09-01 1996-07-04 Nippon Electric Co Datenprozessor mit Hochgeschwindigkeitsdatenübertragung.
US5081701A (en) * 1987-04-20 1992-01-14 Tandem Computers Incorporated System for controlling data transfer using transfer handshake protocol using transfer complete and transfer inhibit signals

Also Published As

Publication number Publication date
AU644814B2 (en) 1993-12-23
EP0512991A1 (en) 1992-11-19
JPH05509423A (ja) 1993-12-22
US5175825A (en) 1992-12-29
EP0512991A4 (en) 1993-06-30
IL95445A0 (en) 1991-06-30
AU6336990A (en) 1991-08-21
KR920704222A (ko) 1992-12-19
WO1991011767A1 (en) 1991-08-08
CA2074506A1 (en) 1991-08-03

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