IL85325A - Method and apparatus for obtaining high frequency resolution of a low frequency signal - Google Patents

Method and apparatus for obtaining high frequency resolution of a low frequency signal

Info

Publication number
IL85325A
IL85325A IL85325A IL8532588A IL85325A IL 85325 A IL85325 A IL 85325A IL 85325 A IL85325 A IL 85325A IL 8532588 A IL8532588 A IL 8532588A IL 85325 A IL85325 A IL 85325A
Authority
IL
Israel
Prior art keywords
obtaining high
high frequency
frequency signal
low frequency
resolution
Prior art date
Application number
IL85325A
Other languages
English (en)
Other versions
IL85325A0 (en
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of IL85325A0 publication Critical patent/IL85325A0/xx
Publication of IL85325A publication Critical patent/IL85325A/xx

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/017—Adjustment of width or dutycycle of pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/04—Shaping pulses by increasing duration; by decreasing duration
    • H03K5/05—Shaping pulses by increasing duration; by decreasing duration by the use of clock signals or other time reference signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/131—Digitally controlled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015—Layout of the delay element
    • H03K2005/00234—Layout of the delay element using circuits having two logic levels
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015—Layout of the delay element
    • H03K2005/00234—Layout of the delay element using circuits having two logic levels
    • H03K2005/00254—Layout of the delay element using circuits having two logic levels using microprocessors

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
IL85325A 1987-03-09 1988-02-05 Method and apparatus for obtaining high frequency resolution of a low frequency signal IL85325A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/023,502 US4818894A (en) 1987-03-09 1987-03-09 Method and apparatus for obtaining high frequency resolution of a low frequency signal

Publications (2)

Publication Number Publication Date
IL85325A0 IL85325A0 (en) 1988-07-31
IL85325A true IL85325A (en) 1991-11-21

Family

ID=21815465

Family Applications (1)

Application Number Title Priority Date Filing Date
IL85325A IL85325A (en) 1987-03-09 1988-02-05 Method and apparatus for obtaining high frequency resolution of a low frequency signal

Country Status (6)

Country Link
US (1) US4818894A (xx)
EP (1) EP0304450B1 (xx)
JP (1) JPH01503029A (xx)
DE (1) DE3869695D1 (xx)
IL (1) IL85325A (xx)
WO (1) WO1988007289A1 (xx)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0449529B1 (en) * 1990-03-24 1997-02-12 Canon Kabushiki Kaisha Image processing method and apparatus
DE69130486T2 (de) * 1990-06-29 1999-07-15 Analog Devices Inc., Norwood, Mass. Synchrone Verzögerungsleitung
US5293628A (en) * 1991-11-04 1994-03-08 Motorola, Inc. Data processing system which generates a waveform with improved pulse width resolution

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3509472A (en) * 1967-11-16 1970-04-28 Sperry Rand Corp Low frequency pulse generator
US3564427A (en) * 1969-08-04 1971-02-16 Iwatsu Electric Co Ltd Synchronizing method for high frequency signal
JPS5521511B2 (xx) * 1972-06-23 1980-06-10
US3946255A (en) * 1974-04-25 1976-03-23 Honeywell Inc. Signal generator
DE2608265C2 (de) * 1976-02-28 1978-04-27 Deutsche Itt Industries Gmbh, 7800 Freiburg Mehrphasen-MOS-Schaltung zur Impulsdaueränderung
US4303803A (en) * 1978-08-31 1981-12-01 Kokusai Denshin Denwa Co., Ltd. Digital speech interpolation system
US4330751A (en) * 1979-12-03 1982-05-18 Norlin Industries, Inc. Programmable frequency and duty cycle tone signal generator
US4365202A (en) * 1980-08-25 1982-12-21 Rca Corporation Duty cycle generator with improved resolution
JPS5843187A (ja) * 1981-09-03 1983-03-12 Fuji Electric Co Ltd 可変周波発振方式
JPS58173471A (ja) * 1982-04-05 1983-10-12 Mitsubishi Electric Corp 周波数判別装置
US4636656A (en) * 1984-05-21 1987-01-13 Motorola, Inc. Circuit for selectively extending a cycle of a clock signal
JP2687325B2 (ja) * 1984-12-18 1997-12-08 日本電気株式会社 分周回路
JP2539600B2 (ja) * 1985-07-10 1996-10-02 株式会社アドバンテスト タイミング発生装置
US4691302A (en) * 1985-09-04 1987-09-01 Siemens Aktiengesellschaft Circuit arrangement comprising a matrix-shaped memory arrangement for variably adjustable delay of digital signals
US4748595A (en) * 1985-09-04 1988-05-31 Siemens Aktiengesellschaft Circuit arrangement comprising a matrix-shaped memory arrangement for variably adjustable delay of digital signals

Also Published As

Publication number Publication date
EP0304450A1 (en) 1989-03-01
IL85325A0 (en) 1988-07-31
DE3869695D1 (de) 1992-05-07
JPH01503029A (ja) 1989-10-12
US4818894A (en) 1989-04-04
WO1988007289A1 (en) 1988-09-22
EP0304450B1 (en) 1992-04-01

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