IL142562A0 - Coding system having state machine based interleaver - Google Patents

Coding system having state machine based interleaver

Info

Publication number
IL142562A0
IL142562A0 IL14256299A IL14256299A IL142562A0 IL 142562 A0 IL142562 A0 IL 142562A0 IL 14256299 A IL14256299 A IL 14256299A IL 14256299 A IL14256299 A IL 14256299A IL 142562 A0 IL142562 A0 IL 142562A0
Authority
IL
Israel
Prior art keywords
state machine
coding system
machine based
based interleaver
interleaver
Prior art date
Application number
IL14256299A
Other languages
English (en)
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of IL142562A0 publication Critical patent/IL142562A0/xx

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957Turbo codes and decoding
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2742Irregular interleaver wherein the permutation pattern is not obtained by a computation rule, e.g. interleaver based on random generators
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2757Interleaver with an interleaving rule not provided for in the subgroups H03M13/2703 - H03M13/2753
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/276Interleaving address generation
    • H03M13/2764Circuits therefore
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2771Internal interleaver for turbo codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2789Interleaver providing variable interleaving, e.g. variable block sizes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041Arrangements at the transmitter end
    • H04L1/0043Realisations of complexity reduction techniques, e.g. use of look-up tables
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0047Decoding adapted to other signal detection operation
    • H04L1/005Iterative decoding, including iteration between signal detection and decoding operation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0052Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0064Concatenated codes
    • H04L1/0066Parallel concatenated codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computing Systems (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
IL14256299A 1998-10-13 1999-10-12 Coding system having state machine based interleaver IL142562A0 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/172,069 US6353900B1 (en) 1998-09-22 1998-10-13 Coding system having state machine based interleaver
PCT/US1999/024061 WO2000022738A1 (en) 1998-10-13 1999-10-12 Coding system having state machine based interleaver

Publications (1)

Publication Number Publication Date
IL142562A0 true IL142562A0 (en) 2002-03-10

Family

ID=22626248

Family Applications (1)

Application Number Title Priority Date Filing Date
IL14256299A IL142562A0 (en) 1998-10-13 1999-10-12 Coding system having state machine based interleaver

Country Status (15)

Country Link
US (1) US6353900B1 (xx)
EP (1) EP1121761A1 (xx)
JP (1) JP2002527980A (xx)
KR (1) KR20010080157A (xx)
CN (1) CN1186880C (xx)
AU (1) AU6517299A (xx)
BR (1) BR9914541A (xx)
CA (1) CA2347237A1 (xx)
HK (1) HK1040011B (xx)
ID (1) ID29939A (xx)
IL (1) IL142562A0 (xx)
MX (1) MXPA01003814A (xx)
NO (1) NO20011889L (xx)
RU (1) RU2001112766A (xx)
WO (1) WO2000022738A1 (xx)

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US6480976B1 (en) * 1999-03-11 2002-11-12 Globespanvirata, Inc. System and method for resource optimized integrated forward error correction in a DMT communication system
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US6591391B1 (en) * 1999-09-08 2003-07-08 Sencore Inc. Method of generating an 8-VSB modulated signal
JP3973066B2 (ja) * 1999-09-10 2007-09-05 パイオニア株式会社 符号誤り訂正回路及び符号誤り訂正方法
US7302621B2 (en) * 2000-01-03 2007-11-27 Icoding Technology, Inc. High spread highly randomized generatable interleavers
US6714606B1 (en) * 2000-01-04 2004-03-30 Lsi Logic Corporation Integrated services digital broadcasting deinterleaver architecture
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US6769093B1 (en) * 2000-12-15 2004-07-27 Conexant Systems, Inc. Synchronization of a communications system
DE10206727A1 (de) * 2002-02-18 2003-08-28 Infineon Technologies Ag Kombinierter Ver-und Entschachteler sowie Turbo-Decodierer mit kombiniertem Ver-und Entschachteler
US7051261B1 (en) * 2002-10-29 2006-05-23 Lattice Semiconductor Corporation Turbo encoder with reduced processing delay
KR100925429B1 (ko) * 2002-12-28 2009-11-06 엘지전자 주식회사 터보 코더
KR100518295B1 (ko) * 2003-03-14 2005-10-04 삼성전자주식회사 디지털 통신 시스템의 디인터리빙장치 및 그의디인터리빙방법
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US7509556B2 (en) * 2003-11-20 2009-03-24 Seagate Technology Llc Method and apparatus for combining output of different type interleavers based on an input data sequence to obtain a combined output
US7673213B2 (en) * 2004-02-19 2010-03-02 Trellisware Technologies, Inc. Method and apparatus for communications using improved turbo like codes
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Also Published As

Publication number Publication date
JP2002527980A (ja) 2002-08-27
ID29939A (id) 2001-10-25
CA2347237A1 (en) 2000-04-20
NO20011889D0 (no) 2001-04-17
HK1040011A1 (en) 2002-05-17
WO2000022738A1 (en) 2000-04-20
KR20010080157A (ko) 2001-08-22
CN1186880C (zh) 2005-01-26
MXPA01003814A (es) 2003-07-21
HK1040011B (zh) 2005-09-02
CN1329777A (zh) 2002-01-02
US6353900B1 (en) 2002-03-05
BR9914541A (pt) 2002-01-02
EP1121761A1 (en) 2001-08-08
RU2001112766A (ru) 2003-06-10
AU6517299A (en) 2000-05-01
NO20011889L (no) 2001-06-05

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