IL123799A0 - Formation of source/drain from doped glass - Google Patents
Formation of source/drain from doped glassInfo
- Publication number
- IL123799A0 IL123799A0 IL12379996A IL12379996A IL123799A0 IL 123799 A0 IL123799 A0 IL 123799A0 IL 12379996 A IL12379996 A IL 12379996A IL 12379996 A IL12379996 A IL 12379996A IL 123799 A0 IL123799 A0 IL 123799A0
- Authority
- IL
- Israel
- Prior art keywords
- drain
- formation
- source
- doped glass
- doped
- Prior art date
Links
- 230000015572 biosynthetic process Effects 0.000 title 1
- 239000011521 glass Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/38—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions
- H01L21/385—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US53884695A | 1995-10-04 | 1995-10-04 | |
PCT/US1996/016002 WO1997013273A1 (fr) | 1995-10-04 | 1996-10-03 | Formation d'une region de source et de drain en verre dope |
Publications (1)
Publication Number | Publication Date |
---|---|
IL123799A0 true IL123799A0 (en) | 1998-10-30 |
Family
ID=24148664
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IL12379996A IL123799A0 (en) | 1995-10-04 | 1996-10-03 | Formation of source/drain from doped glass |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0853815A4 (fr) |
JP (1) | JP2001504639A (fr) |
KR (1) | KR19990064285A (fr) |
AU (1) | AU7257496A (fr) |
IL (1) | IL123799A0 (fr) |
WO (1) | WO1997013273A1 (fr) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3107157B2 (ja) * | 1998-04-20 | 2000-11-06 | 日本電気株式会社 | 半導体装置およびその製造方法 |
US6429062B1 (en) * | 1999-09-20 | 2002-08-06 | Koninklike Philips Electronics N.V. | Integrated-circuit manufacturing using high interstitial-recombination-rate blocking layer for source/drain extension implant |
US7192836B1 (en) * | 1999-11-29 | 2007-03-20 | Advanced Micro Devices, Inc. | Method and system for providing halo implant to a semiconductor device with minimal impact to the junction capacitance |
WO2005067035A1 (fr) * | 2003-12-04 | 2005-07-21 | International Business Machines Corporation | Procede pour former des dispositifs non amorphes, ultra-fins au moyen d'une couche d'implantation sacrificielle |
US7271044B2 (en) | 2005-07-21 | 2007-09-18 | International Business Machines Corporation | CMOS (complementary metal oxide semiconductor) technology |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3600797A (en) * | 1967-12-26 | 1971-08-24 | Hughes Aircraft Co | Method of making ohmic contacts to semiconductor bodies by indirect ion implantation |
US4102715A (en) * | 1975-12-19 | 1978-07-25 | Matsushita Electric Industrial Co., Ltd. | Method for diffusing an impurity into a semiconductor body |
JPS54147789A (en) * | 1978-05-11 | 1979-11-19 | Matsushita Electric Ind Co Ltd | Semiconductor divice and its manufacture |
US4209350A (en) * | 1978-11-03 | 1980-06-24 | International Business Machines Corporation | Method for forming diffusions having narrow dimensions utilizing reactive ion etching |
US4546535A (en) * | 1983-12-12 | 1985-10-15 | International Business Machines Corporation | Method of making submicron FET structure |
JPS62266829A (ja) * | 1986-05-14 | 1987-11-19 | Sharp Corp | 浅い接合層の形成方法 |
JP3131436B2 (ja) * | 1990-02-26 | 2001-01-31 | 株式会社東芝 | 半導体装置の製造方法 |
US5094984A (en) * | 1990-10-12 | 1992-03-10 | Hewlett-Packard Company | Suppression of water vapor absorption in glass encapsulation |
US5348900A (en) * | 1991-10-11 | 1994-09-20 | Sharp Kabushiki Kaisha | Process for manufacturing a semiconductor device including heat treatment in ammonia or oxygen |
US5518945A (en) * | 1995-05-05 | 1996-05-21 | International Business Machines Corporation | Method of making a diffused lightly doped drain device with built in etch stop |
US5976939A (en) * | 1995-07-03 | 1999-11-02 | Intel Corporation | Low damage doping technique for self-aligned source and drain regions |
-
1996
- 1996-10-03 JP JP51449897A patent/JP2001504639A/ja active Pending
- 1996-10-03 EP EP96934065A patent/EP0853815A4/fr not_active Withdrawn
- 1996-10-03 AU AU72574/96A patent/AU7257496A/en not_active Abandoned
- 1996-10-03 KR KR1019980702779A patent/KR19990064285A/ko not_active Application Discontinuation
- 1996-10-03 IL IL12379996A patent/IL123799A0/xx unknown
- 1996-10-03 WO PCT/US1996/016002 patent/WO1997013273A1/fr not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
AU7257496A (en) | 1997-04-28 |
EP0853815A1 (fr) | 1998-07-22 |
EP0853815A4 (fr) | 1999-10-27 |
WO1997013273A1 (fr) | 1997-04-10 |
KR19990064285A (ko) | 1999-07-26 |
JP2001504639A (ja) | 2001-04-03 |
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