IL123799A0 - Formation of source/drain from doped glass - Google Patents

Formation of source/drain from doped glass

Info

Publication number
IL123799A0
IL123799A0 IL12379996A IL12379996A IL123799A0 IL 123799 A0 IL123799 A0 IL 123799A0 IL 12379996 A IL12379996 A IL 12379996A IL 12379996 A IL12379996 A IL 12379996A IL 123799 A0 IL123799 A0 IL 123799A0
Authority
IL
Israel
Prior art keywords
drain
formation
source
doped glass
doped
Prior art date
Application number
IL12379996A
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of IL123799A0 publication Critical patent/IL123799A0/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H10P32/14—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H10P32/141—
    • H10P32/17—
    • H10P32/171—
IL12379996A 1995-10-04 1996-10-03 Formation of source/drain from doped glass IL123799A0 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US53884695A 1995-10-04 1995-10-04
PCT/US1996/016002 WO1997013273A1 (en) 1995-10-04 1996-10-03 Formation of source/drain from doped glass

Publications (1)

Publication Number Publication Date
IL123799A0 true IL123799A0 (en) 1998-10-30

Family

ID=24148664

Family Applications (1)

Application Number Title Priority Date Filing Date
IL12379996A IL123799A0 (en) 1995-10-04 1996-10-03 Formation of source/drain from doped glass

Country Status (6)

Country Link
EP (1) EP0853815A4 (en)
JP (1) JP2001504639A (en)
KR (1) KR19990064285A (en)
AU (1) AU7257496A (en)
IL (1) IL123799A0 (en)
WO (1) WO1997013273A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3107157B2 (en) * 1998-04-20 2000-11-06 日本電気株式会社 Semiconductor device and manufacturing method thereof
US6429062B1 (en) * 1999-09-20 2002-08-06 Koninklike Philips Electronics N.V. Integrated-circuit manufacturing using high interstitial-recombination-rate blocking layer for source/drain extension implant
US7192836B1 (en) * 1999-11-29 2007-03-20 Advanced Micro Devices, Inc. Method and system for providing halo implant to a semiconductor device with minimal impact to the junction capacitance
CN100405581C (en) * 2003-12-04 2008-07-23 国际商业机器公司 Method for forming non-amorphous ultra-thin semiconductor devices using sacrificial implant layers
US7271044B2 (en) 2005-07-21 2007-09-18 International Business Machines Corporation CMOS (complementary metal oxide semiconductor) technology
DE112017008124T5 (en) * 2017-09-29 2020-08-20 Intel Corporation COMPONENT, PROCESS AND SYSTEM FOR PROVIDING A STRESSED CHANNEL OF A TRANSISTOR

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3600797A (en) * 1967-12-26 1971-08-24 Hughes Aircraft Co Method of making ohmic contacts to semiconductor bodies by indirect ion implantation
US4102715A (en) * 1975-12-19 1978-07-25 Matsushita Electric Industrial Co., Ltd. Method for diffusing an impurity into a semiconductor body
JPS54147789A (en) * 1978-05-11 1979-11-19 Matsushita Electric Ind Co Ltd Semiconductor divice and its manufacture
US4209350A (en) * 1978-11-03 1980-06-24 International Business Machines Corporation Method for forming diffusions having narrow dimensions utilizing reactive ion etching
US4546535A (en) * 1983-12-12 1985-10-15 International Business Machines Corporation Method of making submicron FET structure
JPS62266829A (en) * 1986-05-14 1987-11-19 Sharp Corp Formation of shallow junction layer
JP3131436B2 (en) * 1990-02-26 2001-01-31 株式会社東芝 Method for manufacturing semiconductor device
US5094984A (en) * 1990-10-12 1992-03-10 Hewlett-Packard Company Suppression of water vapor absorption in glass encapsulation
US5348900A (en) * 1991-10-11 1994-09-20 Sharp Kabushiki Kaisha Process for manufacturing a semiconductor device including heat treatment in ammonia or oxygen
US5518945A (en) * 1995-05-05 1996-05-21 International Business Machines Corporation Method of making a diffused lightly doped drain device with built in etch stop
US5976939A (en) * 1995-07-03 1999-11-02 Intel Corporation Low damage doping technique for self-aligned source and drain regions

Also Published As

Publication number Publication date
WO1997013273A1 (en) 1997-04-10
AU7257496A (en) 1997-04-28
KR19990064285A (en) 1999-07-26
JP2001504639A (en) 2001-04-03
EP0853815A1 (en) 1998-07-22
EP0853815A4 (en) 1999-10-27

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