IL113153A - Data processing with a set of multi-instructions - Google Patents
Data processing with a set of multi-instructionsInfo
- Publication number
- IL113153A IL113153A IL11315395A IL11315395A IL113153A IL 113153 A IL113153 A IL 113153A IL 11315395 A IL11315395 A IL 11315395A IL 11315395 A IL11315395 A IL 11315395A IL 113153 A IL113153 A IL 113153A
- Authority
- IL
- Israel
- Prior art keywords
- bit
- instruction
- program
- instruction set
- program instruction
- Prior art date
Links
- 238000012545 processing Methods 0.000 title claims description 65
- 230000037361 pathway Effects 0.000 claims description 25
- 238000013507 mapping Methods 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 8
- 230000004044 response Effects 0.000 claims description 8
- 238000012546 transfer Methods 0.000 description 7
- 238000013461 design Methods 0.000 description 4
- 238000013459 approach Methods 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 230000009471 action Effects 0.000 description 2
- 210000003813 thumb Anatomy 0.000 description 2
- 101100494729 Syncephalastrum racemosum SPSR gene Proteins 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 238000004590 computer program Methods 0.000 description 1
- 230000010485 coping Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3818—Decoding for concurrent execution
- G06F9/3822—Parallel decoding, e.g. parallel decode units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30094—Condition code generation, e.g. Carry, Zero flag
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/3017—Runtime instruction translation, e.g. macros
- G06F9/30174—Runtime instruction translation, e.g. macros for non-native instruction set, e.g. Javabyte, legacy code
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30196—Instruction operation extension or modification using decoder, e.g. decoder per instruction set, adaptable or programmable decoders
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
- Devices For Executing Special Programs (AREA)
- Hardware Redundancy (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9408765A GB2289353B (en) | 1994-05-03 | 1994-05-03 | Data processing with multiple instruction sets |
Publications (2)
Publication Number | Publication Date |
---|---|
IL113153A0 IL113153A0 (en) | 1995-06-29 |
IL113153A true IL113153A (en) | 1998-07-15 |
Family
ID=10754489
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IL11315395A IL113153A (en) | 1994-05-03 | 1995-03-27 | Data processing with a set of multi-instructions |
Country Status (13)
Country | Link |
---|---|
US (1) | US5740461A (ja) |
EP (3) | EP0813144B1 (ja) |
JP (3) | JP3173793B2 (ja) |
KR (2) | KR100327776B1 (ja) |
CN (2) | CN1089460C (ja) |
DE (2) | DE69502098T2 (ja) |
GB (1) | GB2289353B (ja) |
IL (1) | IL113153A (ja) |
IN (1) | IN190632B (ja) |
MY (1) | MY113751A (ja) |
RU (1) | RU2137183C1 (ja) |
TW (1) | TW242184B (ja) |
WO (1) | WO1995030188A1 (ja) |
Families Citing this family (86)
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GB2290395B (en) | 1994-06-10 | 1997-05-28 | Advanced Risc Mach Ltd | Interoperability with multiple instruction sets |
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US6408386B1 (en) | 1995-06-07 | 2002-06-18 | Intel Corporation | Method and apparatus for providing event handling functionality in a computer system |
US5774686A (en) * | 1995-06-07 | 1998-06-30 | Intel Corporation | Method and apparatus for providing two system architectures in a processor |
US5867681A (en) * | 1996-05-23 | 1999-02-02 | Lsi Logic Corporation | Microprocessor having register dependent immediate decompression |
GB2349252B (en) * | 1996-06-10 | 2001-02-14 | Lsi Logic Corp | An apparatus and method for detecting and decompressing instructions from a variable-length compressed instruction set |
US5794010A (en) * | 1996-06-10 | 1998-08-11 | Lsi Logic Corporation | Method and apparatus for allowing execution of both compressed instructions and decompressed instructions in a microprocessor |
WO1997048041A1 (en) * | 1996-06-10 | 1997-12-18 | Lsi Logic Corporation | An apparatus and method for detecting and decompressing instructions from a variable-length compressed instruction set |
US5896519A (en) * | 1996-06-10 | 1999-04-20 | Lsi Logic Corporation | Apparatus for detecting instructions from a variable-length compressed instruction set having extended and non-extended instructions |
US5905893A (en) * | 1996-06-10 | 1999-05-18 | Lsi Logic Corporation | Microprocessor adapted for executing both a non-compressed fixed length instruction set and a compressed variable length instruction set |
EP0833246B1 (en) * | 1996-09-27 | 2014-11-26 | Texas Instruments Incorporated | A method of producing a computer program |
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US7076771B2 (en) | 2000-12-01 | 2006-07-11 | Arm Limited | Instruction interpretation within a data processing system |
US7711926B2 (en) * | 2001-04-18 | 2010-05-04 | Mips Technologies, Inc. | Mapping system and method for instruction set processing |
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US8769508B2 (en) | 2001-08-24 | 2014-07-01 | Nazomi Communications Inc. | Virtual machine hardware for RISC and CISC processors |
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US7493470B1 (en) | 2001-12-07 | 2009-02-17 | Arc International, Plc | Processor apparatus and methods optimized for control applications |
US7278137B1 (en) | 2001-12-26 | 2007-10-02 | Arc International | Methods and apparatus for compiling instructions for a data processor |
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US7930526B2 (en) | 2004-03-24 | 2011-04-19 | Arm Limited | Compare and branch mechanism |
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US7650453B2 (en) * | 2004-09-16 | 2010-01-19 | Nec Corporation | Information processing apparatus having multiple processing units sharing multiple resources |
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US8832679B2 (en) * | 2007-08-28 | 2014-09-09 | Red Hat, Inc. | Registration process for determining compatibility with 32-bit or 64-bit software |
US9652210B2 (en) * | 2007-08-28 | 2017-05-16 | Red Hat, Inc. | Provisioning a device with multiple bit-size versions of a software component |
US8037286B2 (en) * | 2008-01-23 | 2011-10-11 | Arm Limited | Data processing apparatus and method for instruction pre-decoding |
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US8347067B2 (en) * | 2008-01-23 | 2013-01-01 | Arm Limited | Instruction pre-decoding of multiple instruction sets |
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US9274796B2 (en) * | 2009-05-11 | 2016-03-01 | Arm Finance Overseas Limited | Variable register and immediate field encoding in an instruction set architecture |
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CN102360281B (zh) * | 2011-10-31 | 2014-04-02 | 中国人民解放军国防科学技术大学 | 用于微处理器的多功能定点乘加单元mac运算装置 |
US9875108B2 (en) * | 2013-03-16 | 2018-01-23 | Intel Corporation | Shared memory interleavings for instruction atomicity violations |
US9965320B2 (en) | 2013-12-27 | 2018-05-08 | Intel Corporation | Processor with transactional capability and logging circuitry to report transactional operations |
US9582295B2 (en) | 2014-03-18 | 2017-02-28 | International Business Machines Corporation | Architectural mode configuration |
US9916185B2 (en) | 2014-03-18 | 2018-03-13 | International Business Machines Corporation | Managing processing associated with selected architectural facilities |
KR102180972B1 (ko) * | 2014-04-23 | 2020-11-20 | 에스케이하이닉스 주식회사 | 메모리 컨트롤 유닛 및 그것을 포함하는 데이터 저장 장치 |
CN104991759B (zh) * | 2015-07-28 | 2018-01-16 | 成都腾悦科技有限公司 | 一种可变指令集微处理器及其实现方法 |
US10007520B1 (en) * | 2016-02-25 | 2018-06-26 | Jpmorgan Chase Bank, N.A. | Systems and methods for using alternate computer instruction sets |
US10120688B2 (en) | 2016-11-15 | 2018-11-06 | Andes Technology Corporation | Data processing system and method for executing block call and block return instructions |
CN111090465B (zh) * | 2019-12-19 | 2022-08-19 | 四川长虹电器股份有限公司 | 一种rv32ic指令集的译码系统及其译码方法 |
Family Cites Families (18)
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JPS5317240A (en) * | 1976-07-31 | 1978-02-17 | Toshiba Corp | Controller |
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-
1994
- 1994-05-03 GB GB9408765A patent/GB2289353B/en not_active Expired - Lifetime
- 1994-09-03 TW TW083108133A patent/TW242184B/zh not_active IP Right Cessation
-
1995
- 1995-02-13 IN IN219DE1995 patent/IN190632B/en unknown
- 1995-02-15 KR KR1020017002524A patent/KR100327776B1/ko active IP Right Grant
- 1995-02-15 EP EP97202499A patent/EP0813144B1/en not_active Expired - Lifetime
- 1995-02-15 CN CN95192870A patent/CN1089460C/zh not_active Expired - Lifetime
- 1995-02-15 KR KR1019960706181A patent/KR100315739B1/ko active IP Right Grant
- 1995-02-15 DE DE69502098T patent/DE69502098T2/de not_active Expired - Lifetime
- 1995-02-15 JP JP52804395A patent/JP3173793B2/ja not_active Expired - Lifetime
- 1995-02-15 EP EP02080029A patent/EP1296225A3/en not_active Withdrawn
- 1995-02-15 RU RU96118491A patent/RU2137183C1/ru not_active IP Right Cessation
- 1995-02-15 WO PCT/GB1995/000315 patent/WO1995030188A1/en active IP Right Grant
- 1995-02-15 DE DE69530520T patent/DE69530520T2/de not_active Expired - Lifetime
- 1995-02-15 EP EP95908327A patent/EP0758464B1/en not_active Expired - Lifetime
- 1995-02-27 MY MYPI95000491A patent/MY113751A/en unknown
- 1995-03-27 IL IL11315395A patent/IL113153A/en not_active IP Right Cessation
-
1996
- 1996-10-22 US US08/735,046 patent/US5740461A/en not_active Expired - Lifetime
-
1999
- 1999-11-02 CN CNB011435283A patent/CN1174313C/zh not_active Expired - Lifetime
-
2000
- 2000-11-30 JP JP2000365503A patent/JP2002366348A/ja active Pending
-
2005
- 2005-12-05 JP JP2005350864A patent/JP2006079652A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
DE69502098D1 (de) | 1998-05-20 |
JPH09512652A (ja) | 1997-12-16 |
EP1296225A3 (en) | 2007-07-25 |
JP3173793B2 (ja) | 2001-06-04 |
KR970703011A (ko) | 1997-06-10 |
CN1395168A (zh) | 2003-02-05 |
EP1296225A2 (en) | 2003-03-26 |
WO1995030188A1 (en) | 1995-11-09 |
DE69502098T2 (de) | 1998-08-06 |
CN1089460C (zh) | 2002-08-21 |
JP2002366348A (ja) | 2002-12-20 |
EP0813144A2 (en) | 1997-12-17 |
TW242184B (en) | 1995-03-01 |
DE69530520T2 (de) | 2003-12-24 |
CN1174313C (zh) | 2004-11-03 |
EP0813144A3 (en) | 1998-01-14 |
GB2289353B (en) | 1997-08-27 |
GB2289353A (en) | 1995-11-15 |
JP2006079652A (ja) | 2006-03-23 |
MY113751A (en) | 2002-05-31 |
KR100327776B1 (ko) | 2002-03-15 |
KR100315739B1 (ko) | 2002-02-28 |
IL113153A0 (en) | 1995-06-29 |
CN1147307A (zh) | 1997-04-09 |
RU2137183C1 (ru) | 1999-09-10 |
IN190632B (ja) | 2003-08-16 |
EP0758464B1 (en) | 1998-04-15 |
GB9408765D0 (en) | 1994-06-22 |
DE69530520D1 (de) | 2003-05-28 |
US5740461A (en) | 1998-04-14 |
EP0758464A1 (en) | 1997-02-19 |
EP0813144B1 (en) | 2003-04-23 |
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