IE911057A1 - Level converter - Google Patents
Level converterInfo
- Publication number
- IE911057A1 IE911057A1 IE105791A IE105791A IE911057A1 IE 911057 A1 IE911057 A1 IE 911057A1 IE 105791 A IE105791 A IE 105791A IE 105791 A IE105791 A IE 105791A IE 911057 A1 IE911057 A1 IE 911057A1
- Authority
- IE
- Ireland
- Prior art keywords
- level converter
- connection
- preamplifier
- emitter
- transistor
- Prior art date
Links
- 230000000295 complement effect Effects 0.000 claims abstract description 9
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 230000001143 conditioned effect Effects 0.000 abstract 1
- 238000010276 construction Methods 0.000 description 3
- 230000001419 dependent effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
- H03K19/017518—Interface arrangements using a combination of bipolar and field effect transistors [BIFET]
- H03K19/017527—Interface arrangements using a combination of bipolar and field effect transistors [BIFET] with at least one differential stage
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Amplifiers (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19904010145 DE4010145C1 (enrdf_load_stackoverflow) | 1990-03-29 | 1990-03-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| IE911057A1 true IE911057A1 (en) | 1991-10-09 |
Family
ID=6403348
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IE105791A IE911057A1 (en) | 1990-03-29 | 1991-03-28 | Level converter |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP0451365A3 (enrdf_load_stackoverflow) |
| JP (1) | JPH07131331A (enrdf_load_stackoverflow) |
| DE (1) | DE4010145C1 (enrdf_load_stackoverflow) |
| IE (1) | IE911057A1 (enrdf_load_stackoverflow) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4127212A1 (de) * | 1991-08-16 | 1993-02-18 | Licentia Gmbh | Schaltungsanordnung zur pegelumsetzung |
| JP2839047B2 (ja) * | 1991-10-25 | 1998-12-16 | 日本電気株式会社 | 半導体回路 |
| JP2765346B2 (ja) * | 1992-03-18 | 1998-06-11 | 三菱電機株式会社 | バイモス増幅装置 |
| US5304869A (en) * | 1992-04-17 | 1994-04-19 | Intel Corporation | BiCMOS digital amplifier |
| DE69223776T2 (de) * | 1992-06-26 | 1998-07-16 | Discovision Associates, Irvine, Calif. | Logikausgangstreiber |
| DE4227282C1 (de) * | 1992-08-18 | 1993-11-25 | Siemens Ag | Digitaler Stromschalter |
| JPH06104704A (ja) * | 1992-09-18 | 1994-04-15 | Mitsubishi Electric Corp | 半導体集積回路装置の入力回路 |
| DE4307856C2 (de) * | 1993-03-12 | 1995-10-19 | Telefunken Microelectron | Schaltungsanordnung |
| JP2546489B2 (ja) * | 1993-04-23 | 1996-10-23 | 日本電気株式会社 | レベル変換回路 |
| JP3019668B2 (ja) * | 1993-05-21 | 2000-03-13 | 日本電気株式会社 | 半導体論理回路 |
| US5789941A (en) * | 1995-03-29 | 1998-08-04 | Matra Mhs | ECL level/CMOS level logic signal interfacing device |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6119226A (ja) * | 1984-07-05 | 1986-01-28 | Hitachi Ltd | レベル変換回路 |
| US4855624A (en) * | 1988-02-02 | 1989-08-08 | National Semiconductor Corporation | Low-power bipolar-CMOS interface circuit |
| JPH06330020A (ja) * | 1993-05-20 | 1994-11-29 | Nippon Shokubai Co Ltd | キレート性組成物及びその製法並びに洗剤組成物 |
-
1990
- 1990-03-29 DE DE19904010145 patent/DE4010145C1/de not_active Expired - Fee Related
- 1990-12-21 EP EP19900125296 patent/EP0451365A3/de not_active Withdrawn
-
1991
- 1991-03-27 JP JP3089648A patent/JPH07131331A/ja not_active Withdrawn
- 1991-03-28 IE IE105791A patent/IE911057A1/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| EP0451365A2 (de) | 1991-10-16 |
| DE4010145C1 (enrdf_load_stackoverflow) | 1991-01-03 |
| EP0451365A3 (en) | 1991-11-06 |
| JPH07131331A (ja) | 1995-05-19 |
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