HUE043506T2 - Programozható teljesítmény memóriainterfészhez - Google Patents
Programozható teljesítmény memóriainterfészhezInfo
- Publication number
- HUE043506T2 HUE043506T2 HUE15725168A HUE15725168A HUE043506T2 HU E043506 T2 HUE043506 T2 HU E043506T2 HU E15725168 A HUE15725168 A HU E15725168A HU E15725168 A HUE15725168 A HU E15725168A HU E043506 T2 HUE043506 T2 HU E043506T2
- Authority
- HU
- Hungary
- Prior art keywords
- memory interface
- programmable power
- programmable
- power
- interface
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1066—Output synchronization
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/1093—Input synchronization
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/0805—Details of the phase-locked loop the loop being adapted to provide an additional control signal for use outside the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Pulse Circuits (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/298,730 US9443572B2 (en) | 2014-06-06 | 2014-06-06 | Programmable power for a memory interface |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| HUE043506T2 true HUE043506T2 (hu) | 2019-08-28 |
Family
ID=53268893
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| HUE15725168A HUE043506T2 (hu) | 2014-06-06 | 2015-05-11 | Programozható teljesítmény memóriainterfészhez |
Country Status (11)
| Country | Link |
|---|---|
| US (1) | US9443572B2 (hu) |
| EP (1) | EP3152762B1 (hu) |
| JP (1) | JP2017517077A (hu) |
| KR (1) | KR20170015909A (hu) |
| CN (1) | CN106663462B (hu) |
| BR (1) | BR112016028400A2 (hu) |
| CA (1) | CA2949492A1 (hu) |
| ES (1) | ES2713443T3 (hu) |
| HU (1) | HUE043506T2 (hu) |
| TW (1) | TW201610993A (hu) |
| WO (1) | WO2015187308A1 (hu) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9520864B2 (en) * | 2014-06-06 | 2016-12-13 | Qualcomm Incorporated | Delay structure for a memory interface |
| KR102248279B1 (ko) * | 2014-06-13 | 2021-05-07 | 삼성전자주식회사 | 불휘발성 메모리 및 메모리 컨트롤러를 포함하는 스토리지 장치, 그리고 불휘발성 메모리 및 메모리 컨트롤러 사이의 통신을 중개하는 리타이밍 회로의 동작 방법 |
| US10177751B2 (en) * | 2016-05-27 | 2019-01-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Delay line with short recovery time |
| CN112953530B (zh) * | 2021-01-28 | 2024-02-23 | 星宸科技股份有限公司 | 除频器电路 |
| JP2022146532A (ja) * | 2021-03-22 | 2022-10-05 | キオクシア株式会社 | メモリシステム及び遅延制御方法 |
| US11171654B1 (en) * | 2021-05-13 | 2021-11-09 | Qualcomm Incorporated | Delay locked loop with segmented delay circuit |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6247138B1 (en) * | 1997-06-12 | 2001-06-12 | Fujitsu Limited | Timing signal generating circuit, semiconductor integrated circuit device and semiconductor integrated circuit system to which the timing signal generating circuit is applied, and signal transmission system |
| ID26398A (id) | 1998-03-16 | 2000-12-21 | Jazio Inc | Pensinyalan kecepatan tinggi untuk antar-muka sirkuit vlsi cmos |
| JP4190662B2 (ja) * | 1999-06-18 | 2008-12-03 | エルピーダメモリ株式会社 | 半導体装置及びタイミング制御回路 |
| JP2001250382A (ja) * | 2000-03-03 | 2001-09-14 | Hitachi Ltd | クロック再生回路 |
| US6859109B1 (en) | 2003-05-27 | 2005-02-22 | Pericom Semiconductor Corp. | Double-data rate phase-locked-loop with phase aligners to reduce clock skew |
| JP4667196B2 (ja) * | 2005-10-12 | 2011-04-06 | パナソニック株式会社 | 位相調整回路 |
| US9237000B2 (en) | 2006-06-19 | 2016-01-12 | Intel Corporation | Transceiver clock architecture with transmit PLL and receive slave delay lines |
| KR100839499B1 (ko) * | 2006-12-22 | 2008-06-19 | 삼성전자주식회사 | 딜레이 제어 장치 및 방법 |
| US7746135B2 (en) * | 2007-09-29 | 2010-06-29 | Intel Corporation | Wake-up circuit |
| US7795935B2 (en) * | 2007-09-29 | 2010-09-14 | Intel Corporation | Bias signal delivery |
| TWI362836B (en) | 2008-08-08 | 2012-04-21 | Etron Technology Inc | Dll with power-saving function |
| KR20100097927A (ko) | 2009-02-27 | 2010-09-06 | 삼성전자주식회사 | 지연 동기 루프 및 이를 포함하는 전자 장치 |
| CN101713994B (zh) * | 2009-12-03 | 2011-09-21 | 陕西北人印刷机械有限责任公司 | 印刷机在线生产信息管理系统及其方法 |
| US9342095B2 (en) | 2011-03-02 | 2016-05-17 | Rambus Inc. | Timing calibration for multimode I/O systems |
| US8624645B2 (en) * | 2011-08-15 | 2014-01-07 | Nanya Technology Corp. | Multi phase clock signal generator, signal phase adjusting loop utilizing the multi phase clock signal generator, and multi phase clock signal generating method |
| US9041464B2 (en) | 2011-09-16 | 2015-05-26 | Qualcomm Incorporated | Circuitry for reducing power consumption |
| US9160350B2 (en) | 2011-11-15 | 2015-10-13 | Rambus Inc. | Integrated circuit comprising a delay-locked loop |
| US8836394B2 (en) | 2012-03-26 | 2014-09-16 | Rambus Inc. | Method and apparatus for source-synchronous signaling |
-
2014
- 2014-06-06 US US14/298,730 patent/US9443572B2/en active Active
-
2015
- 2015-05-11 BR BR112016028400A patent/BR112016028400A2/pt not_active IP Right Cessation
- 2015-05-11 HU HUE15725168A patent/HUE043506T2/hu unknown
- 2015-05-11 CN CN201580029466.7A patent/CN106663462B/zh active Active
- 2015-05-11 WO PCT/US2015/030214 patent/WO2015187308A1/en active Application Filing
- 2015-05-11 EP EP15725168.7A patent/EP3152762B1/en active Active
- 2015-05-11 KR KR1020167033909A patent/KR20170015909A/ko unknown
- 2015-05-11 JP JP2016570976A patent/JP2017517077A/ja active Pending
- 2015-05-11 CA CA2949492A patent/CA2949492A1/en not_active Abandoned
- 2015-05-11 ES ES15725168T patent/ES2713443T3/es active Active
- 2015-05-20 TW TW104116143A patent/TW201610993A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| TW201610993A (zh) | 2016-03-16 |
| US20150357017A1 (en) | 2015-12-10 |
| EP3152762A1 (en) | 2017-04-12 |
| ES2713443T3 (es) | 2019-05-21 |
| JP2017517077A (ja) | 2017-06-22 |
| CN106663462B (zh) | 2019-05-03 |
| WO2015187308A1 (en) | 2015-12-10 |
| CA2949492A1 (en) | 2015-12-10 |
| BR112016028400A2 (pt) | 2017-08-22 |
| CN106663462A (zh) | 2017-05-10 |
| EP3152762B1 (en) | 2019-01-02 |
| KR20170015909A (ko) | 2017-02-10 |
| US9443572B2 (en) | 2016-09-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| HK1214981A1 (zh) | 微型加濕器 | |
| EP3213157C0 (en) | USING VIRTUAL SENSORS IN A PROGRAMMABLE LOGIC CONTROLLER | |
| IL249868A0 (en) | method | |
| GB2525904B (en) | Memory unit | |
| PT3107946T (pt) | Poliiso-ureia | |
| GB201421287D0 (en) | A pack | |
| HUE043506T2 (hu) | Programozható teljesítmény memóriainterfészhez | |
| GB201418281D0 (en) | A pack | |
| PL3142493T3 (pl) | Zaawansowane formowanie gum do żucia | |
| GB201700708D0 (en) | A package | |
| GB201400671D0 (en) | A tool container | |
| GB201819227D0 (en) | A memory unit | |
| GB2530839B (en) | A tunnel plug | |
| GB201700709D0 (en) | A package | |
| GB201416345D0 (en) | A pack | |
| TWM490681U (en) | A power supply socket | |
| HK1213095A1 (zh) | 種供電裝置 | |
| GB201402247D0 (en) | A footgauge | |
| GB201511682D0 (en) | A case | |
| GB201506301D0 (en) | A lead | |
| GB201417786D0 (en) | A jig | |
| GB201400680D0 (en) | A tool container | |
| GB2526933B (en) | Plug insert for a power plug | |
| GB2525143B (en) | A generator | |
| GB201411663D0 (en) | A tool |