HU193521B - Circuit arrangement for maximum utilization of real-time operated computers - Google Patents
Circuit arrangement for maximum utilization of real-time operated computers Download PDFInfo
- Publication number
- HU193521B HU193521B HU239782A HU239782A HU193521B HU 193521 B HU193521 B HU 193521B HU 239782 A HU239782 A HU 239782A HU 239782 A HU239782 A HU 239782A HU 193521 B HU193521 B HU 193521B
- Authority
- HU
- Hungary
- Prior art keywords
- time
- real
- circuit arrangement
- programs
- maximum utilization
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
- G06F9/4825—Interrupt from clock, e.g. time of day
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Hardware Redundancy (AREA)
- Control By Computers (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DD23212181A DD209367A3 (de) | 1981-07-27 | 1981-07-27 | Schaltungsanordnung zur maximalen auslastung von recheneinheiten bei zeitscheibengesteuerter mehrprogrammbearbeitung |
Publications (1)
Publication Number | Publication Date |
---|---|
HU193521B true HU193521B (en) | 1987-10-28 |
Family
ID=5532609
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
HU239782A HU193521B (en) | 1981-07-27 | 1982-07-26 | Circuit arrangement for maximum utilization of real-time operated computers |
Country Status (3)
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19527541A1 (de) * | 1995-07-27 | 1997-01-30 | Siemens Ag | Vorrichtung zur Erzeugung von Steuersignalen |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3913070A (en) * | 1973-02-20 | 1975-10-14 | Memorex Corp | Multi-processor data processing system |
DE2555963C2 (de) * | 1975-12-12 | 1982-10-28 | Ibm Deutschland Gmbh, 7000 Stuttgart | Einrichtung zur Funktionsmodifizierung |
-
1981
- 1981-07-27 DD DD23212181A patent/DD209367A3/de not_active IP Right Cessation
-
1982
- 1982-06-25 DE DE19823223678 patent/DE3223678A1/de active Granted
- 1982-07-26 HU HU239782A patent/HU193521B/hu not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE3223678C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1991-10-02 |
DE3223678A1 (de) | 1983-02-17 |
DD209367A3 (de) | 1984-04-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
HU90 | Patent valid on 900628 | ||
HMM4 | Cancellation of final prot. due to non-payment of fee |