HRP20210855T1 - Postupak i uređaj za kodiranje i dekodiranje kanala u komunikacijskom sustavu korištenjem koda za provjeru pariteta niske gustoće - Google Patents
Postupak i uređaj za kodiranje i dekodiranje kanala u komunikacijskom sustavu korištenjem koda za provjeru pariteta niske gustoće Download PDFInfo
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- HRP20210855T1 HRP20210855T1 HRP20210855TT HRP20210855T HRP20210855T1 HR P20210855 T1 HRP20210855 T1 HR P20210855T1 HR P20210855T T HRP20210855T T HR P20210855TT HR P20210855 T HRP20210855 T HR P20210855T HR P20210855 T1 HRP20210855 T1 HR P20210855T1
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- 238000000034 method Methods 0.000 title claims 5
- 239000011159 matrix material Substances 0.000 claims 9
- 238000004080 punching Methods 0.000 claims 5
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
- H03M13/1188—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/618—Shortening and extension of codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0067—Rate matching
- H04L1/0068—Rate matching by puncturing
- H04L1/0069—Puncturing patterns
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Multimedia (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Claims (6)
1. Postupak probijanja barem jednog paritetnog bita prilikom provjere pariteta niske gustoće, LDPC, koda, putem prijamnika gdje je LDPC kod dobiven LDPC kodiranjem upotrebom matrice provjere pariteta unaprijed određene strukture, koja struktura je jednaka onoj definiranoj u DVB-S2 Standardu i ima duljinu N1, dio informacije s duljinom informacije K1, i paritetni dio s paritetom duljine (N1-K1),
gdje dijelovi informacija matrice provjere pariteta imaju strukturu prema jednadžbi:
[image]
gdje:
K = 1,2, ….., Di, i = 1, ….. K1IM1, j = 1, ….., M1-1
i = indeks i-te grupe stupaca;
j = indeks j-tog stupca iz grupe stupaca;
q = (N1-K1)/M1;
M1 = broj stupaca iz grupe stupaca;
Di = stupanj, tj. broj unosa ne-nula, svakog 0-tog stupca u svakoj i-toj grupi stupaca;
[image]
= položaj redova s vrijednostima 1 u 0-tom stupcu u svakoj i-toj grupi stupaca; i
[image]
= položaj redova s vrijednostima 1 u j-tom stupcu u i-toj grupi stupaca;
naznačen time da paritetni bitovi LDPC koda su podijeljeni na q bitove paritetnog bita prema jednadžbi:
[image]
gdje
Pj označava j-ti bit paritetnog bita,
pk označava k-ti paritetni bit,
0 ≤ j < q,
koji postupak dalje ime korake:
određivanja broja probijanja paritetnih bitova Np;
određivanje broja m bita paritetnih bitova u kojem su svi bitovi probijeni prema broju paritetnih bitova koji trebaju biti probijeni; i
probijanja svih paritetnih bitova m bita paritetnih bitova Pπ(0), Pπ(1), ..., Pπ(m-i) od q bitova paritetnih bitova Pjprema uzorku probijanja, gdje se uzorak probijanja određuje brzinom koda K1IN1 LDPC koda povezanog s matricom provjere pariteta, i indeksima π (0), ..., π(m-1) koji odgovaraju m bitovima paritetnih bitova Pπ(0), Pπ(1), ..., Pπ(m-i),
pri čemu je brzina koda K1IN1 = 1/5, N1 = 16200, K1 = 3240, M1 = 360 i , i q=36, i obrazac probijanja je definiran sljedećom tablicom:
[image]
2. Postupak temeljem zahtjeva 1, naznačen time da se (Np-360m) bitovi između bitova pariteta koji odgovaraju Pπ(m) dodatno probijaju.
3. Uređaj podešen za probijanje barem jednog paritetnog bita prilikom provjere pariteta niske gustoće, LDPC, koda, naznačen time da je LDPC kod je dobiven LDPC kodiranjem upotrebom matrice provjere pariteta unaprijed određene strukture, koja struktura je jednaka onoj definiranoj u DVB-S2 Standardu i ima duljinu N1, dio informacije s duljinom informacije K1, i paritetni dio s paritetom duljine (N1-K1),
dijelovi informacija matrice provjere pariteta imaju strukturu prema jednadžbi:
[image]
gdje:
K = 1,2, ….., Di, i = 1, ….. K1IM1, j = 1, ….., M1-1
i = indeks i-te grupe stupaca;
j = indeks j-tog stupca iz grupe stupaca;
q = (N1-K1)/M1;
M1 = broj stupaca iz grupe stupaca;
Di = stupanj, tj. broj unosa ne-nula, svakog 0-tog stupca u svakoj i-toj grupi stupaca;
[image]
= položaj redova s vrijednostima 1 u 0-tom stupcu u svakoj i-toj grupi stupaca; i
[image]
= položaj redova s vrijednostima 1 u j-tom stupcu u i-toj grupi stupaca;
gdje paritetni bitovi LDPC koda su podijeljeni na q bitove paritetnog bita prema jednadžbi:
[image]
gdje
Pj označava j-ti bit paritetnog bita,
pk označava k-ti paritetni bit,
0 ≤ j < q,
uređaj dalje sadrži: aplikator uzorka probijanja podešen da:
određuje broj probijanja paritetnih bitova Np;
određuje broja m bita paritetnih bitova u kojem su svi bitovi probijeni prema broju paritetnih bitova koji trebaju biti probijeni; i
probijanja svih paritetnih bitova m bita paritetnih bitova Pπ(0), Pπ(1), ..., Pπ(m-i) od q bitova paritetnih bitova Pj prema uzorku probijanja, gdje se uzorak probijanja određuje brzinom koda K1IN1 LDPC koda povezanog s matricom provjere pariteta, i indeksima π (0), ..., π(m-1) koji odgovaraju m bitovima paritetnih bitova Pπ(0), Pπ(1), ..., Pπ(m-i),
pri čemu je brzina koda K1IN1 = 1/5, N1 = 16200, K1 = 3240, M1 = 360 i , i q=36, i obrazac probijanja je definiran sljedećom tablicom:
[image]
4. Uređaj temeljem zahtjeva 3, naznačen time da su (Np-360m) bitovi pariteta između bitova pariteta koji odgovaraju Pπ(m) dodatno probušeni.
5. Uređaj podešen za dekodiranje podataka u sustavu za emitiranje, koji sadrži:
demodulator prijamnog signala, koji signal uključuje podatke koda za provjeru pariteta niske gustoće, LDPC, kod, pri čemu se LDPC kod dobiva LDPC kodiranjem pomoću matrice provjere pariteta unaprijed određene strukture, koja struktura je jednaka onoj definiranoj u DVB- S2 Standardu i ima duljinu N1, dio informacije s duljinom informacije K1, i paritetni dio s paritetom duljine (N1-K1);
dijelovi informacija matrice provjere pariteta imaju strukturu prema jednadžbi:
[image]
gdje:
K = 1,2, ….., Di, i = 1, ….. K1IM1, j = 1, ….., M1-1
i = indeks i-te grupe stupaca;
j = indeks j-tog stupca iz grupe stupaca;
q = (N1-K1)/M1;
M1 = broj stupaca iz grupe stupaca;
Di = stupanj, tj. broj unosa ne-nula, svakog 0-tog stupca u svakoj i-toj grupi stupaca;
[image]
= položaj redova s vrijednostima 1 u 0-tom stupcu u svakoj i-toj grupi stupaca; i
[image]
= položaj redova s vrijednostima 1 u j-tom stupcu u i-toj grupi stupaca;
jedinicu za određivanje uzorka probijanja podešenu da:
određuje broj probijanja iz demoduliranog signala; i
određuje pozicijske informacije za probijene paritetne bitove temeljem uzorka probijanja; i
LDPC dekoder podešen za LDPC dekodiranje podataka u demoduliranom signalu prema pozicijskim informacijama naznačen time da se obrazac probijanja određuje temeljem brzine koda K1IN1od LDPC koda povezanog s matricom provjere pariteta, informacije o položaju za probijene bitove povezane su s m skupovima bitova pariteta od q bitova paritetnih,
pri čemu su q bitovi paritetnog bita definirani kao:
[image]
gdje
Pj označava j-ti bit paritetnog bita,
pk označava k-ti paritetni bit,
0 ≤ j < q,
pri čemu je obrazac probijanja povezan s indeksima π (0), ..., π(m-1) koji odgovaraju m skupovima bita pariteta Pπ(0), Pπ(1), ..., Pπ(m-i),u kojem su svi bitovi pariteta probijeni, pri čemu
[image]
Np je broj punktiranih bitova pariteta,
gdje je brzina koda K1IN1 = 1/5, N1 = 16200, K1 = 3240, M1 = 360 i q=36, i obrazac probijanja je definiran sljedećom tablicom:
[image]
6. Postupak temeljem zahtjeva 5, naznačen time da indeks π(m) odgovara Pπ(m). Pri čemu (Np-360m) bitovi pariteta su dodatno probijeni.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR20080012392 | 2008-02-11 | ||
| KR1020080023846A KR101502623B1 (ko) | 2008-02-11 | 2008-03-14 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널부호/복호 방법 및 장치 |
| EP12188084.3A EP2582054B1 (en) | 2008-02-11 | 2009-02-11 | Method and apparatus for channel encoding and decoding in a communication system using low-density parity-check codes |
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| HRP20210855T1 true HRP20210855T1 (hr) | 2021-07-09 |
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| Application Number | Title | Priority Date | Filing Date |
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| HRP20210167TT HRP20210167T1 (hr) | 2008-02-11 | 2021-02-01 | Postupak i uređaj za kodiranje i dekodiranje kanala u komunikacijskom sustavu korištenjem koda za provjeru pariteta niske gustoće |
| HRP20210855TT HRP20210855T1 (hr) | 2008-02-11 | 2021-05-28 | Postupak i uređaj za kodiranje i dekodiranje kanala u komunikacijskom sustavu korištenjem koda za provjeru pariteta niske gustoće |
| HRP20210856TT HRP20210856T1 (hr) | 2008-02-11 | 2021-05-28 | Postupak i uređaj za kodiranje i dekodiranje kanala u komunikacijskom sustavu korištenjem koda za provjeru pariteta niske gustoće |
| HRP20210976TT HRP20210976T1 (hr) | 2008-02-11 | 2021-06-18 | Postupak i uređaj za kodiranje i dekodiranje kanala u komunikacijskom sustavu pomoću kodova za provjeru parnosti male gustoće |
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| HRP20210167TT HRP20210167T1 (hr) | 2008-02-11 | 2021-02-01 | Postupak i uređaj za kodiranje i dekodiranje kanala u komunikacijskom sustavu korištenjem koda za provjeru pariteta niske gustoće |
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| HRP20210856TT HRP20210856T1 (hr) | 2008-02-11 | 2021-05-28 | Postupak i uređaj za kodiranje i dekodiranje kanala u komunikacijskom sustavu korištenjem koda za provjeru pariteta niske gustoće |
| HRP20210976TT HRP20210976T1 (hr) | 2008-02-11 | 2021-06-18 | Postupak i uređaj za kodiranje i dekodiranje kanala u komunikacijskom sustavu pomoću kodova za provjeru parnosti male gustoće |
Country Status (20)
| Country | Link |
|---|---|
| US (1) | US8286065B2 (hr) |
| EP (6) | EP2557694B1 (hr) |
| JP (2) | JP5506099B2 (hr) |
| KR (1) | KR101502623B1 (hr) |
| CN (2) | CN103281157B (hr) |
| AU (1) | AU2009213247B2 (hr) |
| CY (4) | CY1123813T1 (hr) |
| DK (4) | DK2557694T3 (hr) |
| ES (4) | ES2871173T3 (hr) |
| HR (4) | HRP20210167T1 (hr) |
| HU (4) | HUE052900T2 (hr) |
| LT (4) | LT2557694T (hr) |
| MY (2) | MY171996A (hr) |
| PL (4) | PL2582054T3 (hr) |
| PT (4) | PT2582054T (hr) |
| RU (1) | RU2439793C1 (hr) |
| SG (2) | SG10201400710UA (hr) |
| SI (4) | SI2557694T1 (hr) |
| TW (2) | TWI384766B (hr) |
| WO (1) | WO2009102146A2 (hr) |
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| KR101503058B1 (ko) * | 2008-02-26 | 2015-03-18 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서의 채널 부호화/복호화 방법 및 장치 |
| US8276053B2 (en) * | 2009-11-08 | 2012-09-25 | Mediatek Inc. | Decoding circuit operating in response to decoded result and/or a plurality of viterbi target levels with pattern dependency |
| CA2818126C (en) * | 2010-12-03 | 2018-06-19 | Samsung Electronics Co., Ltd. | Apparatus and method for transmitting and receiving data in communication system |
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| KR101865068B1 (ko) * | 2011-03-30 | 2018-06-08 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 시스템에서 신호 맵핑/디맵핑 장치 및 방법 |
| WO2013032156A1 (en) | 2011-08-30 | 2013-03-07 | Samsung Electronics Co., Ltd. | Method and apparatus for transmitting and receiving information in a broadcasting/communication system |
| KR101922555B1 (ko) * | 2011-08-30 | 2018-11-28 | 삼성전자주식회사 | 방송/통신시스템에서 정보 송수신 방법 및 장치 |
| KR101791477B1 (ko) * | 2011-10-10 | 2017-10-30 | 삼성전자주식회사 | 통신/방송 시스템에서 데이터 송수신 장치 및 방법 |
| KR102015121B1 (ko) * | 2012-10-17 | 2019-08-28 | 삼성전자주식회사 | 불휘발성 메모리 장치를 제어하도록 구성되는 컨트롤러 및 컨트롤러의 동작 방법 |
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| CN111865497B (zh) * | 2015-02-25 | 2023-04-14 | 三星电子株式会社 | 发送器及其产生附加奇偶校验的方法 |
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