HK95791A - Integrated digital mos semiconductor circuit - Google Patents
Integrated digital mos semiconductor circuit Download PDFInfo
- Publication number
- HK95791A HK95791A HK957/91A HK95791A HK95791A HK 95791 A HK95791 A HK 95791A HK 957/91 A HK957/91 A HK 957/91A HK 95791 A HK95791 A HK 95791A HK 95791 A HK95791 A HK 95791A
- Authority
- HK
- Hong Kong
- Prior art keywords
- transistor
- gate
- output
- input
- mos field
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/46—Test trigger logic
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Logic Circuits (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19833318564 DE3318564A1 (de) | 1983-05-20 | 1983-05-20 | Integrierte digitale mos-halbleiterschaltung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| HK95791A true HK95791A (en) | 1991-12-06 |
Family
ID=6199587
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| HK957/91A HK95791A (en) | 1983-05-20 | 1991-11-28 | Integrated digital mos semiconductor circuit |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4588907A (cg-RX-API-DMAC7.html) |
| EP (1) | EP0127015B1 (cg-RX-API-DMAC7.html) |
| JP (1) | JPS59231794A (cg-RX-API-DMAC7.html) |
| AT (1) | ATE49078T1 (cg-RX-API-DMAC7.html) |
| DE (2) | DE3318564A1 (cg-RX-API-DMAC7.html) |
| HK (1) | HK95791A (cg-RX-API-DMAC7.html) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| ATE51316T1 (de) * | 1984-12-28 | 1990-04-15 | Siemens Ag | Integrierter halbleiterspeicher. |
| JPS61258399A (ja) * | 1985-05-11 | 1986-11-15 | Fujitsu Ltd | 半導体集積回路装置 |
| JPS6238599A (ja) * | 1985-08-13 | 1987-02-19 | Mitsubishi Electric Corp | 半導体記憶装置 |
| DE3681666D1 (de) * | 1985-09-11 | 1991-10-31 | Siemens Ag | Integrierter halbleiterspeicher. |
| JPS62293598A (ja) * | 1986-06-12 | 1987-12-21 | Toshiba Corp | 半導体記憶装置 |
| JPS6337269A (ja) * | 1986-08-01 | 1988-02-17 | Fujitsu Ltd | モ−ド選定回路 |
| KR910001534B1 (ko) * | 1986-09-08 | 1991-03-15 | 가부시키가이샤 도시바 | 반도체기억장치 |
| US4716302A (en) * | 1986-12-22 | 1987-12-29 | Motorola, Inc. | Identity circuit for an integrated circuit using a fuse and transistor enabled by a power-on reset signal |
| DE58903906D1 (de) * | 1988-02-10 | 1993-05-06 | Siemens Ag | Redundanzdekoder eines integrierten halbleiterspeichers. |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4071784A (en) * | 1976-11-12 | 1978-01-31 | Motorola, Inc. | MOS input buffer with hysteresis |
| NL7704005A (nl) * | 1977-04-13 | 1977-06-30 | Philips Nv | Geintegreerde schakeling. |
| US4350906A (en) * | 1978-06-23 | 1982-09-21 | Rca Corporation | Circuit with dual-purpose terminal |
| US4318013A (en) * | 1979-05-01 | 1982-03-02 | Motorola, Inc. | High voltage detection circuit |
| WO1982000930A1 (en) * | 1980-09-10 | 1982-03-18 | Plachno R | Delay stage for a clock generator |
| DE3044689C2 (de) * | 1980-11-27 | 1982-08-26 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Integrierte Schaltung mit nichtflüchtig programmierbaren Halbleiterspeichern |
| US4446534A (en) * | 1980-12-08 | 1984-05-01 | National Semiconductor Corporation | Programmable fuse circuit |
| US4480199A (en) * | 1982-03-19 | 1984-10-30 | Fairchild Camera & Instrument Corp. | Identification of repaired integrated circuits |
-
1983
- 1983-05-20 DE DE19833318564 patent/DE3318564A1/de not_active Withdrawn
-
1984
- 1984-05-04 DE DE8484105061T patent/DE3480887D1/de not_active Expired - Lifetime
- 1984-05-04 AT AT84105061T patent/ATE49078T1/de not_active IP Right Cessation
- 1984-05-04 EP EP84105061A patent/EP0127015B1/de not_active Expired
- 1984-05-14 US US06/610,092 patent/US4588907A/en not_active Expired - Lifetime
- 1984-05-17 JP JP59099663A patent/JPS59231794A/ja active Granted
-
1991
- 1991-11-28 HK HK957/91A patent/HK95791A/xx not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0454320B2 (cg-RX-API-DMAC7.html) | 1992-08-31 |
| US4588907A (en) | 1986-05-13 |
| EP0127015A3 (en) | 1987-09-30 |
| DE3480887D1 (de) | 1990-02-01 |
| JPS59231794A (ja) | 1984-12-26 |
| EP0127015A2 (de) | 1984-12-05 |
| ATE49078T1 (de) | 1990-01-15 |
| EP0127015B1 (de) | 1989-12-27 |
| DE3318564A1 (de) | 1984-11-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6031778A (en) | Semiconductor integrated circuit | |
| US7031216B2 (en) | Refresh controller with low peak current | |
| US6038189A (en) | Semiconductor device allowing external setting of internal power supply voltage generated by a voltage down converter at the time of testing | |
| US4712194A (en) | Static random access memory | |
| US4638182A (en) | High-level CMOS driver circuit | |
| US20050052936A1 (en) | High speed power-gating technique for integrated circuit devices incorporating a sleep mode of operation | |
| HK95791A (en) | Integrated digital mos semiconductor circuit | |
| US4641285A (en) | Line change-over circuit and semiconductor memory using the same | |
| US4451907A (en) | Pull-up circuit for a memory | |
| KR100257911B1 (ko) | 반도체 기억장치 | |
| US4730133A (en) | Decoder circuit of a semiconductor memory device | |
| US5777930A (en) | Test potential transfer circuit | |
| CA1065056A (en) | Memory cell | |
| US4379345A (en) | Dynamic read amplifier for metal-oxide-semiconductor memories | |
| US5539701A (en) | Sense circuit for semiconductor memory devices | |
| US5278788A (en) | Semiconductor memory device having improved controlling function for data buses | |
| US5019725A (en) | Input circuit | |
| US5901098A (en) | Ground noise isolation circuit for semiconductor memory device and method thereof | |
| US4870620A (en) | Dynamic random access memory device with internal refresh | |
| US5469385A (en) | Output buffer with boost from voltage supplies | |
| US4584670A (en) | Integrated dynamic write-read memory | |
| JP3926037B2 (ja) | ダイナミック型ram | |
| US6181610B1 (en) | Semiconductor device having current auxiliary circuit for output circuit | |
| US4857767A (en) | High-density low-power circuit for sustaining a precharge level | |
| EP0601207B1 (en) | Data read method and read only memory circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PC | Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee) |