HK5790A - Procedure and apparatus for conveying external input and output data to a processor system - Google Patents

Procedure and apparatus for conveying external input and output data to a processor system Download PDF

Info

Publication number
HK5790A
HK5790A HK57/90A HK5790A HK5790A HK 5790 A HK5790 A HK 5790A HK 57/90 A HK57/90 A HK 57/90A HK 5790 A HK5790 A HK 5790A HK 5790 A HK5790 A HK 5790A
Authority
HK
Hong Kong
Prior art keywords
output data
input
memories
processor system
procedure
Prior art date
Application number
HK57/90A
Other languages
English (en)
Inventor
Saaksjarvi Paavo
Lamberg Lauri
Original Assignee
Kone Elevator Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kone Elevator Gmbh filed Critical Kone Elevator Gmbh
Publication of HK5790A publication Critical patent/HK5790A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161—Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Multi Processors (AREA)
HK57/90A 1980-06-12 1990-01-25 Procedure and apparatus for conveying external input and output data to a processor system HK5790A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI801896A FI801896A7 (fi) 1980-06-12 1980-06-12 Menetelmä ja laitteisto ulkopuolisten tulo- ja lähtötietojen välittämiseksi prosessorijärjestelmään.

Publications (1)

Publication Number Publication Date
HK5790A true HK5790A (en) 1990-02-02

Family

ID=8513562

Family Applications (1)

Application Number Title Priority Date Filing Date
HK57/90A HK5790A (en) 1980-06-12 1990-01-25 Procedure and apparatus for conveying external input and output data to a processor system

Country Status (6)

Country Link
BE (1) BE889214A (enrdf_load_stackoverflow)
DE (1) DE3123379A1 (enrdf_load_stackoverflow)
FI (1) FI801896A7 (enrdf_load_stackoverflow)
FR (1) FR2484668B1 (enrdf_load_stackoverflow)
GB (1) GB2080582B (enrdf_load_stackoverflow)
HK (1) HK5790A (enrdf_load_stackoverflow)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2549621B1 (fr) * 1983-07-19 1988-09-16 Telecommunications Sa Systeme multiprocesseur pour communication des processeurs entre eux
US4713757A (en) * 1985-06-11 1987-12-15 Honeywell Inc. Data management equipment for automatic flight control systems having plural digital processors
DE4407571A1 (de) * 1994-03-07 1995-09-14 Siemens Ag System zur Verarbeitung von Daten einer technischen Anlage
JP3447432B2 (ja) * 1995-06-07 2003-09-16 三菱電機株式会社 ネットワークデータサーバ装置およびプログラマブルロジックコントローラシステム

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3753234A (en) * 1972-02-25 1973-08-14 Reliance Electric Co Multicomputer system with simultaneous data interchange between computers
US4006465A (en) * 1975-05-14 1977-02-01 International Business Machines Corporation Apparatus for control and data transfer between a serial data transmission medium and a plurality of devices
DE2546202A1 (de) * 1975-10-15 1977-04-28 Siemens Ag Rechnersystem aus mehreren miteinander verbundenen und zusammenwirkenden einzelrechnern und verfahren zum betrieb des rechnersystems
GB1512379A (en) * 1975-10-28 1978-06-01 Plessey Co Ltd Communications control unit for use in multiprocessor data processing systems
DE2641741C2 (de) * 1976-09-16 1986-01-16 Siemens AG, 1000 Berlin und 8000 München Rechenanlage aus mehreren miteinander über ein Sammelleitungssystem verbundenen und zusammenwirkenden Einzelrechnern und einem Steuerrechner
US4296466A (en) * 1978-01-23 1981-10-20 Data General Corporation Data processing system including a separate input/output processor with micro-interrupt request apparatus

Also Published As

Publication number Publication date
BE889214A (fr) 1981-10-01
GB2080582A (en) 1982-02-03
FR2484668A1 (fr) 1981-12-18
FI801896A7 (fi) 1981-01-01
DE3123379C2 (enrdf_load_stackoverflow) 1991-11-28
FR2484668B1 (fr) 1985-11-29
GB2080582B (en) 1984-11-21
DE3123379A1 (de) 1982-09-09

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Legal Events

Date Code Title Description
NR Patent deemed never to have been added to the register under section 13(7) of patents (transitional arrangements) rules