HK1141603A1 - Prioritized bus request scheduling mechanism for processing devices - Google Patents

Prioritized bus request scheduling mechanism for processing devices

Info

Publication number
HK1141603A1
HK1141603A1 HK10108037.6A HK10108037A HK1141603A1 HK 1141603 A1 HK1141603 A1 HK 1141603A1 HK 10108037 A HK10108037 A HK 10108037A HK 1141603 A1 HK1141603 A1 HK 1141603A1
Authority
HK
Hong Kong
Prior art keywords
processing devices
bus request
scheduling mechanism
request scheduling
entries
Prior art date
Application number
HK10108037.6A
Other languages
English (en)
Inventor
David L Hill
Derek T Bachand
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK1141603A1 publication Critical patent/HK1141603A1/xx

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1642Handling requests for interconnection or transfer for access to memory bus based on arbitration with request queuing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18Handling requests for interconnection or transfer for access to memory bus based on priority control
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Selective Calling Equipment (AREA)
  • Small-Scale Networks (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
  • Image Processing (AREA)
  • Train Traffic Observation, Control, And Security (AREA)
  • Digital Computer Display Output (AREA)
HK10108037.6A 1999-12-28 2010-08-23 Prioritized bus request scheduling mechanism for processing devices HK1141603A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/474,010 US6499090B1 (en) 1999-12-28 1999-12-28 Prioritized bus request scheduling mechanism for processing devices

Publications (1)

Publication Number Publication Date
HK1141603A1 true HK1141603A1 (en) 2010-11-12

Family

ID=23881855

Family Applications (2)

Application Number Title Priority Date Filing Date
HK03103535A HK1051726A1 (en) 1999-12-28 2003-05-19 Prioritized bus request scheduling mechanism for processing devices
HK10108037.6A HK1141603A1 (en) 1999-12-28 2010-08-23 Prioritized bus request scheduling mechanism for processing devices

Family Applications Before (1)

Application Number Title Priority Date Filing Date
HK03103535A HK1051726A1 (en) 1999-12-28 2003-05-19 Prioritized bus request scheduling mechanism for processing devices

Country Status (10)

Country Link
US (5) US6499090B1 (xx)
EP (2) EP2157515B1 (xx)
KR (1) KR100604220B1 (xx)
CN (1) CN1316392C (xx)
AT (2) ATE478379T1 (xx)
AU (1) AU1627101A (xx)
DE (2) DE60044851D1 (xx)
HK (2) HK1051726A1 (xx)
TW (1) TW527540B (xx)
WO (1) WO2001048617A2 (xx)

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Also Published As

Publication number Publication date
US20030196050A1 (en) 2003-10-16
WO2001048617A3 (en) 2002-01-31
DE60045804D1 (de) 2011-05-12
US20050268051A1 (en) 2005-12-01
HK1051726A1 (en) 2003-08-15
US6782457B2 (en) 2004-08-24
KR100604220B1 (ko) 2006-07-24
US20070094462A1 (en) 2007-04-26
CN1316392C (zh) 2007-05-16
US7133981B2 (en) 2006-11-07
ATE504041T1 (de) 2011-04-15
US6499090B1 (en) 2002-12-24
AU1627101A (en) 2001-07-09
CN1382276A (zh) 2002-11-27
EP1242894A2 (en) 2002-09-25
KR20020069186A (ko) 2002-08-29
TW527540B (en) 2003-04-11
US20030018863A1 (en) 2003-01-23
US7487305B2 (en) 2009-02-03
ATE478379T1 (de) 2010-09-15
EP2157515B1 (en) 2011-03-30
DE60044851D1 (de) 2010-09-30
US6606692B2 (en) 2003-08-12
WO2001048617A2 (en) 2001-07-05
EP1242894B1 (en) 2010-08-18
EP2157515A1 (en) 2010-02-24

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Effective date: 20161122