HK1046999B - 可編程緩衝電路 - Google Patents

可編程緩衝電路

Info

Publication number
HK1046999B
HK1046999B HK02108429.2A HK02108429A HK1046999B HK 1046999 B HK1046999 B HK 1046999B HK 02108429 A HK02108429 A HK 02108429A HK 1046999 B HK1046999 B HK 1046999B
Authority
HK
Hong Kong
Prior art keywords
buffer circuit
reference point
programmable buffer
impedance
voltage
Prior art date
Application number
HK02108429.2A
Other languages
English (en)
Other versions
HK1046999A1 (en
Inventor
M Volk Andrew
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK1046999A1 publication Critical patent/HK1046999A1/xx
Publication of HK1046999B publication Critical patent/HK1046999B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0005—Modifications of input or output impedance

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Circuits Of Receivers In General (AREA)
  • Communication Control (AREA)
  • Networks Using Active Elements (AREA)
  • Amplifiers (AREA)
HK02108429.2A 1999-12-23 2002-11-21 可編程緩衝電路 HK1046999B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/472,373 US6347850B1 (en) 1999-12-23 1999-12-23 Programmable buffer circuit
PCT/US2000/042662 WO2001047120A2 (en) 1999-12-23 2000-12-06 Programmable buffer circuit

Publications (2)

Publication Number Publication Date
HK1046999A1 HK1046999A1 (en) 2003-01-30
HK1046999B true HK1046999B (zh) 2004-09-10

Family

ID=23875263

Family Applications (1)

Application Number Title Priority Date Filing Date
HK02108429.2A HK1046999B (zh) 1999-12-23 2002-11-21 可編程緩衝電路

Country Status (11)

Country Link
US (1) US6347850B1 (zh)
EP (1) EP1247341B1 (zh)
CN (1) CN1226826C (zh)
AT (1) ATE261210T1 (zh)
AU (1) AU4713101A (zh)
DE (1) DE60008800T2 (zh)
ES (1) ES2217036T3 (zh)
HK (1) HK1046999B (zh)
TR (1) TR200400747T4 (zh)
TW (1) TW563300B (zh)
WO (1) WO2001047120A2 (zh)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6633178B2 (en) * 2001-09-28 2003-10-14 Intel Corporation Apparatus and method for power efficient line driver
JP3626452B2 (ja) * 2001-12-27 2005-03-09 株式会社東芝 半導体装置
US6965529B2 (en) 2002-06-21 2005-11-15 Intel Coproration Memory bus termination
US20040263203A1 (en) * 2003-06-27 2004-12-30 Intel Corporation Signal compensation
US7173489B1 (en) 2003-08-25 2007-02-06 Marvell Semiconductor, Inc. Programmable gain voltage buffer
DE10351016B3 (de) * 2003-10-31 2005-06-09 Infineon Technologies Ag Pseudo-dynamische Off-Chip-Treiber-Kalibrierung
US7009894B2 (en) * 2004-02-19 2006-03-07 Intel Corporation Dynamically activated memory controller data termination
US7197591B2 (en) * 2004-06-30 2007-03-27 Intel Corporation Dynamic lane, voltage and frequency adjustment for serial interconnect
JP4159553B2 (ja) * 2005-01-19 2008-10-01 エルピーダメモリ株式会社 半導体装置の出力回路及びこれを備える半導体装置、並びに、出力回路の特性調整方法
US7571406B2 (en) 2005-08-04 2009-08-04 Freescale Semiconductor, Inc. Clock tree adjustable buffer
US7466174B2 (en) 2006-03-31 2008-12-16 Intel Corporation Fast lock scheme for phase locked loops and delay locked loops
US9276780B2 (en) * 2013-03-05 2016-03-01 Lattice Semiconductor Corporation Calibration of single-ended high-speed interfaces

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5134311A (en) * 1990-06-07 1992-07-28 International Business Machines Corporation Self-adjusting impedance matching driver
US5254883A (en) * 1992-04-22 1993-10-19 Rambus, Inc. Electrical current source circuitry for a bus
US5457407A (en) * 1994-07-06 1995-10-10 Sony Electronics Inc. Binary weighted reference circuit for a variable impedance output buffer
US5955894A (en) * 1997-06-25 1999-09-21 Sun Microsystems, Inc. Method for controlling the impedance of a driver circuit
US6064224A (en) * 1998-07-31 2000-05-16 Hewlett--Packard Company Calibration sharing for CMOS output driver
US6118310A (en) * 1998-11-04 2000-09-12 Agilent Technologies Digitally controlled output driver and method for impedance matching
US6166563A (en) * 1999-04-26 2000-12-26 Intel Corporation Method and apparatus for dual mode output buffer impedance compensation

Also Published As

Publication number Publication date
WO2001047120A3 (en) 2002-01-10
AU4713101A (en) 2001-07-03
TW563300B (en) 2003-11-21
CN1226826C (zh) 2005-11-09
TR200400747T4 (tr) 2004-06-21
DE60008800T2 (de) 2005-02-10
CN1435008A (zh) 2003-08-06
WO2001047120A2 (en) 2001-06-28
US6347850B1 (en) 2002-02-19
DE60008800D1 (de) 2004-04-08
ATE261210T1 (de) 2004-03-15
EP1247341B1 (en) 2004-03-03
ES2217036T3 (es) 2004-11-01
EP1247341A2 (en) 2002-10-09
HK1046999A1 (en) 2003-01-30

Similar Documents

Publication Publication Date Title
AU2003299076A1 (en) Electrophysiology electrode having multiple power connections and electrophysiology devices including the same
WO2003037215A3 (en) Areal implant
ZA200104196B (en) Azepinoindole derivatives, the production and use thereof.
ZA200201806B (en) Substituted 2-thio-3,5-dicyano-4-aryl-6-aminopyridines and the use thereof.
EP0614279A3 (en) Surge tolerant output buffer circuit.
EP1229651A3 (en) Enhanced field programmable gate array
AU5130299A (en) Wrist-mounted i.v. administration set
HK1046999A1 (en) Programmable buffer circuit
HK1032432A1 (en) High strength screw.
AU2415500A (en) Conductive leads with non-wettable surfaces
WO2002003552A3 (en) Rc-timer scheme
JO2212B1 (en) 4-PDE inhibitors for ethan substituted with three Ariel groups
AU2002212982A1 (en) Dynamic swing voltage adjustment
AU2001267171A1 (en) Modified xylanases exhibiting increased thermophilicity and alkalophilicity
DE50213926D1 (de) Portsystem für einen perkutan implantierten port
DK0753239T3 (da) Impedanspuffer-MOS-kredsløb med dynamisk reduceret tærskelværdispænding, som til anvendelse i en udgangspuffer for en hørea
HK1045841A1 (en) Perfluoroalkylamide, the production thereof and the use thereof in diagnostics
EP0949755A3 (en) Switched capacitor amplifier with one-clock delay
AU2298200A (en) Stabilized filler, its production and use
AU4288300A (en) Unsupported flat linoleum structure and method of producing same
TW351023B (en) Antenna
DE69019698D1 (de) MOS-Bauteile mit einer verbesserten elektrischen Anpassung.
AU2001242742A1 (en) Copper-tolerant yeast and pectinase produced by the copper-tolerant yeast
AU6563400A (en) Nanoparticulate sulfur, the production and the use thereof
DE69933319D1 (de) Strombegrenzungsempfänger mit Impedanz- /Lastanpassung für einen Empfängerchip in abgeschaltetem Zustand

Legal Events

Date Code Title Description
PF Patent in force
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20151206