HK1019654A1 - An apparatus and a method for error encoding a digital data stream and a data storage device - Google Patents

An apparatus and a method for error encoding a digital data stream and a data storage device

Info

Publication number
HK1019654A1
HK1019654A1 HK99104755A HK99104755A HK1019654A1 HK 1019654 A1 HK1019654 A1 HK 1019654A1 HK 99104755 A HK99104755 A HK 99104755A HK 99104755 A HK99104755 A HK 99104755A HK 1019654 A1 HK1019654 A1 HK 1019654A1
Authority
HK
Hong Kong
Prior art keywords
storage device
error encoding
data storage
data stream
digital data
Prior art date
Application number
HK99104755A
Other languages
English (en)
Inventor
Martin D Gray
Original Assignee
Overland Storage Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/599,146 external-priority patent/US5712863A/en
Priority claimed from US08/599,149 external-priority patent/US5815514A/en
Application filed by Overland Storage Inc filed Critical Overland Storage Inc
Publication of HK1019654A1 publication Critical patent/HK1019654A1/xx

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/15Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1515Reed-Solomon codes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/18Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1833Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/15Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707Simple row-column interleaver, i.e. pure block interleaving
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/47Error detection, forward error correction or error protection, not provided for in groups H03M13/01 - H03M13/37
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
    • G11B2020/14348 to 9 modulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Algebra (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
  • Analogue/Digital Conversion (AREA)
  • Transmission And Conversion Of Sensor Element Output (AREA)
HK99104755A 1996-02-09 1999-10-25 An apparatus and a method for error encoding a digital data stream and a data storage device HK1019654A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/599,146 US5712863A (en) 1996-02-09 1996-02-09 Randomizing encoder for digital data storage
US08/599,149 US5815514A (en) 1996-02-09 1996-02-09 Variable rate bit inserter for digital data storage
PCT/US1997/002010 WO1997029486A2 (fr) 1996-02-09 1997-02-07 Codeur pour memoire de donnees numeriques

Publications (1)

Publication Number Publication Date
HK1019654A1 true HK1019654A1 (en) 2000-02-18

Family

ID=27083253

Family Applications (1)

Application Number Title Priority Date Filing Date
HK99104755A HK1019654A1 (en) 1996-02-09 1999-10-25 An apparatus and a method for error encoding a digital data stream and a data storage device

Country Status (8)

Country Link
EP (2) EP0879464A2 (fr)
JP (1) JP3935942B2 (fr)
CN (1) CN1135549C (fr)
AU (1) AU733663B2 (fr)
CA (1) CA2246423C (fr)
HK (1) HK1019654A1 (fr)
RU (1) RU98116742A (fr)
WO (1) WO1997029486A2 (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5931968A (en) 1996-02-09 1999-08-03 Overland Data, Inc. Digital data recording channel
US6167550A (en) * 1996-02-09 2000-12-26 Overland Data, Inc. Write format for digital data storage
US6543024B2 (en) 1996-02-09 2003-04-01 Overland Storage, Inc. Write format for digital data storage
US6597526B1 (en) 1998-08-14 2003-07-22 Overland Storage, Inc. Magnetic tape drive apparatus including a variable rate encoder
EP1069569A3 (fr) * 1999-06-28 2005-06-01 Hewlett-Packard Company, A Delaware Corporation Recouvrement d'un paquet de données par superposition de mot de code
KR100841285B1 (ko) * 2006-09-18 2008-06-25 주식회사 펜래버레토리 표면상에 절대 위치 표시 패턴을 갖는 제조물 및 그 절대위치 표시 패턴의 형성 방법
CN102169697A (zh) * 2011-01-06 2011-08-31 中国科学院上海光学精密机械研究所 抑制光盘数据直流和值的装置和方法
EP2863566B1 (fr) 2013-10-18 2020-09-02 Université de Nantes Procédé de reconstruction d'un bloc de données et appareil l'utilisant
CN108011640B (zh) * 2016-11-01 2021-01-12 中国科学院沈阳自动化研究所 一种用于(2,1,n)卷积编码的通用方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6490621A (en) * 1987-09-30 1989-04-07 Nec Corp Decoder
JP2666367B2 (ja) * 1988-05-24 1997-10-22 ソニー株式会社 Mスクランブル回路
JP2974678B2 (ja) * 1988-06-23 1999-11-10 ソニー株式会社 データ誤り検出方式
US4978955A (en) * 1989-11-09 1990-12-18 Archive Corporation Data randomizing/de-randomizing circuit for randomizing and de-randomizing data
JP3053106B2 (ja) * 1990-11-02 2000-06-19 株式会社日立製作所 暗号化処理装置、及び復号化処理装置
US5255130A (en) * 1991-03-29 1993-10-19 Archive Corporation Adjustable write equalization for tape drives
US5365231A (en) * 1991-03-30 1994-11-15 Kabushiki Kaisha Toshiba Encoding apparatus for digital signal with improved block channel coding
EP0622002B1 (fr) * 1992-09-22 1998-08-26 Sony Corporation Appareil et procede de traitement de signaux video numeriques
JP3429795B2 (ja) * 1992-10-08 2003-07-22 株式会社デノン 光ディスク装置及び光ディスク
EP0593173B1 (fr) * 1992-10-16 1998-11-11 Matsushita Electric Industrial Co., Ltd. Appareil pour enregistrer des signaux numériques en contrÔlant les caractéristiques de fréquence des signaux numériques
JPH06197024A (ja) * 1992-11-09 1994-07-15 Sony Corp 変調方法、変調装置及び復調装置
JP2780612B2 (ja) * 1993-10-13 1998-07-30 富士通株式会社 磁気記録再生装置

Also Published As

Publication number Publication date
JP2001518224A (ja) 2001-10-09
CN1135549C (zh) 2004-01-21
WO1997029486A2 (fr) 1997-08-14
CA2246423C (fr) 2004-08-03
EP1256951A1 (fr) 2002-11-13
AU1955097A (en) 1997-08-28
RU98116742A (ru) 2000-06-27
WO1997029486A3 (fr) 1997-10-23
JP3935942B2 (ja) 2007-06-27
CN1215495A (zh) 1999-04-28
EP0879464A2 (fr) 1998-11-25
CA2246423A1 (fr) 1997-08-14
AU733663B2 (en) 2001-05-17

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Legal Events

Date Code Title Description
PF Patent in force
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20090207