GB9210225D0 - Optional memory device - Google Patents

Optional memory device

Info

Publication number
GB9210225D0
GB9210225D0 GB929210225A GB9210225A GB9210225D0 GB 9210225 D0 GB9210225 D0 GB 9210225D0 GB 929210225 A GB929210225 A GB 929210225A GB 9210225 A GB9210225 A GB 9210225A GB 9210225 D0 GB9210225 D0 GB 9210225D0
Authority
GB
United Kingdom
Prior art keywords
memory device
optional memory
optional
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB929210225A
Other versions
GB2255843A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Publication of GB9210225D0 publication Critical patent/GB9210225D0/en
Publication of GB2255843A publication Critical patent/GB2255843A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0653—Configuration or reconfiguration with centralised address assignment
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0684—Configuration or reconfiguration with feedback, e.g. presence or absence of unit detected by addressing, overflow detection

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Dram (AREA)
GB9210225A 1991-05-13 1992-05-13 Optional memory. Withdrawn GB2255843A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13534191A JPH04336347A (en) 1991-05-13 1991-05-13 Memory device

Publications (2)

Publication Number Publication Date
GB9210225D0 true GB9210225D0 (en) 1992-07-01
GB2255843A GB2255843A (en) 1992-11-18

Family

ID=15149511

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9210225A Withdrawn GB2255843A (en) 1991-05-13 1992-05-13 Optional memory.

Country Status (3)

Country Link
JP (1) JPH04336347A (en)
DE (1) DE4215486A1 (en)
GB (1) GB2255843A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5307320A (en) * 1992-09-23 1994-04-26 Intel Corporation High integration DRAM controller
GB2279781A (en) * 1993-07-10 1995-01-11 Ibm Defining topology of a data processing system
DE19540915A1 (en) * 1994-11-10 1996-05-15 Raymond Engineering Redundant arrangement of solid state memory modules
EP0782076A1 (en) * 1995-12-29 1997-07-02 Siemens Aktiengesellschaft Arrangement for detecting the configuration of a memory
US6567904B1 (en) 1995-12-29 2003-05-20 Intel Corporation Method and apparatus for automatically detecting whether a memory unit location is unpopulated or populated with synchronous or asynchronous memory devices

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4545010A (en) * 1983-03-31 1985-10-01 Honeywell Information Systems Inc. Memory identification apparatus and method
NZ209664A (en) * 1983-09-29 1987-05-29 Tandem Computers Inc Memory board address assignments: automatic reconfiguration
AU579725B2 (en) * 1985-05-02 1988-12-08 Digital Equipment Corporation Arrangement for expanding memory capacity
US4951248A (en) * 1988-03-04 1990-08-21 Sun Microsystems, Inc. Self configuring memory system
GB2226667B (en) * 1988-12-30 1993-03-24 Intel Corp Self-identification of memory
JPH02287646A (en) * 1989-04-27 1990-11-27 Toshiba Corp Memory extending system
JP3024767B2 (en) * 1989-08-29 2000-03-21 株式会社日立製作所 Address supply system
EP0440445B1 (en) * 1990-01-31 1996-06-19 Hewlett-Packard Company System memory initialization with presence detect encoding
US5012408A (en) * 1990-03-15 1991-04-30 Digital Equipment Corporation Memory array addressing system for computer systems with multiple memory arrays

Also Published As

Publication number Publication date
GB2255843A (en) 1992-11-18
JPH04336347A (en) 1992-11-24
DE4215486A1 (en) 1992-12-24

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)