GB901215A - Improvements in or relating to a fail safe electrical circuit - Google Patents

Abstract

901,215. Circuits for bi-stable magnetic cores. STANDARD TELEPHONES & CABLES Ltd. Feb. 24, 1961 [Feb. 25, 1960], No. 6589/60. Class 40 (9). A fail-safe circuit comprises a core A having input windings wal . .. wa3, a shift winding wa4, a bias winding wa6 and an output winding wa5 connected in a common-emitter transistor circuit T1 via a resistance R 1 to the input winding wb1 of a second core B having an output winding wb2 and a shift winding wb3 connected in series with the bias winding wa6. Core A operates as an AND circuit for pulses on wal ... wa3 which are applied simultaneously with an opposing bias pulse (see Fig. 2), all three cores having to be pulsed to overcome the bias and set the core. The immediately following shift pulse A resets the core to cause transistor T1 to conduct, thereby setting core B. The next shift B pulse resets core B to produce an output from wb2 via transistor T2 to the next stage. If two or less of the cores wa1 . wa3 are pulsed then, since the hysteresis loop is not perfectly rectangular a short duration " sneak " pulse may be produced when wa4 is energized, thereby partially setting core B. In the succeeding stage this will be fed to core A during the early part of the shift B/bias pulse, but, as seen from Fig. 2, the shift A pulse is still present at this time and prevents the sneak pulse from effecting the core A. The design of the circuit ensures that in the event of any winding being open or short-circuited or any of the supplies failing or any of the cores or the transistor failing no output pulse is provided.