GB737527A - A method for the manufacture of semi-conductors having excess-conductive and deficitconductive regions with sharp borders - Google Patents

A method for the manufacture of semi-conductors having excess-conductive and deficitconductive regions with sharp borders

Info

Publication number
GB737527A
GB737527A GB2102653A GB2102653A GB737527A GB 737527 A GB737527 A GB 737527A GB 2102653 A GB2102653 A GB 2102653A GB 2102653 A GB2102653 A GB 2102653A GB 737527 A GB737527 A GB 737527A
Authority
GB
United Kingdom
Prior art keywords
powder
crystal
impurities
application
semi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2102653A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Licentia Patent Verwaltungs GmbH
Original Assignee
Licentia Patent Verwaltungs GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Licentia Patent Verwaltungs GmbH filed Critical Licentia Patent Verwaltungs GmbH
Publication of GB737527A publication Critical patent/GB737527A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Abstract

737,527. Semi-conductor devices. LICENTIA PATENT-VERWALTUNGS-GES. July 29, 1953 [July 29, 1952], No. 21026/53. Class 37. Sharply defined P-N junctions are made by depositing on the cleaned and polished surface of a crystal of one conductivity type a powder of material of, or which is suited to assume, the opposite conductivity type. The powder is then rapidly melted, preferably by a concentrated beam of high energy charged particles and allowed to crystallize from the base outwards by cooling the crystal from the side opposite to that to which the powder was applied. The powder may consist of the pure crystal, impurities being introduced from a lowpressure gas or vapour containing the impurities or compounds thereof during the melting and recrystallizing processes. Examples given are the application of powdered Ge, made P-type by production in the presence of In vapours, to N-type Ge containing Sb, or vice versa; application of pure Ge powder to Ge crystals containing In or Ga impurities in the presence of lowpressure antimony-hydrogen, and application of Si powder previously subjected to A1 vapour on a Ge crystal containing Sn.
GB2102653A 1952-07-29 1953-07-29 A method for the manufacture of semi-conductors having excess-conductive and deficitconductive regions with sharp borders Expired GB737527A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DEL0013008 1952-07-29

Publications (1)

Publication Number Publication Date
GB737527A true GB737527A (en) 1955-09-28

Family

ID=7259367

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2102653A Expired GB737527A (en) 1952-07-29 1953-07-29 A method for the manufacture of semi-conductors having excess-conductive and deficitconductive regions with sharp borders

Country Status (3)

Country Link
DE (1) DE966848C (en)
FR (1) FR1086896A (en)
GB (1) GB737527A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3102828A (en) * 1959-06-02 1963-09-03 Philips Corp Method of manufacturing semiconductor bodies
US3242018A (en) * 1960-07-01 1966-03-22 Siemens Ag Semiconductor device and method of producing it
US3260625A (en) * 1963-06-25 1966-07-12 Westinghouse Electric Corp Electron beam method for making contacts and p-n junctions

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL269817A (en) * 1960-10-10

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3102828A (en) * 1959-06-02 1963-09-03 Philips Corp Method of manufacturing semiconductor bodies
US3242018A (en) * 1960-07-01 1966-03-22 Siemens Ag Semiconductor device and method of producing it
US3260625A (en) * 1963-06-25 1966-07-12 Westinghouse Electric Corp Electron beam method for making contacts and p-n junctions

Also Published As

Publication number Publication date
FR1086896A (en) 1955-02-16
DE966848C (en) 1957-08-29

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