GB2526406B - Method and apparatus for performing a plurality of multiplication operations - Google Patents

Method and apparatus for performing a plurality of multiplication operations

Info

Publication number
GB2526406B
GB2526406B GB1504489.4A GB201504489A GB2526406B GB 2526406 B GB2526406 B GB 2526406B GB 201504489 A GB201504489 A GB 201504489A GB 2526406 B GB2526406 B GB 2526406B
Authority
GB
United Kingdom
Prior art keywords
multiplication operations
multiplication
operations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB1504489.4A
Other languages
English (en)
Other versions
GB2526406A (en
GB201504489D0 (en
Inventor
Espasa Roger
Sole Guillem
Fernandez Manuel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of GB201504489D0 publication Critical patent/GB201504489D0/en
Publication of GB2526406A publication Critical patent/GB2526406A/en
Application granted granted Critical
Publication of GB2526406B publication Critical patent/GB2526406B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30109—Register structure having multiple operands in a single register
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Complex Calculations (AREA)
GB1504489.4A 2014-03-28 2015-03-17 Method and apparatus for performing a plurality of multiplication operations Active GB2526406B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14/229,183 US20150277904A1 (en) 2014-03-28 2014-03-28 Method and apparatus for performing a plurality of multiplication operations

Publications (3)

Publication Number Publication Date
GB201504489D0 GB201504489D0 (en) 2015-04-29
GB2526406A GB2526406A (en) 2015-11-25
GB2526406B true GB2526406B (en) 2017-01-04

Family

ID=53016263

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1504489.4A Active GB2526406B (en) 2014-03-28 2015-03-17 Method and apparatus for performing a plurality of multiplication operations

Country Status (7)

Country Link
US (1) US20150277904A1 (cg-RX-API-DMAC10.html)
JP (2) JP6092904B2 (cg-RX-API-DMAC10.html)
KR (1) KR101729829B1 (cg-RX-API-DMAC10.html)
CN (1) CN104951278A (cg-RX-API-DMAC10.html)
DE (1) DE102015002253A1 (cg-RX-API-DMAC10.html)
GB (1) GB2526406B (cg-RX-API-DMAC10.html)
TW (1) TWI578230B (cg-RX-API-DMAC10.html)

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US20170177361A1 (en) * 2015-12-22 2017-06-22 Michael Anderson Apparatus and method for accelerating graph analytics
US10387988B2 (en) 2016-02-26 2019-08-20 Google Llc Compiler techniques for mapping program code to a high performance, power efficient, programmable image processing hardware platform
GB2548600B (en) * 2016-03-23 2018-05-09 Advanced Risc Mach Ltd Vector predication instruction
US10275243B2 (en) 2016-07-02 2019-04-30 Intel Corporation Interruptible and restartable matrix multiplication instructions, processors, methods, and systems
US10089110B2 (en) * 2016-07-02 2018-10-02 Intel Corporation Systems, apparatuses, and methods for cumulative product
CN115480730A (zh) 2016-10-20 2022-12-16 英特尔公司 用于经融合的乘加的系统、装置和方法
CN106951211B (zh) * 2017-03-27 2019-10-18 南京大学 一种可重构定浮点通用乘法器
US10417731B2 (en) * 2017-04-24 2019-09-17 Intel Corporation Compute optimization mechanism for deep neural networks
US10824938B2 (en) * 2017-04-24 2020-11-03 Intel Corporation Specialized fixed function hardware for efficient convolution
US10776699B2 (en) 2017-05-05 2020-09-15 Intel Corporation Optimized compute hardware for machine learning operations
WO2019066796A1 (en) * 2017-09-27 2019-04-04 Intel Corporation INSTRUCTIONS FOR THE VECTORIAL MULTIPLICATION OF WORDS SIGNED AT BOROUGH
WO2019066797A1 (en) * 2017-09-27 2019-04-04 Intel Corporation INSTRUCTIONS FOR VECTORIC MULTIPLICATION OF NOT SIGNED WORDS WITH BOROUGH
US10534838B2 (en) 2017-09-29 2020-01-14 Intel Corporation Bit matrix multiplication
US10802826B2 (en) * 2017-09-29 2020-10-13 Intel Corporation Apparatus and method for performing dual signed and unsigned multiplication of packed data elements
US10489154B2 (en) * 2017-11-28 2019-11-26 Intel Corporation Apparatus and method for complex multiply and accumulate
US10572568B2 (en) * 2018-03-28 2020-02-25 Intel Corporation Accelerator for sparse-dense matrix multiplication
US10459688B1 (en) * 2019-02-06 2019-10-29 Arm Limited Encoding special value in anchored-data element

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5606677A (en) * 1992-11-30 1997-02-25 Texas Instruments Incorporated Packed word pair multiply operation forming output including most significant bits of product and other bits of one input
US20040230774A1 (en) * 2003-05-12 2004-11-18 International Business Machines Corporation Multifunction hexadecimal instructions
US20050198472A1 (en) * 2004-03-04 2005-09-08 Sih Gilbert C. Digital signal processors with configurable dual-MAC and dual-ALU
WO2013095619A1 (en) * 2011-12-23 2013-06-27 Intel Corporation Super multiply add (super madd) instruction with three scalar terms

Family Cites Families (4)

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Publication number Priority date Publication date Assignee Title
JP2580371B2 (ja) * 1990-07-18 1997-02-12 株式会社日立製作所 ベクトルデ―タ処理装置
US8589663B2 (en) * 2006-06-27 2013-11-19 Intel Corporation Technique to perform three-source operations
US8549264B2 (en) * 2009-12-22 2013-10-01 Intel Corporation Add instructions to add three source operands
US8583902B2 (en) * 2010-05-07 2013-11-12 Oracle International Corporation Instruction support for performing montgomery multiplication

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5606677A (en) * 1992-11-30 1997-02-25 Texas Instruments Incorporated Packed word pair multiply operation forming output including most significant bits of product and other bits of one input
US20040230774A1 (en) * 2003-05-12 2004-11-18 International Business Machines Corporation Multifunction hexadecimal instructions
US20050198472A1 (en) * 2004-03-04 2005-09-08 Sih Gilbert C. Digital signal processors with configurable dual-MAC and dual-ALU
WO2013095619A1 (en) * 2011-12-23 2013-06-27 Intel Corporation Super multiply add (super madd) instruction with three scalar terms

Also Published As

Publication number Publication date
KR20150112779A (ko) 2015-10-07
JP6498226B2 (ja) 2019-04-10
DE102015002253A1 (de) 2015-10-01
JP2017142799A (ja) 2017-08-17
KR101729829B1 (ko) 2017-04-24
JP2015191661A (ja) 2015-11-02
GB2526406A (en) 2015-11-25
CN104951278A (zh) 2015-09-30
TW201602905A (zh) 2016-01-16
JP6092904B2 (ja) 2017-03-08
GB201504489D0 (en) 2015-04-29
US20150277904A1 (en) 2015-10-01
TWI578230B (zh) 2017-04-11

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