GB2393340A - Clock induced supply noise reduction method and apparatus for a latch based circuit - Google Patents

Clock induced supply noise reduction method and apparatus for a latch based circuit Download PDF

Info

Publication number
GB2393340A
GB2393340A GB0401936A GB0401936A GB2393340A GB 2393340 A GB2393340 A GB 2393340A GB 0401936 A GB0401936 A GB 0401936A GB 0401936 A GB0401936 A GB 0401936A GB 2393340 A GB2393340 A GB 2393340A
Authority
GB
United Kingdom
Prior art keywords
based circuit
noise reduction
reduction method
supply noise
latch based
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB0401936A
Other languages
English (en)
Other versions
GB0401936D0 (en
Inventor
Brian W Amick
Claude R Gauthier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/919,523 external-priority patent/US6552571B2/en
Priority claimed from US09/918,744 external-priority patent/US6549030B2/en
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of GB0401936D0 publication Critical patent/GB0401936D0/en
Publication of GB2393340A publication Critical patent/GB2393340A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/013—Modifications of generator to prevent operation by noise or interference
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails

Landscapes

  • Logic Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Semiconductor Integrated Circuits (AREA)
GB0401936A 2001-07-31 2002-07-29 Clock induced supply noise reduction method and apparatus for a latch based circuit Withdrawn GB2393340A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/919,523 US6552571B2 (en) 2001-07-31 2001-07-31 Clock induced supply noise reduction apparatus for a latch based circuit
US09/918,744 US6549030B2 (en) 2001-07-31 2001-07-31 Clock induced supply noise reduction method for a latch based circuit
PCT/US2002/023969 WO2003012992A2 (fr) 2001-07-31 2002-07-29 Dispositif et procede permettant la reduction de bruit induit par signal d'horloge, pour circuit a verrouillage

Publications (2)

Publication Number Publication Date
GB0401936D0 GB0401936D0 (en) 2004-03-03
GB2393340A true GB2393340A (en) 2004-03-24

Family

ID=27129758

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0401936A Withdrawn GB2393340A (en) 2001-07-31 2002-07-29 Clock induced supply noise reduction method and apparatus for a latch based circuit

Country Status (4)

Country Link
AU (1) AU2002329652A1 (fr)
GB (1) GB2393340A (fr)
TW (1) TW561692B (fr)
WO (1) WO2003012992A2 (fr)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4752703A (en) * 1987-04-23 1988-06-21 Industrial Technology Research Institute Current source polarity switching circuit
US5198699A (en) * 1988-09-09 1993-03-30 Texas Instruments Incorporated Capacitor-driven signal transmission circuit
JP3608361B2 (ja) * 1997-12-26 2005-01-12 株式会社日立製作所 低ノイズ半導体集積回路装置
JP3878320B2 (ja) * 1998-03-25 2007-02-07 株式会社ルネサステクノロジ 出力回路、パルス幅変調回路および半導体集積回路
JP2997241B1 (ja) * 1998-07-17 2000-01-11 株式会社半導体理工学研究センター 低スイッチング雑音論理回路
US6388503B1 (en) * 2000-09-28 2002-05-14 Intel Corporation Output buffer with charge-pumped noise cancellation

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Not yet advised *

Also Published As

Publication number Publication date
WO2003012992A3 (fr) 2004-04-01
TW561692B (en) 2003-11-11
WO2003012992A2 (fr) 2003-02-13
AU2002329652A1 (en) 2003-02-17
GB0401936D0 (en) 2004-03-03

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)