GB2387272B - Method of forming one or more nanapores for aligning molecules for molecular electronics - Google Patents

Method of forming one or more nanapores for aligning molecules for molecular electronics

Info

Publication number
GB2387272B
GB2387272B GB0229598A GB0229598A GB2387272B GB 2387272 B GB2387272 B GB 2387272B GB 0229598 A GB0229598 A GB 0229598A GB 0229598 A GB0229598 A GB 0229598A GB 2387272 B GB2387272 B GB 2387272B
Authority
GB
United Kingdom
Prior art keywords
nanapores
forming
molecular electronics
aligning molecules
aligning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0229598A
Other languages
English (en)
Other versions
GB2387272A (en
GB0229598D0 (en
Inventor
Theodore I Kamins
Yong Chen
Patricia A Beck
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of GB0229598D0 publication Critical patent/GB0229598D0/en
Publication of GB2387272A publication Critical patent/GB2387272A/en
Application granted granted Critical
Publication of GB2387272B publication Critical patent/GB2387272B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00031—Regular or irregular arrays of nanoscale structures, e.g. etch mask layer
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C15/00—Surface treatment of glass, not in the form of fibres or filaments, by etching
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00—Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/001—General methods for coating; Devices therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Nanotechnology (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Organic Chemistry (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Geochemistry & Mineralogy (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Analytical Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
GB0229598A 2001-12-20 2002-12-19 Method of forming one or more nanapores for aligning molecules for molecular electronics Expired - Fee Related GB2387272B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/029,583 US20030116531A1 (en) 2001-12-20 2001-12-20 Method of forming one or more nanopores for aligning molecules for molecular electronics

Publications (3)

Publication Number Publication Date
GB0229598D0 GB0229598D0 (en) 2003-01-22
GB2387272A GB2387272A (en) 2003-10-08
GB2387272B true GB2387272B (en) 2005-06-22

Family

ID=21849787

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0229598A Expired - Fee Related GB2387272B (en) 2001-12-20 2002-12-19 Method of forming one or more nanapores for aligning molecules for molecular electronics

Country Status (3)

Country Link
US (2) US20030116531A1 (enExample)
JP (1) JP2003218346A (enExample)
GB (1) GB2387272B (enExample)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10161312A1 (de) * 2001-12-13 2003-07-10 Infineon Technologies Ag Verfahren zum Herstellen einer Schicht-Anordnung und Schicht-Anordnung
US6919002B2 (en) * 2002-05-17 2005-07-19 Agilent Technologies, Inc. Nanopore system using nanotubes and C60 molecules
JP4418300B2 (ja) * 2004-05-25 2010-02-17 株式会社日立製作所 記録媒体作製方法とこれを用いた記録媒体及び情報記録再生装置
US20050287523A1 (en) * 2004-06-01 2005-12-29 The Regents Of The University Of California Functionalized platform for individual molecule or cell characterization
JP4813775B2 (ja) * 2004-06-18 2011-11-09 日本電信電話株式会社 多孔構造体及びその製造方法
US7102204B2 (en) * 2004-06-29 2006-09-05 International Business Machines Corporation Integrated SOI fingered decoupling capacitor
US7553730B2 (en) * 2006-07-14 2009-06-30 Agilent Technologies, Inc. Methods of fabrication employing nanoscale mandrels
US8192600B2 (en) * 2007-09-27 2012-06-05 The Board Of Trustees Of The University Of Illinois Solid state device
DE102008039798A1 (de) * 2008-08-15 2010-02-25 NMI Naturwissenschaftliches und Medizinisches Institut an der Universität Tübingen Verfahren zur Übertragung von Nanostrukturen in ein Substrat
JP2010283381A (ja) * 2010-08-26 2010-12-16 Nippon Telegr & Teleph Corp <Ntt> ヘテロ構造の製造方法
WO2012045016A2 (en) 2010-09-30 2012-04-05 California Institute Of Technology Particulate nanosorting stack
US8535512B2 (en) 2010-09-30 2013-09-17 California Institute Of Technology Devices and methods for sequencing nucleic acids
US8889562B2 (en) 2012-07-23 2014-11-18 International Business Machines Corporation Double patterning method
CN104803348A (zh) * 2015-04-20 2015-07-29 中国科学院光电技术研究所 一种牺牲模板制备高深宽比聚合物纳米柱阵列的方法
EP3343651B1 (en) * 2015-10-02 2019-09-18 Central Glass Company, Limited Thermoelectric conversion material and method for producing same
US10128341B2 (en) 2016-03-18 2018-11-13 Massachusetts Institute Of Technology Nanoporous semiconductor materials and manufacture thereof
CN106315505B (zh) * 2016-08-24 2018-11-06 深圳先进技术研究院 一种增强聚酰亚胺基底和导电金属层之间的粘附力的方法
US10370247B2 (en) 2016-08-29 2019-08-06 International Business Machines Corporation Contacting molecular components
US10739299B2 (en) * 2017-03-14 2020-08-11 Roche Sequencing Solutions, Inc. Nanopore well structures and methods
WO2019195719A1 (en) 2018-04-05 2019-10-10 Massachusetts Institute Of Technology Porous and nanoporous semiconductor materials and manufacture thereof
CN110364594B (zh) * 2019-07-19 2020-05-29 中原工学院 一种氮化镓或氮化铝纳米孔的制备方法
US11674947B2 (en) 2020-06-13 2023-06-13 International Business Machines Corporation Nanopore structures
US11715640B2 (en) 2020-09-30 2023-08-01 Taiwan Semiconductor Manufacturing Company, Ltd. Patterning material including silicon-containing layer and method for semiconductor device fabrication
US20220102200A1 (en) * 2020-09-30 2022-03-31 Taiwan Semiconductor Manufacturing Company, Ltd. Patterning material including carbon-containing layer and method for semiconductor device fabrication

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0731490A2 (en) * 1995-03-02 1996-09-11 Ebara Corporation Ultra-fine microfabrication method using an energy beam
US5569355A (en) * 1995-01-11 1996-10-29 Center For Advanced Fiberoptic Applications Method for fabrication of microchannel electron multipliers
US6515325B1 (en) * 2002-03-06 2003-02-04 Micron Technology, Inc. Nanotube semiconductor devices and methods for making the same
JP2003053699A (ja) * 2001-08-10 2003-02-26 Nikon Corp ピンホール製造方法及び測定装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4407695A (en) * 1981-12-31 1983-10-04 Exxon Research And Engineering Co. Natural lithographic fabrication of microstructures over large areas
US5393373A (en) * 1991-07-11 1995-02-28 Goldstar Electron Co., Ltd. Methods of patterning and manufacturing semiconductor devices
US6379572B1 (en) * 2000-06-02 2002-04-30 Sony Corporation Flat panel display with spaced apart gate emitter openings
US6274396B1 (en) * 2001-01-29 2001-08-14 Advanced Micro Devices, Inc. Method of manufacturing calibration wafers for determining in-line defect scan tool sensitivity

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5569355A (en) * 1995-01-11 1996-10-29 Center For Advanced Fiberoptic Applications Method for fabrication of microchannel electron multipliers
EP0731490A2 (en) * 1995-03-02 1996-09-11 Ebara Corporation Ultra-fine microfabrication method using an energy beam
JP2003053699A (ja) * 2001-08-10 2003-02-26 Nikon Corp ピンホール製造方法及び測定装置
US6515325B1 (en) * 2002-03-06 2003-02-04 Micron Technology, Inc. Nanotube semiconductor devices and methods for making the same

Also Published As

Publication number Publication date
US7922927B2 (en) 2011-04-12
US20030116531A1 (en) 2003-06-26
JP2003218346A (ja) 2003-07-31
GB2387272A (en) 2003-10-08
GB0229598D0 (en) 2003-01-22
US20080203055A1 (en) 2008-08-28

Similar Documents

Publication Publication Date Title
GB2387272B (en) Method of forming one or more nanapores for aligning molecules for molecular electronics
AU2002338333A1 (en) Methods for treating hyperactive gastric motility
EP1393220A4 (en) METHOD FOR IDENTIFYING COMPARABLE INSTRUMENTS
GB0125622D0 (en) Method of polymerisation
AU2002233633A1 (en) Method of transferring selected molecules
AU2002359240A1 (en) Molecular electronic interconnects
GB0410939D0 (en) Musical invention apparatus
AU2002256166A1 (en) Method of molecular structure recognition
HUP0303377A3 (en) Method for the detection of nucleic acid molecules
AU2002238274A1 (en) Method for the detection of nucleic acid molecules
GB2396437B (en) Alignment apparatus
AU2002365755A1 (en) Method for matching molecular spatial patterns
AU2002249040A1 (en) Apparatus for running tubulars
IL158004A0 (en) Method of enhancing entomophilous
AU2002306907A1 (en) Method for inhibiting metap2
GB2371731B (en) Method of alignment
AU2002329816A1 (en) Method for molecular subshape similarity matching
AU2002252351A8 (en) On-line certificate of authenticity for collectibles
IL158119A0 (en) Method for the production of delta1-pyrrolines
GB0116735D0 (en) Alignment of polymers
GB0106641D0 (en) Molecular target validation method
IL160703A0 (en) Method for treating coumarin-induced hemorrhage
GB0127520D0 (en) Process for strengthening of an underground formation
PL350495A1 (en) Caprolactam obtaining method
AUPR598601A0 (en) Identification of interacting molecules

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20071219